1 /* $NetBSD: intr.h,v 1.7 2006/03/29 08:55:40 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Matt Fredette. 5 * Copyright (c) 1998 Matt Thomas. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the company nor the names of the authors may be used to 17 * endorse or promote products derived from this software without specific 18 * prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 24 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 25 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 */ 32 33 #ifndef _SUN68K_INTR_H_ 34 #define _SUN68K_INTR_H_ 35 36 #include <sys/queue.h> 37 #include <m68k/psl.h> 38 39 /* 40 * Interrupt levels. Right now these correspond to real 41 * hardware levels, but I don't think anything counts on 42 * that (yet?). 43 */ 44 #define _IPL_SOFT_LEVEL1 1 45 #define _IPL_SOFT_LEVEL2 2 46 #define _IPL_SOFT_LEVEL3 3 47 #define _IPL_SOFT_LEVEL_MIN 1 48 #define _IPL_SOFT_LEVEL_MAX 3 49 50 #define IPL_NONE 0 51 #define IPL_SOFTCLOCK (PSL_S|PSL_IPL1) 52 #define IPL_SOFTNET (PSL_S|PSL_IPL1) 53 #define IPL_BIO (PSL_S|PSL_IPL2) 54 #define IPL_NET (PSL_S|PSL_IPL3) 55 #define IPL_SOFTSERIAL (PSL_S|PSL_IPL3) 56 #define IPL_TTY (PSL_S|PSL_IPL4) 57 #define IPL_VM (PSL_S|PSL_IPL4) 58 /* Intersil or Am9513 clock hardware interrupts (hard-wired at 5) */ 59 #define IPL_CLOCK (PSL_S|PSL_IPL5) 60 #define IPL_STATCLOCK IPL_CLOCK 61 #define IPL_SCHED (PSL_S|PSL_IPL7) 62 #define IPL_HIGH (PSL_S|PSL_IPL7) 63 #define IPL_LOCK (PSL_S|PSL_IPL7) 64 #define IPL_SERIAL (PSL_S|PSL_IPL6) 65 66 #ifdef _KERNEL 67 LIST_HEAD(sh_head, softintr_handler); 68 69 struct softintr_head { 70 int shd_ipl; 71 struct sh_head shd_intrs; 72 }; 73 74 struct softintr_handler { 75 struct softintr_head *sh_head; 76 LIST_ENTRY(softintr_handler) sh_link; 77 void (*sh_func)(void *); 78 void *sh_arg; 79 int sh_pending; 80 }; 81 82 extern void softintr_init(void); 83 extern void *softintr_establish(int, void (*)(void *), void *); 84 extern void softintr_disestablish(void *); 85 86 static __inline void 87 softintr_schedule(void *arg) 88 { 89 struct softintr_handler * const sh = arg; 90 if (sh->sh_pending == 0) { 91 sh->sh_pending = 1; 92 isr_soft_request(sh->sh_head->shd_ipl); 93 } 94 } 95 96 /* These connect interrupt handlers. */ 97 typedef int (*isr_func_t)(void *); 98 extern void isr_add_autovect(isr_func_t, void *, int); 99 extern void isr_add_vectored(isr_func_t, void *, int, int); 100 extern void isr_add_custom(int, void *); 101 102 /* 103 * Define inline functions for PSL manipulation. 104 * These are as close to macros as one can get. 105 * When not optimizing gcc will call the locore.s 106 * functions by the same names, so breakpoints on 107 * these functions will work normally, etc. 108 * (See the GCC extensions info document.) 109 */ 110 111 static __inline int _getsr(void); 112 113 /* Get current sr value. */ 114 static __inline int 115 _getsr(void) 116 { 117 int rv; 118 119 __asm volatile ("clrl %0; movew %%sr,%0" : "=&d" (rv)); 120 return (rv); 121 } 122 123 /* 124 * The rest of this is sun68k specific, because other ports may 125 * need to do special things in spl0() (i.e. simulate SIR). 126 * Suns have a REAL interrupt register, so spl0() and splx(s) 127 * have no need to check for any simulated interrupts, etc. 128 */ 129 130 #define spl0() _spl0() /* we have real software interrupts */ 131 #define splx(x) _spl(x) 132 133 /* IPL used by soft interrupts: netintr(), softclock() */ 134 #define spllowersoftclock() spl1() 135 136 /* Zilog Serial hardware interrupts (hard-wired at 6) */ 137 #define splzs() spl6() 138 139 /* This returns true iff the spl given is spl0. */ 140 #define is_spl0(s) (((s) & PSL_IPL7) == 0) 141 142 #define splraiseipl(x) _splraise(x) 143 144 #include <sys/spl.h> 145 146 #endif /* _KERNEL */ 147 148 #endif /* _SUN68K_INTR_H */ 149