xref: /netbsd-src/sys/arch/sun3/include/psl.h (revision fdecd6a253f999ae92b139670d9e15cc9df4497c)
1 /*	$NetBSD: psl.h,v 1.13 1997/05/29 21:16:59 gwr Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef	PSL_C
40 #include <m68k/psl.h>
41 
42 /* Could define this in the common <m68k/psl.h> instead. */
43 
44 #if defined(_KERNEL) && !defined(_LOCORE)
45 
46 #ifndef __GNUC__
47 /* No inline, use the real functions in locore.s */
48 extern int _getsr __P((void));
49 extern int _spl __P((int new));
50 extern int _splraise __P((int new));
51 #else	/* GNUC */
52 /*
53  * Define inline functions for PSL manipulation.
54  * These are as close to macros as one can get.
55  * When not optimizing gcc will call the locore.s
56  * functions by the same names, so breakpoints on
57  * these functions will work normally, etc.
58  * (See the GCC extensions info document.)
59  */
60 
61 /* Get current sr value. */
62 extern __inline__ int
63 _getsr(void)
64 {
65 	register int rv;
66 
67 	__asm __volatile ("clrl %0; movew sr,%0" : "&=d" (rv));
68 	return (rv);
69 }
70 
71 /* Set the current sr and return the old value. */
72 extern __inline__ int
73 _spl(int new)
74 {
75 	register int old;
76 
77 	__asm __volatile (
78 		"clrl %0; movew sr,%0; movew %1,sr" :
79 			"&=d" (old) : "di" (new));
80 	return (old);
81 }
82 
83 /*
84  * Like _spl() but can be used in places where the
85  * interrupt priority may already have been raised,
86  * without risk of enabling interrupts by accident.
87  * The comparison includes the "S" bit (always on)
88  * because that generates more efficient code.
89  */
90 extern __inline__ int
91 _splraise(int new)
92 {
93 	register int old;
94 
95 	__asm __volatile ("clrl %0; movew sr,%0" : "&=d" (old));
96 	if ((old & PSL_HIGHIPL) < new) {
97 		__asm __volatile ("movew %0,sr;" : : "di" (new));
98 	}
99 	return (old);
100 }
101 #endif	/* GNUC */
102 
103 /*
104  * The rest of this is sun3 specific, because other ports may
105  * need to do special things in spl0() (i.e. simulate SIR).
106  * Suns have a REAL interrupt register, so spl0() and splx(s)
107  * have no need to check for any simulated interrupts, etc.
108  */
109 
110 #define spl0()  _spl(PSL_S|PSL_IPL0)
111 #define spl1()  _spl(PSL_S|PSL_IPL1)
112 #define spl2()  _spl(PSL_S|PSL_IPL2)
113 #define spl3()  _spl(PSL_S|PSL_IPL3)
114 #define spl4()  _spl(PSL_S|PSL_IPL4)
115 #define spl5()  _spl(PSL_S|PSL_IPL5)
116 #define spl6()  _spl(PSL_S|PSL_IPL6)
117 #define spl7()  _spl(PSL_S|PSL_IPL7)
118 #define splx(x)	_spl(x)
119 
120 /* IPL used by soft interrupts: netintr(), softclock() */
121 #define splsoftclock()  spl1()
122 #define splsoftnet()    spl1()
123 
124 /* Highest block device (strategy) IPL. */
125 #define splbio()        spl2()
126 
127 /* Highest network interface IPL. */
128 #define splnet()        spl3()
129 
130 /* Highest tty device IPL. */
131 #define spltty()        spl4()
132 
133 /*
134  * Requirement: imp >= (highest network, tty, or disk IPL)
135  * This is used mostly in the VM code. (Why not splvm?)
136  * Note that the VM code runs at spl7 during kernel
137  * initialization, and later at spl0, so we have to
138  * use splraise to avoid enabling interrupts early.
139  */
140 #define splimp()        _splraise(PSL_S|PSL_IPL4)
141 
142 /* Intersil clock hardware interrupts (hard-wired at 5) */
143 #define splclock()      spl5()
144 #define splstatclock()  splclock()
145 
146 /* Block out all interrupts (except NMI of course). */
147 #define splhigh()       spl7()
148 #define splsched()      spl7()
149 
150 #endif	/* KERNEL && !_LOCORE */
151 #endif	/* PSL_C */
152