xref: /netbsd-src/sys/arch/sun3/include/cpu.h (revision ae1bfcddc410612bc8c58b807e1830becb69a24c)
1 /* Copyright (c) 1993 Adam Glass
2  * Copyright (c) 1988 University of Utah.
3  * Copyright (c) 1982, 1990 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * the Systems Programming Group of the University of Utah Computer
8  * Science Department.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by the University of
21  *	California, Berkeley and its contributors.
22  * 4. Neither the name of the University nor the names of its contributors
23  *    may be used to endorse or promote products derived from this software
24  *    without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  *	from: Utah Hdr: cpu.h 1.16 91/03/25
39  *	from: @(#)cpu.h	7.7 (Berkeley) 6/27/91
40  *	cpu.h,v 1.2 1993/05/22 07:58:17 cgd Exp
41  *	$Id: cpu.h,v 1.10 1994/05/10 05:24:05 gwr Exp $
42  */
43 
44 #ifdef KERNEL
45 
46 /*
47  * Exported definitions unique to sun3/68k cpu support.
48  */
49 
50 /*
51  * definitions of cpu-dependent requirements
52  * referenced in generic code
53  */
54 #define	COPY_SIGCODE		/* copy sigcode above user stack in exec */
55 
56 #define	cpu_exec(p)	/* nothing */
57 #define	cpu_wait(p)	/* nothing */
58 
59 /*
60  * Arguments to hardclock, softclock and gatherstats
61  * encapsulate the previous machine state in an opaque
62  * clockframe; for sun3, use just what the hardware
63  * leaves on the stack.
64  */
65 struct clockframe {
66 	int	pc;
67 	int	ps;
68 };
69 
70 #define	CLKF_USERMODE(framep)	(((framep)->ps & PSL_S) == 0)
71 #define	CLKF_BASEPRI(framep)	(((framep)->ps & PSL_IPL7) == 0)
72 #define	CLKF_PC(framep)		((framep)->pc)
73 #define	CLKF_INTR(framep)	(0) /* XXX laziness */
74 
75 typedef struct clockframe clockframe;
76 /*
77  * Preempt the current process if in interrupt from user mode,
78  * or after the current trap/syscall if in system mode.
79  */
80 #define	need_resched()	{ want_resched++; aston(); }
81 
82 /*
83  * Give a profiling tick to the current process from the softclock
84  * interrupt.  On the sun3, request an ast to send us through trap(),
85  * marking the proc as needing a profiling tick.
86  */
87 #define	profile_tick(p, framep)	((p)->p_flag |= P_OWEUPC, aston())
88 #define	need_proftick(p) 	((p)->p_flag |= P_OWEUPC, aston())
89 
90 /*
91  * Notify the current process (p) that it has a signal pending,
92  * process as soon as possible.
93  */
94 #define	signotify(p)	aston()
95 
96 #define aston() (astpending++)
97 
98 int astpending;	 /* need to trap before returning to user mode */
99 int want_resched; /* resched() was called */
100 
101 #define fuswintr(x) (-1)
102 #define suswintr(x,y) (-1)
103 
104 #include <machine/mtpr.h>
105 
106 /*
107  * CTL_MACHDEP definitions.
108  */
109 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
110 #define	CPU_MAXID		2	/* number of valid machdep ids */
111 
112 #define	CTL_MACHDEP_NAMES { \
113 	{ 0, 0 }, \
114 	{ "console_device", CTLTYPE_STRUCT }, \
115 }
116 
117 /* values for machineid */
118 
119 #define CPU_ARCH_MASK  0xf0
120 #define SUN3_ARCH      0x10
121 #define SUN3_IMPL_MASK 0x0f
122 #define SUN3_MACH_160  0x01
123 #define SUN3_MACH_50   0x02
124 #define SUN3_MACH_260  0x03
125 #define SUN3_MACH_110  0x04
126 #define SUN3_MACH_60   0x07
127 #define SUN3_MACH_E    0x08
128 
129 extern	int machineid, mmutype, ectype;
130 extern	char *intiobase, *intiolimit;
131 
132 /* 680X0 function codes */
133 #define	FC_USERD	1	/* user data space */
134 #define	FC_USERP	2	/* user program space */
135 #define	FC_CONTROL	3	/* HPMMU: clear TLB entries */
136 #define	FC_SUPERD	5	/* supervisor data space */
137 #define	FC_SUPERP	6	/* supervisor program space */
138 #define	FC_CPU		7	/* CPU space */
139 
140 /* fields in the 68020 cache control register */
141 #define	IC_ENABLE	0x0001	/* enable instruction cache */
142 #define	IC_FREEZE	0x0002	/* freeze instruction cache */
143 #define	IC_CE		0x0004	/* clear instruction cache entry */
144 #define	IC_CLR		0x0008	/* clear entire instruction cache */
145 
146 #define IC_CLEAR (IC_CLR|IC_ENABLE)
147 
148 #endif
149