xref: /netbsd-src/sys/arch/sun3/dev/zs.c (revision ce2c90c7c172d95d2402a5b3d96d8f8e6d138a21)
1 /*	$NetBSD: zs.c,v 1.78 2006/10/05 14:46:11 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include <sys/cdefs.h>
48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.78 2006/10/05 14:46:11 tsutsui Exp $");
49 
50 #include "opt_kgdb.h"
51 
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/conf.h>
55 #include <sys/device.h>
56 #include <sys/file.h>
57 #include <sys/ioctl.h>
58 #include <sys/kernel.h>
59 #include <sys/proc.h>
60 #include <sys/tty.h>
61 #include <sys/time.h>
62 #include <sys/syslog.h>
63 
64 #include <uvm/uvm_extern.h>
65 
66 #include <machine/autoconf.h>
67 #include <machine/cpu.h>
68 #include <machine/mon.h>
69 #include <machine/z8530var.h>
70 
71 #include <sun3/sun3/machdep.h>
72 #ifdef	_SUN3X_
73 #include <sun3/sun3x/obio.h>
74 #else
75 #include <sun3/sun3/obio.h>
76 #endif
77 #include <sun3/dev/zs_cons.h>
78 
79 #include <dev/cons.h>
80 #include <dev/ic/z8530reg.h>
81 
82 #include "kbd.h"	/* NKBD */
83 #include "zsc.h"	/* NZSC */
84 #define NZS NZSC
85 
86 /* Make life easier for the initialized arrays here. */
87 #if NZS < 2
88 #undef  NZS
89 #define NZS 2
90 #endif
91 
92 /*
93  * Some warts needed by z8530tty.c -
94  * The default parity REALLY needs to be the same as the PROM uses,
95  * or you can not see messages done with printf during boot-up...
96  */
97 int zs_def_cflag = (CREAD | CS8 | HUPCL);
98 
99 /*
100  * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
101  */
102 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
103 
104 /*
105  * Define interrupt levels.
106  */
107 #define ZSHARD_PRI	6	/* Wired on the CPU board... */
108 #define ZSSOFT_PRI	_IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */
109 
110 #define ZS_DELAY()			delay(2)
111 
112 /* The layout of this is hardware-dependent (padding, order). */
113 struct zschan {
114 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
115 	u_char		zc_xxx0;
116 	volatile u_char	zc_data;	/* data */
117 	u_char		zc_xxx1;
118 };
119 struct zsdevice {
120 	/* Yes, they are backwards. */
121 	struct	zschan zs_chan_b;
122 	struct	zschan zs_chan_a;
123 };
124 
125 
126 /* Default OBIO addresses. */
127 static int zs_physaddr[NZS] = {
128 	OBIO_ZS_KBD_MS,
129 	OBIO_ZS_TTY_AB };
130 
131 /* Saved PROM mappings */
132 static struct zsdevice *zsaddr[NZS];
133 
134 /* Flags from cninit() */
135 static int zs_hwflags[NZS][2];
136 
137 /* Default speed for each channel */
138 static int zs_defspeed[NZS][2] = {
139 	{ 1200, 	/* keyboard */
140 	  1200 },	/* mouse */
141 	{ 9600, 	/* ttya */
142 	  9600 },	/* ttyb */
143 };
144 
145 static u_char zs_init_reg[16] = {
146 	0,	/* 0: CMD (reset, etc.) */
147 	0,	/* 1: No interrupts yet. */
148 	0x18 + ZSHARD_PRI,	/* IVECT */
149 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
150 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
151 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
152 	0,	/* 6: TXSYNC/SYNCLO */
153 	0,	/* 7: RXSYNC/SYNCHI */
154 	0,	/* 8: alias for data port */
155 	ZSWR9_MASTER_IE,
156 	0,	/*10: Misc. TX/RX control bits */
157 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
158 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
159 	0,			/*13: BAUDHI (default=9600) */
160 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
161 	ZSWR15_BREAK_IE,
162 };
163 
164 
165 /* Find PROM mappings (for console support). */
166 void
167 zs_init(void)
168 {
169 	vaddr_t va;
170 	int i;
171 
172 	for (i = 0; i < NZS; i++) {
173 		if (find_prom_map(zs_physaddr[i], PMAP_OBIO,
174 		    sizeof(struct zschan), &va) == 0)
175 			zsaddr[i] = (void *)va;
176 	}
177 }
178 
179 struct zschan *
180 zs_get_chan_addr(int zs_unit, int channel)
181 {
182 	struct zsdevice *addr;
183 	struct zschan *zc;
184 
185 	if (zs_unit >= NZS)
186 		return NULL;
187 	addr = zsaddr[zs_unit];
188 	if (addr == NULL)
189 		return NULL;
190 	if (channel == 0) {
191 		zc = &addr->zs_chan_a;
192 	} else {
193 		zc = &addr->zs_chan_b;
194 	}
195 	return (zc);
196 }
197 
198 
199 /****************************************************************
200  * Autoconfig
201  ****************************************************************/
202 
203 /* Definition of the driver for autoconfig. */
204 static int	zs_match(struct device *, struct cfdata *, void *);
205 static void	zs_attach(struct device *, struct device *, void *);
206 static int	zs_print(void *, const char *);
207 
208 CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
209     zs_match, zs_attach, NULL, NULL);
210 
211 extern struct cfdriver zsc_cd;
212 
213 static int zshard(void *);
214 static void zssoft(void *);
215 static int zs_get_speed(struct zs_chanstate *);
216 
217 
218 /*
219  * Is the zs chip present?
220  */
221 static int
222 zs_match(struct device *parent, struct cfdata *cf, void *aux)
223 {
224 	struct confargs *ca = aux;
225 	int unit;
226 	void *va;
227 
228 	/*
229 	 * This driver only supports its wired-in mappings,
230 	 * because the console support depends on those.
231 	 */
232 	if (ca->ca_paddr == zs_physaddr[0]) {
233 		unit = 0;
234 	} else if (ca->ca_paddr == zs_physaddr[1]) {
235 		unit = 1;
236 	} else {
237 		return (0);
238 	}
239 
240 	/* Make sure zs_init() found mappings. */
241 	va = zsaddr[unit];
242 	if (va == NULL)
243 		return (0);
244 
245 	/* This returns -1 on a fault (bus error). */
246 	if (peek_byte(va) == -1)
247 		return (0);
248 
249 	/* Default interrupt priority (always splbio==2) */
250 	if (ca->ca_intpri == -1)
251 		ca->ca_intpri = ZSHARD_PRI;
252 
253 	return (1);
254 }
255 
256 /*
257  * Attach a found zs.
258  *
259  * Match slave number to zs unit number, so that misconfiguration will
260  * not set up the keyboard as ttya, etc.
261  */
262 static void
263 zs_attach(struct device *parent, struct device *self, void *aux)
264 {
265 	struct zsc_softc *zsc = (void *) self;
266 	struct confargs *ca = aux;
267 	struct zsc_attach_args zsc_args;
268 	volatile struct zschan *zc;
269 	struct zs_chanstate *cs;
270 	int s, zs_unit, channel;
271 	static int didintr;
272 
273 	zs_unit = device_unit(&zsc->zsc_dev);
274 
275 	printf(": (softpri %d)\n", ZSSOFT_PRI);
276 
277 	/* Use the mapping setup by the Sun PROM. */
278 	if (zsaddr[zs_unit] == NULL)
279 		panic("zs_attach: zs%d not mapped", zs_unit);
280 
281 	/*
282 	 * Initialize software state for each channel.
283 	 */
284 	for (channel = 0; channel < 2; channel++) {
285 		zsc_args.channel = channel;
286 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
287 		cs = &zsc->zsc_cs_store[channel];
288 		zsc->zsc_cs[channel] = cs;
289 
290 		simple_lock_init(&cs->cs_lock);
291 		cs->cs_channel = channel;
292 		cs->cs_private = NULL;
293 		cs->cs_ops = &zsops_null;
294 		cs->cs_brg_clk = PCLK / 16;
295 
296 		zc = zs_get_chan_addr(zs_unit, channel);
297 		cs->cs_reg_csr  = &zc->zc_csr;
298 		cs->cs_reg_data = &zc->zc_data;
299 
300 		memcpy(cs->cs_creg, zs_init_reg, 16);
301 		memcpy(cs->cs_preg, zs_init_reg, 16);
302 
303 		/* XXX: Get these from the EEPROM instead? */
304 		/* XXX: See the mvme167 code.  Better. */
305 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
306 			cs->cs_defspeed = zs_get_speed(cs);
307 		else
308 			cs->cs_defspeed = zs_defspeed[zs_unit][channel];
309 		cs->cs_defcflag = zs_def_cflag;
310 
311 		/* Make these correspond to cs_defcflag (-crtscts) */
312 		cs->cs_rr0_dcd = ZSRR0_DCD;
313 		cs->cs_rr0_cts = 0;
314 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
315 		cs->cs_wr5_rts = 0;
316 
317 		/*
318 		 * Clear the master interrupt enable.
319 		 * The INTENA is common to both channels,
320 		 * so just do it on the A channel.
321 		 */
322 		if (channel == 0) {
323 			zs_write_reg(cs, 9, 0);
324 		}
325 
326 		/*
327 		 * Look for a child driver for this channel.
328 		 * The child attach will setup the hardware.
329 		 */
330 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
331 			/* No sub-driver.  Just reset it. */
332 			u_char reset = (channel == 0) ?
333 				ZSWR9_A_RESET : ZSWR9_B_RESET;
334 			s = splhigh();
335 			zs_write_reg(cs,  9, reset);
336 			splx(s);
337 		}
338 	}
339 
340 	/*
341 	 * Now safe to install interrupt handlers.  Note the arguments
342 	 * to the interrupt handlers aren't used.  Note, we only do this
343 	 * once since both SCCs interrupt at the same level and vector.
344 	 */
345 	if (!didintr) {
346 		didintr = 1;
347 		isr_add_autovect(zshard, NULL, ca->ca_intpri);
348 	}
349 	zsc->zs_si = softintr_establish(IPL_SOFTSERIAL, zssoft, zsc);
350 	/* XXX; evcnt_attach() ? */
351 
352 	/*
353 	 * Set the master interrupt enable and interrupt vector.
354 	 * (common to both channels, do it on A)
355 	 */
356 	cs = zsc->zsc_cs[0];
357 	s = splhigh();
358 	/* interrupt vector */
359 	zs_write_reg(cs, 2, zs_init_reg[2]);
360 	/* master interrupt control (enable) */
361 	zs_write_reg(cs, 9, zs_init_reg[9]);
362 	splx(s);
363 
364 	/*
365 	 * XXX: L1A hack - We would like to be able to break into
366 	 * the debugger during the rest of autoconfiguration, so
367 	 * lower interrupts just enough to let zs interrupts in.
368 	 * This is done after both zs devices are attached.
369 	 */
370 	if (zs_unit == 1) {
371 		(void)spl5(); /* splzs - 1 */
372 	}
373 }
374 
375 static int
376 zs_print(void *aux, const char *name)
377 {
378 	struct zsc_attach_args *args = aux;
379 
380 	if (name != NULL)
381 		aprint_normal("%s: ", name);
382 
383 	if (args->channel != -1)
384 		aprint_normal(" channel %d", args->channel);
385 
386 	return UNCONF;
387 }
388 
389 /*
390  * Our ZS chips all share a common, autovectored interrupt,
391  * so we have to look at all of them on each interrupt.
392  */
393 static int
394 zshard(void *arg)
395 {
396 	struct zsc_softc *zsc;
397 	int unit, rval, softreq;
398 
399 	rval = 0;
400 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
401 		zsc = zsc_cd.cd_devs[unit];
402 		if (zsc == NULL)
403 			continue;
404 		rval |= zsc_intr_hard(zsc);
405 		softreq  = zsc->zsc_cs[0]->cs_softreq;
406 		softreq |= zsc->zsc_cs[1]->cs_softreq;
407 		if (softreq)
408 			softintr_schedule(zsc->zs_si);
409 	}
410 
411 	return (rval);
412 }
413 
414 /*
415  * Similar scheme as for zshard (look at all of them)
416  */
417 static void
418 zssoft(void *arg)
419 {
420 	struct zsc_softc *zsc = arg;
421 	int s;
422 
423 	/* Make sure we call the tty layer at spltty. */
424 	s = spltty();
425 	(void)zsc_intr_soft(zsc);
426 	splx(s);
427 }
428 
429 
430 /*
431  * Compute the current baud rate given a ZS channel.
432  */
433 static int
434 zs_get_speed(struct zs_chanstate *cs)
435 {
436 	int tconst;
437 
438 	tconst = zs_read_reg(cs, 12);
439 	tconst |= zs_read_reg(cs, 13) << 8;
440 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
441 }
442 
443 /*
444  * MD functions for setting the baud rate and control modes.
445  */
446 int
447 zs_set_speed(struct zs_chanstate *cs, int bps)
448 {
449 	int tconst, real_bps;
450 
451 	if (bps == 0)
452 		return (0);
453 
454 #ifdef	DIAGNOSTIC
455 	if (cs->cs_brg_clk == 0)
456 		panic("zs_set_speed");
457 #endif
458 
459 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
460 	if (tconst < 0)
461 		return (EINVAL);
462 
463 	/* Convert back to make sure we can do it. */
464 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
465 
466 	/* XXX - Allow some tolerance here? */
467 	if (real_bps != bps)
468 		return (EINVAL);
469 
470 	cs->cs_preg[12] = tconst;
471 	cs->cs_preg[13] = tconst >> 8;
472 
473 	/* Caller will stuff the pending registers. */
474 	return (0);
475 }
476 
477 int
478 zs_set_modes(struct zs_chanstate *cs, int cflag	/* bits per second */)
479 {
480 	int s;
481 
482 	/*
483 	 * Output hardware flow control on the chip is horrendous:
484 	 * if carrier detect drops, the receiver is disabled, and if
485 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
486 	 * Therefore, NEVER set the HFC bit, and instead use the
487 	 * status interrupt to detect CTS changes.
488 	 */
489 	s = splzs();
490 	cs->cs_rr0_pps = 0;
491 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
492 		cs->cs_rr0_dcd = 0;
493 		if ((cflag & MDMBUF) == 0)
494 			cs->cs_rr0_pps = ZSRR0_DCD;
495 	} else
496 		cs->cs_rr0_dcd = ZSRR0_DCD;
497 	if ((cflag & CRTSCTS) != 0) {
498 		cs->cs_wr5_dtr = ZSWR5_DTR;
499 		cs->cs_wr5_rts = ZSWR5_RTS;
500 		cs->cs_rr0_cts = ZSRR0_CTS;
501 	} else if ((cflag & MDMBUF) != 0) {
502 		cs->cs_wr5_dtr = 0;
503 		cs->cs_wr5_rts = ZSWR5_DTR;
504 		cs->cs_rr0_cts = ZSRR0_DCD;
505 	} else {
506 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
507 		cs->cs_wr5_rts = 0;
508 		cs->cs_rr0_cts = 0;
509 	}
510 	splx(s);
511 
512 	/* Caller will stuff the pending registers. */
513 	return (0);
514 }
515 
516 
517 /*
518  * Read or write the chip with suitable delays.
519  */
520 
521 u_char
522 zs_read_reg(struct zs_chanstate *cs, u_char reg)
523 {
524 	u_char val;
525 
526 	*cs->cs_reg_csr = reg;
527 	ZS_DELAY();
528 	val = *cs->cs_reg_csr;
529 	ZS_DELAY();
530 	return val;
531 }
532 
533 void
534 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
535 {
536 	*cs->cs_reg_csr = reg;
537 	ZS_DELAY();
538 	*cs->cs_reg_csr = val;
539 	ZS_DELAY();
540 }
541 
542 u_char
543 zs_read_csr(struct zs_chanstate *cs)
544 {
545 	u_char val;
546 
547 	val = *cs->cs_reg_csr;
548 	ZS_DELAY();
549 	return val;
550 }
551 
552 void
553 zs_write_csr(struct zs_chanstate *cs, u_char val)
554 {
555 	*cs->cs_reg_csr = val;
556 	ZS_DELAY();
557 }
558 
559 u_char
560 zs_read_data(struct zs_chanstate *cs)
561 {
562 	u_char val;
563 
564 	val = *cs->cs_reg_data;
565 	ZS_DELAY();
566 	return val;
567 }
568 
569 void
570 zs_write_data(struct zs_chanstate *cs, u_char val)
571 {
572 	*cs->cs_reg_data = val;
573 	ZS_DELAY();
574 }
575 
576 /****************************************************************
577  * Console support functions (Sun3 specific!)
578  * Note: this code is allowed to know about the layout of
579  * the chip registers, and uses that to keep things simple.
580  * XXX - I think I like the mvme167 code better. -gwr
581  ****************************************************************/
582 
583 void *zs_conschan;
584 
585 /*
586  * Handle user request to enter kernel debugger.
587  */
588 void
589 zs_abort(struct zs_chanstate *cs)
590 {
591 	volatile struct zschan *zc = zs_conschan;
592 	int rr0;
593 
594 	/* Wait for end of break to avoid PROM abort. */
595 	/* XXX - Limit the wait? */
596 	do {
597 		rr0 = zc->zc_csr;
598 		ZS_DELAY();
599 	} while (rr0 & ZSRR0_BREAK);
600 
601 	/* This is always available on the Sun3. */
602 	Debugger();
603 }
604 
605 /*
606  * Polled input char.
607  */
608 int
609 zs_getc(void *arg)
610 {
611 	volatile struct zschan *zc = arg;
612 	int s, c, rr0;
613 
614 	s = splhigh();
615 	/* Wait for a character to arrive. */
616 	do {
617 		rr0 = zc->zc_csr;
618 		ZS_DELAY();
619 	} while ((rr0 & ZSRR0_RX_READY) == 0);
620 
621 	c = zc->zc_data;
622 	ZS_DELAY();
623 	splx(s);
624 
625 	/*
626 	 * This is used by the kd driver to read scan codes,
627 	 * so don't translate '\r' ==> '\n' here...
628 	 */
629 	return (c);
630 }
631 
632 /*
633  * Polled output char.
634  */
635 void
636 zs_putc(void *arg, int c)
637 {
638 	volatile struct zschan *zc = arg;
639 	int s, rr0;
640 
641 	s = splhigh();
642 	/* Wait for transmitter to become ready. */
643 	do {
644 		rr0 = zc->zc_csr;
645 		ZS_DELAY();
646 	} while ((rr0 & ZSRR0_TX_READY) == 0);
647 
648 	zc->zc_data = c;
649 	ZS_DELAY();
650 	splx(s);
651 }
652 
653 /*****************************************************************/
654 
655 static void zscninit(struct consdev *);
656 static int  zscngetc(dev_t);
657 static void zscnputc(dev_t, int);
658 
659 /*
660  * Console table shared by ttya, ttyb
661  */
662 struct consdev consdev_tty = {
663 	nullcnprobe,
664 	zscninit,
665 	zscngetc,
666 	zscnputc,
667 	nullcnpollc,
668 	NULL,
669 };
670 
671 static void
672 zscninit(struct consdev *cn)
673 {
674 }
675 
676 /*
677  * Polled console input putchar.
678  */
679 static int
680 zscngetc(dev_t dev)
681 {
682 	return (zs_getc(zs_conschan));
683 }
684 
685 /*
686  * Polled console output putchar.
687  */
688 static void
689 zscnputc(dev_t dev, int c)
690 {
691 	zs_putc(zs_conschan, c);
692 }
693 
694 /*****************************************************************/
695 
696 static void prom_cninit(struct consdev *);
697 static int  prom_cngetc(dev_t);
698 static void prom_cnputc(dev_t, int);
699 
700 /*
701  * The console is set to this one initially,
702  * which lets us use the PROM until consinit()
703  * is called to select a real console.
704  */
705 struct consdev consdev_prom = {
706 	nullcnprobe,
707 	prom_cninit,
708 	prom_cngetc,
709 	prom_cnputc,
710 	nullcnpollc,
711 };
712 
713 /*
714  * The console table pointer is statically initialized
715  * to point to the PROM (output only) table, so that
716  * early calls to printf will work.
717  */
718 struct consdev *cn_tab = &consdev_prom;
719 
720 void
721 nullcnprobe(struct consdev *cn)
722 {
723 }
724 
725 static void
726 prom_cninit(struct consdev *cn)
727 {
728 }
729 
730 /*
731  * PROM console input putchar.
732  * (dummy - this is output only)
733  */
734 static int
735 prom_cngetc(dev_t dev)
736 {
737 	return (0);
738 }
739 
740 /*
741  * PROM console output putchar.
742  */
743 static void
744 prom_cnputc(dev_t dev, int c)
745 {
746 	(*romVectorPtr->putChar)(c & 0x7f);
747 }
748 
749 /*****************************************************************/
750 
751 extern struct consdev consdev_kd;
752 
753 static struct {
754 	int zs_unit, channel;
755 } zstty_conf[NZS*2] = {
756 	/* XXX: knowledge from the config file here... */
757 	{ 1, 0 },	/* ttya */
758 	{ 1, 1 },	/* ttyb */
759 	{ 0, 0 },	/* ttyc */
760 	{ 0, 1 },	/* ttyd */
761 };
762 
763 static const char *prom_inSrc_name[] = {
764 	"keyboard/display",
765 	"ttya", "ttyb",
766 	"ttyc", "ttyd" };
767 
768 /*
769  * This function replaces sys/dev/cninit.c
770  * Determine which device is the console using
771  * the PROM "input source" and "output sink".
772  */
773 void
774 cninit(void)
775 {
776 	struct sunromvec *v;
777 	struct zschan *zc;
778 	struct consdev *cn;
779 	int channel, zs_unit, zstty_unit;
780 	u_char inSource, outSink;
781 	extern const struct cdevsw zstty_cdevsw;
782 
783 	/* Get the zs driver ready for console duty. */
784 	zs_init();
785 
786 	v = romVectorPtr;
787 	inSource = *v->inSource;
788 	outSink  = *v->outSink;
789 	if (inSource != outSink) {
790 		mon_printf("cninit: mismatched PROM output selector\n");
791 	}
792 
793 	switch (inSource) {
794 	default:
795 		mon_printf("cninit: invalid inSource=%d\n", inSource);
796 		sunmon_abort();
797 		inSource = 0;
798 		/* fall through */
799 
800 	case 0:	/* keyboard/display */
801 #if NKBD > 0
802 		zs_unit = 0;
803 		channel = 0;
804 		cn = &consdev_kd;
805 		/* Set cn_dev, cn_pri in kd.c */
806 		break;
807 #else	/* NKBD */
808 		mon_printf("cninit: kdb/display not configured\n");
809 		sunmon_abort();
810 		inSource = 1;
811 		/* fall through */
812 #endif	/* NKBD */
813 
814 	case 1:	/* ttya */
815 	case 2:	/* ttyb */
816 	case 3:	/* ttyc (rewired keyboard connector) */
817 	case 4:	/* ttyd (rewired mouse connector)   */
818 		zstty_unit = inSource - 1;
819 		zs_unit = zstty_conf[zstty_unit].zs_unit;
820 		channel = zstty_conf[zstty_unit].channel;
821 		cn = &consdev_tty;
822 		cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw),
823 				     zstty_unit);
824 		cn->cn_pri = CN_REMOTE;
825 		break;
826 
827 	}
828 	/* Now that inSource has been validated, print it. */
829 	mon_printf("console is %s\n", prom_inSrc_name[inSource]);
830 
831 	zc = zs_get_chan_addr(zs_unit, channel);
832 	if (zc == NULL) {
833 		mon_printf("cninit: zs not mapped.\n");
834 		return;
835 	}
836 	zs_conschan = zc;
837 	zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
838 	cn_tab = cn;
839 	(*cn->cn_init)(cn);
840 #ifdef	KGDB
841 	zs_kgdb_init();
842 #endif
843 }
844