1 /* $NetBSD: zs.c,v 1.81 2007/12/04 15:12:07 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.81 2007/12/04 15:12:07 tsutsui Exp $"); 49 50 #include "opt_kgdb.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/conf.h> 55 #include <sys/device.h> 56 #include <sys/file.h> 57 #include <sys/ioctl.h> 58 #include <sys/kernel.h> 59 #include <sys/proc.h> 60 #include <sys/tty.h> 61 #include <sys/time.h> 62 #include <sys/syslog.h> 63 #include <sys/cpu.h> 64 #include <sys/intr.h> 65 66 #include <uvm/uvm_extern.h> 67 68 #include <machine/autoconf.h> 69 #include <machine/mon.h> 70 #include <machine/z8530var.h> 71 72 #include <sun3/sun3/machdep.h> 73 #ifdef _SUN3X_ 74 #include <sun3/sun3x/obio.h> 75 #else 76 #include <sun3/sun3/obio.h> 77 #endif 78 #include <sun3/dev/zs_cons.h> 79 80 #include <dev/cons.h> 81 #include <dev/ic/z8530reg.h> 82 83 #include "kbd.h" /* NKBD */ 84 #include "zsc.h" /* NZSC */ 85 #define NZS NZSC 86 87 /* Make life easier for the initialized arrays here. */ 88 #if NZS < 2 89 #undef NZS 90 #define NZS 2 91 #endif 92 93 /* 94 * Some warts needed by z8530tty.c - 95 * The default parity REALLY needs to be the same as the PROM uses, 96 * or you can not see messages done with printf during boot-up... 97 */ 98 int zs_def_cflag = (CREAD | CS8 | HUPCL); 99 100 /* 101 * The Sun3 provides a 4.9152 MHz clock to the ZS chips. 102 */ 103 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 104 105 /* 106 * Define interrupt levels. 107 */ 108 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 109 #define ZSSOFT_PRI _IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */ 110 111 #define ZS_DELAY() delay(2) 112 113 /* The layout of this is hardware-dependent (padding, order). */ 114 struct zschan { 115 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 116 u_char zc_xxx0; 117 volatile u_char zc_data; /* data */ 118 u_char zc_xxx1; 119 }; 120 struct zsdevice { 121 /* Yes, they are backwards. */ 122 struct zschan zs_chan_b; 123 struct zschan zs_chan_a; 124 }; 125 126 127 /* Default OBIO addresses. */ 128 static int zs_physaddr[NZS] = { 129 OBIO_ZS_KBD_MS, 130 OBIO_ZS_TTY_AB }; 131 132 /* Saved PROM mappings */ 133 static struct zsdevice *zsaddr[NZS]; 134 135 /* Flags from cninit() */ 136 static int zs_hwflags[NZS][2]; 137 138 /* Default speed for each channel */ 139 static int zs_defspeed[NZS][2] = { 140 { 1200, /* keyboard */ 141 1200 }, /* mouse */ 142 { 9600, /* ttya */ 143 9600 }, /* ttyb */ 144 }; 145 146 static u_char zs_init_reg[16] = { 147 0, /* 0: CMD (reset, etc.) */ 148 0, /* 1: No interrupts yet. */ 149 0x18 + ZSHARD_PRI, /* IVECT */ 150 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 151 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 152 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 153 0, /* 6: TXSYNC/SYNCLO */ 154 0, /* 7: RXSYNC/SYNCHI */ 155 0, /* 8: alias for data port */ 156 ZSWR9_MASTER_IE, 157 0, /*10: Misc. TX/RX control bits */ 158 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 159 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 160 0, /*13: BAUDHI (default=9600) */ 161 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 162 ZSWR15_BREAK_IE, 163 }; 164 165 166 /* Find PROM mappings (for console support). */ 167 void 168 zs_init(void) 169 { 170 vaddr_t va; 171 int i; 172 173 for (i = 0; i < NZS; i++) { 174 if (find_prom_map(zs_physaddr[i], PMAP_OBIO, 175 sizeof(struct zschan), &va) == 0) 176 zsaddr[i] = (void *)va; 177 } 178 } 179 180 struct zschan * 181 zs_get_chan_addr(int zs_unit, int channel) 182 { 183 struct zsdevice *addr; 184 struct zschan *zc; 185 186 if (zs_unit >= NZS) 187 return NULL; 188 addr = zsaddr[zs_unit]; 189 if (addr == NULL) 190 return NULL; 191 if (channel == 0) { 192 zc = &addr->zs_chan_a; 193 } else { 194 zc = &addr->zs_chan_b; 195 } 196 return (zc); 197 } 198 199 200 /**************************************************************** 201 * Autoconfig 202 ****************************************************************/ 203 204 /* Definition of the driver for autoconfig. */ 205 static int zs_match(struct device *, struct cfdata *, void *); 206 static void zs_attach(struct device *, struct device *, void *); 207 static int zs_print(void *, const char *); 208 209 CFATTACH_DECL(zsc, sizeof(struct zsc_softc), 210 zs_match, zs_attach, NULL, NULL); 211 212 extern struct cfdriver zsc_cd; 213 214 static int zshard(void *); 215 static int zs_get_speed(struct zs_chanstate *); 216 217 218 /* 219 * Is the zs chip present? 220 */ 221 static int 222 zs_match(struct device *parent, struct cfdata *cf, void *aux) 223 { 224 struct confargs *ca = aux; 225 int unit; 226 void *va; 227 228 /* 229 * This driver only supports its wired-in mappings, 230 * because the console support depends on those. 231 */ 232 if (ca->ca_paddr == zs_physaddr[0]) { 233 unit = 0; 234 } else if (ca->ca_paddr == zs_physaddr[1]) { 235 unit = 1; 236 } else { 237 return (0); 238 } 239 240 /* Make sure zs_init() found mappings. */ 241 va = zsaddr[unit]; 242 if (va == NULL) 243 return (0); 244 245 /* This returns -1 on a fault (bus error). */ 246 if (peek_byte(va) == -1) 247 return (0); 248 249 /* Default interrupt priority (always splbio==2) */ 250 if (ca->ca_intpri == -1) 251 ca->ca_intpri = ZSHARD_PRI; 252 253 return (1); 254 } 255 256 /* 257 * Attach a found zs. 258 * 259 * Match slave number to zs unit number, so that misconfiguration will 260 * not set up the keyboard as ttya, etc. 261 */ 262 static void 263 zs_attach(struct device *parent, struct device *self, void *aux) 264 { 265 struct zsc_softc *zsc = (void *) self; 266 struct confargs *ca = aux; 267 struct zsc_attach_args zsc_args; 268 volatile struct zschan *zc; 269 struct zs_chanstate *cs; 270 int s, zs_unit, channel; 271 static int didintr; 272 273 zs_unit = device_unit(&zsc->zsc_dev); 274 275 printf(": (softpri %d)\n", ZSSOFT_PRI); 276 277 /* Use the mapping setup by the Sun PROM. */ 278 if (zsaddr[zs_unit] == NULL) 279 panic("zs_attach: zs%d not mapped", zs_unit); 280 281 /* 282 * Initialize software state for each channel. 283 */ 284 for (channel = 0; channel < 2; channel++) { 285 zsc_args.channel = channel; 286 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 287 cs = &zsc->zsc_cs_store[channel]; 288 zsc->zsc_cs[channel] = cs; 289 290 zs_lock_init(cs); 291 cs->cs_channel = channel; 292 cs->cs_private = NULL; 293 cs->cs_ops = &zsops_null; 294 cs->cs_brg_clk = PCLK / 16; 295 296 zc = zs_get_chan_addr(zs_unit, channel); 297 cs->cs_reg_csr = &zc->zc_csr; 298 cs->cs_reg_data = &zc->zc_data; 299 300 memcpy(cs->cs_creg, zs_init_reg, 16); 301 memcpy(cs->cs_preg, zs_init_reg, 16); 302 303 /* XXX: Get these from the EEPROM instead? */ 304 /* XXX: See the mvme167 code. Better. */ 305 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 306 cs->cs_defspeed = zs_get_speed(cs); 307 else 308 cs->cs_defspeed = zs_defspeed[zs_unit][channel]; 309 cs->cs_defcflag = zs_def_cflag; 310 311 /* Make these correspond to cs_defcflag (-crtscts) */ 312 cs->cs_rr0_dcd = ZSRR0_DCD; 313 cs->cs_rr0_cts = 0; 314 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 315 cs->cs_wr5_rts = 0; 316 317 /* 318 * Clear the master interrupt enable. 319 * The INTENA is common to both channels, 320 * so just do it on the A channel. 321 */ 322 if (channel == 0) { 323 zs_write_reg(cs, 9, 0); 324 } 325 326 /* 327 * Look for a child driver for this channel. 328 * The child attach will setup the hardware. 329 */ 330 if (!config_found(self, (void *)&zsc_args, zs_print)) { 331 /* No sub-driver. Just reset it. */ 332 u_char reset = (channel == 0) ? 333 ZSWR9_A_RESET : ZSWR9_B_RESET; 334 s = splhigh(); 335 zs_write_reg(cs, 9, reset); 336 splx(s); 337 } 338 } 339 340 /* 341 * Now safe to install interrupt handlers. Note the arguments 342 * to the interrupt handlers aren't used. Note, we only do this 343 * once since both SCCs interrupt at the same level and vector. 344 */ 345 if (!didintr) { 346 didintr = 1; 347 isr_add_autovect(zshard, NULL, ca->ca_intpri); 348 } 349 zsc->zs_si = softint_establish(SOFTINT_SERIAL, 350 (void (*)(void *))zsc_intr_soft, zsc); 351 /* XXX; evcnt_attach() ? */ 352 353 /* 354 * Set the master interrupt enable and interrupt vector. 355 * (common to both channels, do it on A) 356 */ 357 cs = zsc->zsc_cs[0]; 358 s = splhigh(); 359 /* interrupt vector */ 360 zs_write_reg(cs, 2, zs_init_reg[2]); 361 /* master interrupt control (enable) */ 362 zs_write_reg(cs, 9, zs_init_reg[9]); 363 splx(s); 364 365 /* 366 * XXX: L1A hack - We would like to be able to break into 367 * the debugger during the rest of autoconfiguration, so 368 * lower interrupts just enough to let zs interrupts in. 369 * This is done after both zs devices are attached. 370 */ 371 if (zs_unit == 1) { 372 (void)spl5(); /* splzs - 1 */ 373 } 374 } 375 376 static int 377 zs_print(void *aux, const char *name) 378 { 379 struct zsc_attach_args *args = aux; 380 381 if (name != NULL) 382 aprint_normal("%s: ", name); 383 384 if (args->channel != -1) 385 aprint_normal(" channel %d", args->channel); 386 387 return UNCONF; 388 } 389 390 /* 391 * Our ZS chips all share a common, autovectored interrupt, 392 * so we have to look at all of them on each interrupt. 393 */ 394 static int 395 zshard(void *arg) 396 { 397 struct zsc_softc *zsc; 398 int unit, rval, softreq; 399 400 rval = 0; 401 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 402 zsc = zsc_cd.cd_devs[unit]; 403 if (zsc == NULL) 404 continue; 405 rval |= zsc_intr_hard(zsc); 406 softreq = zsc->zsc_cs[0]->cs_softreq; 407 softreq |= zsc->zsc_cs[1]->cs_softreq; 408 if (softreq) 409 softint_schedule(zsc->zs_si); 410 } 411 412 return (rval); 413 } 414 415 /* 416 * Compute the current baud rate given a ZS channel. 417 */ 418 static int 419 zs_get_speed(struct zs_chanstate *cs) 420 { 421 int tconst; 422 423 tconst = zs_read_reg(cs, 12); 424 tconst |= zs_read_reg(cs, 13) << 8; 425 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 426 } 427 428 /* 429 * MD functions for setting the baud rate and control modes. 430 */ 431 int 432 zs_set_speed(struct zs_chanstate *cs, int bps) 433 { 434 int tconst, real_bps; 435 436 if (bps == 0) 437 return (0); 438 439 #ifdef DIAGNOSTIC 440 if (cs->cs_brg_clk == 0) 441 panic("zs_set_speed"); 442 #endif 443 444 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 445 if (tconst < 0) 446 return (EINVAL); 447 448 /* Convert back to make sure we can do it. */ 449 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 450 451 /* XXX - Allow some tolerance here? */ 452 if (real_bps != bps) 453 return (EINVAL); 454 455 cs->cs_preg[12] = tconst; 456 cs->cs_preg[13] = tconst >> 8; 457 458 /* Caller will stuff the pending registers. */ 459 return (0); 460 } 461 462 int 463 zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */) 464 { 465 int s; 466 467 /* 468 * Output hardware flow control on the chip is horrendous: 469 * if carrier detect drops, the receiver is disabled, and if 470 * CTS drops, the transmitter is stoped IN MID CHARACTER! 471 * Therefore, NEVER set the HFC bit, and instead use the 472 * status interrupt to detect CTS changes. 473 */ 474 s = splzs(); 475 cs->cs_rr0_pps = 0; 476 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 477 cs->cs_rr0_dcd = 0; 478 if ((cflag & MDMBUF) == 0) 479 cs->cs_rr0_pps = ZSRR0_DCD; 480 } else 481 cs->cs_rr0_dcd = ZSRR0_DCD; 482 if ((cflag & CRTSCTS) != 0) { 483 cs->cs_wr5_dtr = ZSWR5_DTR; 484 cs->cs_wr5_rts = ZSWR5_RTS; 485 cs->cs_rr0_cts = ZSRR0_CTS; 486 } else if ((cflag & MDMBUF) != 0) { 487 cs->cs_wr5_dtr = 0; 488 cs->cs_wr5_rts = ZSWR5_DTR; 489 cs->cs_rr0_cts = ZSRR0_DCD; 490 } else { 491 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 492 cs->cs_wr5_rts = 0; 493 cs->cs_rr0_cts = 0; 494 } 495 splx(s); 496 497 /* Caller will stuff the pending registers. */ 498 return (0); 499 } 500 501 502 /* 503 * Read or write the chip with suitable delays. 504 */ 505 506 u_char 507 zs_read_reg(struct zs_chanstate *cs, u_char reg) 508 { 509 u_char val; 510 511 *cs->cs_reg_csr = reg; 512 ZS_DELAY(); 513 val = *cs->cs_reg_csr; 514 ZS_DELAY(); 515 return val; 516 } 517 518 void 519 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val) 520 { 521 *cs->cs_reg_csr = reg; 522 ZS_DELAY(); 523 *cs->cs_reg_csr = val; 524 ZS_DELAY(); 525 } 526 527 u_char 528 zs_read_csr(struct zs_chanstate *cs) 529 { 530 u_char val; 531 532 val = *cs->cs_reg_csr; 533 ZS_DELAY(); 534 return val; 535 } 536 537 void 538 zs_write_csr(struct zs_chanstate *cs, u_char val) 539 { 540 *cs->cs_reg_csr = val; 541 ZS_DELAY(); 542 } 543 544 u_char 545 zs_read_data(struct zs_chanstate *cs) 546 { 547 u_char val; 548 549 val = *cs->cs_reg_data; 550 ZS_DELAY(); 551 return val; 552 } 553 554 void 555 zs_write_data(struct zs_chanstate *cs, u_char val) 556 { 557 *cs->cs_reg_data = val; 558 ZS_DELAY(); 559 } 560 561 /**************************************************************** 562 * Console support functions (Sun3 specific!) 563 * Note: this code is allowed to know about the layout of 564 * the chip registers, and uses that to keep things simple. 565 * XXX - I think I like the mvme167 code better. -gwr 566 ****************************************************************/ 567 568 void *zs_conschan; 569 570 /* 571 * Handle user request to enter kernel debugger. 572 */ 573 void 574 zs_abort(struct zs_chanstate *cs) 575 { 576 volatile struct zschan *zc = zs_conschan; 577 int rr0; 578 579 /* Wait for end of break to avoid PROM abort. */ 580 /* XXX - Limit the wait? */ 581 do { 582 rr0 = zc->zc_csr; 583 ZS_DELAY(); 584 } while (rr0 & ZSRR0_BREAK); 585 586 /* This is always available on the Sun3. */ 587 Debugger(); 588 } 589 590 /* 591 * Polled input char. 592 */ 593 int 594 zs_getc(void *arg) 595 { 596 volatile struct zschan *zc = arg; 597 int s, c, rr0; 598 599 s = splhigh(); 600 /* Wait for a character to arrive. */ 601 do { 602 rr0 = zc->zc_csr; 603 ZS_DELAY(); 604 } while ((rr0 & ZSRR0_RX_READY) == 0); 605 606 c = zc->zc_data; 607 ZS_DELAY(); 608 splx(s); 609 610 /* 611 * This is used by the kd driver to read scan codes, 612 * so don't translate '\r' ==> '\n' here... 613 */ 614 return (c); 615 } 616 617 /* 618 * Polled output char. 619 */ 620 void 621 zs_putc(void *arg, int c) 622 { 623 volatile struct zschan *zc = arg; 624 int s, rr0; 625 626 s = splhigh(); 627 /* Wait for transmitter to become ready. */ 628 do { 629 rr0 = zc->zc_csr; 630 ZS_DELAY(); 631 } while ((rr0 & ZSRR0_TX_READY) == 0); 632 633 zc->zc_data = c; 634 ZS_DELAY(); 635 splx(s); 636 } 637 638 /*****************************************************************/ 639 640 static void zscninit(struct consdev *); 641 static int zscngetc(dev_t); 642 static void zscnputc(dev_t, int); 643 644 /* 645 * Console table shared by ttya, ttyb 646 */ 647 struct consdev consdev_tty = { 648 nullcnprobe, 649 zscninit, 650 zscngetc, 651 zscnputc, 652 nullcnpollc, 653 NULL, 654 }; 655 656 static void 657 zscninit(struct consdev *cn) 658 { 659 } 660 661 /* 662 * Polled console input putchar. 663 */ 664 static int 665 zscngetc(dev_t dev) 666 { 667 return (zs_getc(zs_conschan)); 668 } 669 670 /* 671 * Polled console output putchar. 672 */ 673 static void 674 zscnputc(dev_t dev, int c) 675 { 676 zs_putc(zs_conschan, c); 677 } 678 679 /*****************************************************************/ 680 681 static void prom_cninit(struct consdev *); 682 static int prom_cngetc(dev_t); 683 static void prom_cnputc(dev_t, int); 684 685 /* 686 * The console is set to this one initially, 687 * which lets us use the PROM until consinit() 688 * is called to select a real console. 689 */ 690 struct consdev consdev_prom = { 691 nullcnprobe, 692 prom_cninit, 693 prom_cngetc, 694 prom_cnputc, 695 nullcnpollc, 696 }; 697 698 /* 699 * The console table pointer is statically initialized 700 * to point to the PROM (output only) table, so that 701 * early calls to printf will work. 702 */ 703 struct consdev *cn_tab = &consdev_prom; 704 705 void 706 nullcnprobe(struct consdev *cn) 707 { 708 } 709 710 static void 711 prom_cninit(struct consdev *cn) 712 { 713 } 714 715 /* 716 * PROM console input putchar. 717 * (dummy - this is output only) 718 */ 719 static int 720 prom_cngetc(dev_t dev) 721 { 722 return (0); 723 } 724 725 /* 726 * PROM console output putchar. 727 */ 728 static void 729 prom_cnputc(dev_t dev, int c) 730 { 731 (*romVectorPtr->putChar)(c & 0x7f); 732 } 733 734 /*****************************************************************/ 735 736 extern struct consdev consdev_kd; 737 738 static struct { 739 int zs_unit, channel; 740 } zstty_conf[NZS*2] = { 741 /* XXX: knowledge from the config file here... */ 742 { 1, 0 }, /* ttya */ 743 { 1, 1 }, /* ttyb */ 744 { 0, 0 }, /* ttyc */ 745 { 0, 1 }, /* ttyd */ 746 }; 747 748 static const char *prom_inSrc_name[] = { 749 "keyboard/display", 750 "ttya", "ttyb", 751 "ttyc", "ttyd" }; 752 753 /* 754 * This function replaces sys/dev/cninit.c 755 * Determine which device is the console using 756 * the PROM "input source" and "output sink". 757 */ 758 void 759 cninit(void) 760 { 761 struct sunromvec *v; 762 struct zschan *zc; 763 struct consdev *cn; 764 int channel, zs_unit, zstty_unit; 765 u_char inSource, outSink; 766 extern const struct cdevsw zstty_cdevsw; 767 768 /* Get the zs driver ready for console duty. */ 769 zs_init(); 770 771 v = romVectorPtr; 772 inSource = *v->inSource; 773 outSink = *v->outSink; 774 if (inSource != outSink) { 775 mon_printf("cninit: mismatched PROM output selector\n"); 776 } 777 778 switch (inSource) { 779 default: 780 mon_printf("cninit: invalid inSource=%d\n", inSource); 781 sunmon_abort(); 782 inSource = 0; 783 /* fall through */ 784 785 case 0: /* keyboard/display */ 786 #if NKBD > 0 787 zs_unit = 0; 788 channel = 0; 789 cn = &consdev_kd; 790 /* Set cn_dev, cn_pri in kd.c */ 791 break; 792 #else /* NKBD */ 793 mon_printf("cninit: kdb/display not configured\n"); 794 sunmon_abort(); 795 inSource = 1; 796 /* fall through */ 797 #endif /* NKBD */ 798 799 case 1: /* ttya */ 800 case 2: /* ttyb */ 801 case 3: /* ttyc (rewired keyboard connector) */ 802 case 4: /* ttyd (rewired mouse connector) */ 803 zstty_unit = inSource - 1; 804 zs_unit = zstty_conf[zstty_unit].zs_unit; 805 channel = zstty_conf[zstty_unit].channel; 806 cn = &consdev_tty; 807 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 808 zstty_unit); 809 cn->cn_pri = CN_REMOTE; 810 break; 811 812 } 813 /* Now that inSource has been validated, print it. */ 814 mon_printf("console is %s\n", prom_inSrc_name[inSource]); 815 816 zc = zs_get_chan_addr(zs_unit, channel); 817 if (zc == NULL) { 818 mon_printf("cninit: zs not mapped.\n"); 819 return; 820 } 821 zs_conschan = zc; 822 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE; 823 cn_tab = cn; 824 (*cn->cn_init)(cn); 825 #ifdef KGDB 826 zs_kgdb_init(); 827 #endif 828 } 829