1 /* $NetBSD: zs.c,v 1.80 2007/11/09 00:05:06 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.80 2007/11/09 00:05:06 ad Exp $"); 49 50 #include "opt_kgdb.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/conf.h> 55 #include <sys/device.h> 56 #include <sys/file.h> 57 #include <sys/ioctl.h> 58 #include <sys/kernel.h> 59 #include <sys/proc.h> 60 #include <sys/tty.h> 61 #include <sys/time.h> 62 #include <sys/syslog.h> 63 64 #include <uvm/uvm_extern.h> 65 66 #include <machine/autoconf.h> 67 #include <machine/cpu.h> 68 #include <machine/mon.h> 69 #include <machine/z8530var.h> 70 71 #include <sun3/sun3/machdep.h> 72 #ifdef _SUN3X_ 73 #include <sun3/sun3x/obio.h> 74 #else 75 #include <sun3/sun3/obio.h> 76 #endif 77 #include <sun3/dev/zs_cons.h> 78 79 #include <dev/cons.h> 80 #include <dev/ic/z8530reg.h> 81 82 #include "kbd.h" /* NKBD */ 83 #include "zsc.h" /* NZSC */ 84 #define NZS NZSC 85 86 /* Make life easier for the initialized arrays here. */ 87 #if NZS < 2 88 #undef NZS 89 #define NZS 2 90 #endif 91 92 /* 93 * Some warts needed by z8530tty.c - 94 * The default parity REALLY needs to be the same as the PROM uses, 95 * or you can not see messages done with printf during boot-up... 96 */ 97 int zs_def_cflag = (CREAD | CS8 | HUPCL); 98 99 /* 100 * The Sun3 provides a 4.9152 MHz clock to the ZS chips. 101 */ 102 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 103 104 /* 105 * Define interrupt levels. 106 */ 107 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 108 #define ZSSOFT_PRI _IPL_SOFT_LEVEL3 /* Want tty pri (4) but this is OK. */ 109 110 #define ZS_DELAY() delay(2) 111 112 /* The layout of this is hardware-dependent (padding, order). */ 113 struct zschan { 114 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 115 u_char zc_xxx0; 116 volatile u_char zc_data; /* data */ 117 u_char zc_xxx1; 118 }; 119 struct zsdevice { 120 /* Yes, they are backwards. */ 121 struct zschan zs_chan_b; 122 struct zschan zs_chan_a; 123 }; 124 125 126 /* Default OBIO addresses. */ 127 static int zs_physaddr[NZS] = { 128 OBIO_ZS_KBD_MS, 129 OBIO_ZS_TTY_AB }; 130 131 /* Saved PROM mappings */ 132 static struct zsdevice *zsaddr[NZS]; 133 134 /* Flags from cninit() */ 135 static int zs_hwflags[NZS][2]; 136 137 /* Default speed for each channel */ 138 static int zs_defspeed[NZS][2] = { 139 { 1200, /* keyboard */ 140 1200 }, /* mouse */ 141 { 9600, /* ttya */ 142 9600 }, /* ttyb */ 143 }; 144 145 static u_char zs_init_reg[16] = { 146 0, /* 0: CMD (reset, etc.) */ 147 0, /* 1: No interrupts yet. */ 148 0x18 + ZSHARD_PRI, /* IVECT */ 149 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 150 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 151 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 152 0, /* 6: TXSYNC/SYNCLO */ 153 0, /* 7: RXSYNC/SYNCHI */ 154 0, /* 8: alias for data port */ 155 ZSWR9_MASTER_IE, 156 0, /*10: Misc. TX/RX control bits */ 157 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 158 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 159 0, /*13: BAUDHI (default=9600) */ 160 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 161 ZSWR15_BREAK_IE, 162 }; 163 164 165 /* Find PROM mappings (for console support). */ 166 void 167 zs_init(void) 168 { 169 vaddr_t va; 170 int i; 171 172 for (i = 0; i < NZS; i++) { 173 if (find_prom_map(zs_physaddr[i], PMAP_OBIO, 174 sizeof(struct zschan), &va) == 0) 175 zsaddr[i] = (void *)va; 176 } 177 } 178 179 struct zschan * 180 zs_get_chan_addr(int zs_unit, int channel) 181 { 182 struct zsdevice *addr; 183 struct zschan *zc; 184 185 if (zs_unit >= NZS) 186 return NULL; 187 addr = zsaddr[zs_unit]; 188 if (addr == NULL) 189 return NULL; 190 if (channel == 0) { 191 zc = &addr->zs_chan_a; 192 } else { 193 zc = &addr->zs_chan_b; 194 } 195 return (zc); 196 } 197 198 199 /**************************************************************** 200 * Autoconfig 201 ****************************************************************/ 202 203 /* Definition of the driver for autoconfig. */ 204 static int zs_match(struct device *, struct cfdata *, void *); 205 static void zs_attach(struct device *, struct device *, void *); 206 static int zs_print(void *, const char *); 207 208 CFATTACH_DECL(zsc, sizeof(struct zsc_softc), 209 zs_match, zs_attach, NULL, NULL); 210 211 extern struct cfdriver zsc_cd; 212 213 static int zshard(void *); 214 static int zs_get_speed(struct zs_chanstate *); 215 216 217 /* 218 * Is the zs chip present? 219 */ 220 static int 221 zs_match(struct device *parent, struct cfdata *cf, void *aux) 222 { 223 struct confargs *ca = aux; 224 int unit; 225 void *va; 226 227 /* 228 * This driver only supports its wired-in mappings, 229 * because the console support depends on those. 230 */ 231 if (ca->ca_paddr == zs_physaddr[0]) { 232 unit = 0; 233 } else if (ca->ca_paddr == zs_physaddr[1]) { 234 unit = 1; 235 } else { 236 return (0); 237 } 238 239 /* Make sure zs_init() found mappings. */ 240 va = zsaddr[unit]; 241 if (va == NULL) 242 return (0); 243 244 /* This returns -1 on a fault (bus error). */ 245 if (peek_byte(va) == -1) 246 return (0); 247 248 /* Default interrupt priority (always splbio==2) */ 249 if (ca->ca_intpri == -1) 250 ca->ca_intpri = ZSHARD_PRI; 251 252 return (1); 253 } 254 255 /* 256 * Attach a found zs. 257 * 258 * Match slave number to zs unit number, so that misconfiguration will 259 * not set up the keyboard as ttya, etc. 260 */ 261 static void 262 zs_attach(struct device *parent, struct device *self, void *aux) 263 { 264 struct zsc_softc *zsc = (void *) self; 265 struct confargs *ca = aux; 266 struct zsc_attach_args zsc_args; 267 volatile struct zschan *zc; 268 struct zs_chanstate *cs; 269 int s, zs_unit, channel; 270 static int didintr; 271 272 zs_unit = device_unit(&zsc->zsc_dev); 273 274 printf(": (softpri %d)\n", ZSSOFT_PRI); 275 276 /* Use the mapping setup by the Sun PROM. */ 277 if (zsaddr[zs_unit] == NULL) 278 panic("zs_attach: zs%d not mapped", zs_unit); 279 280 /* 281 * Initialize software state for each channel. 282 */ 283 for (channel = 0; channel < 2; channel++) { 284 zsc_args.channel = channel; 285 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 286 cs = &zsc->zsc_cs_store[channel]; 287 zsc->zsc_cs[channel] = cs; 288 289 zs_lock_init(cs); 290 cs->cs_channel = channel; 291 cs->cs_private = NULL; 292 cs->cs_ops = &zsops_null; 293 cs->cs_brg_clk = PCLK / 16; 294 295 zc = zs_get_chan_addr(zs_unit, channel); 296 cs->cs_reg_csr = &zc->zc_csr; 297 cs->cs_reg_data = &zc->zc_data; 298 299 memcpy(cs->cs_creg, zs_init_reg, 16); 300 memcpy(cs->cs_preg, zs_init_reg, 16); 301 302 /* XXX: Get these from the EEPROM instead? */ 303 /* XXX: See the mvme167 code. Better. */ 304 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 305 cs->cs_defspeed = zs_get_speed(cs); 306 else 307 cs->cs_defspeed = zs_defspeed[zs_unit][channel]; 308 cs->cs_defcflag = zs_def_cflag; 309 310 /* Make these correspond to cs_defcflag (-crtscts) */ 311 cs->cs_rr0_dcd = ZSRR0_DCD; 312 cs->cs_rr0_cts = 0; 313 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 314 cs->cs_wr5_rts = 0; 315 316 /* 317 * Clear the master interrupt enable. 318 * The INTENA is common to both channels, 319 * so just do it on the A channel. 320 */ 321 if (channel == 0) { 322 zs_write_reg(cs, 9, 0); 323 } 324 325 /* 326 * Look for a child driver for this channel. 327 * The child attach will setup the hardware. 328 */ 329 if (!config_found(self, (void *)&zsc_args, zs_print)) { 330 /* No sub-driver. Just reset it. */ 331 u_char reset = (channel == 0) ? 332 ZSWR9_A_RESET : ZSWR9_B_RESET; 333 s = splhigh(); 334 zs_write_reg(cs, 9, reset); 335 splx(s); 336 } 337 } 338 339 /* 340 * Now safe to install interrupt handlers. Note the arguments 341 * to the interrupt handlers aren't used. Note, we only do this 342 * once since both SCCs interrupt at the same level and vector. 343 */ 344 if (!didintr) { 345 didintr = 1; 346 isr_add_autovect(zshard, NULL, ca->ca_intpri); 347 } 348 zsc->zs_si = softintr_establish(IPL_SOFTSERIAL, 349 (void (*)(void *))zsc_intr_soft, zsc); 350 /* XXX; evcnt_attach() ? */ 351 352 /* 353 * Set the master interrupt enable and interrupt vector. 354 * (common to both channels, do it on A) 355 */ 356 cs = zsc->zsc_cs[0]; 357 s = splhigh(); 358 /* interrupt vector */ 359 zs_write_reg(cs, 2, zs_init_reg[2]); 360 /* master interrupt control (enable) */ 361 zs_write_reg(cs, 9, zs_init_reg[9]); 362 splx(s); 363 364 /* 365 * XXX: L1A hack - We would like to be able to break into 366 * the debugger during the rest of autoconfiguration, so 367 * lower interrupts just enough to let zs interrupts in. 368 * This is done after both zs devices are attached. 369 */ 370 if (zs_unit == 1) { 371 (void)spl5(); /* splzs - 1 */ 372 } 373 } 374 375 static int 376 zs_print(void *aux, const char *name) 377 { 378 struct zsc_attach_args *args = aux; 379 380 if (name != NULL) 381 aprint_normal("%s: ", name); 382 383 if (args->channel != -1) 384 aprint_normal(" channel %d", args->channel); 385 386 return UNCONF; 387 } 388 389 /* 390 * Our ZS chips all share a common, autovectored interrupt, 391 * so we have to look at all of them on each interrupt. 392 */ 393 static int 394 zshard(void *arg) 395 { 396 struct zsc_softc *zsc; 397 int unit, rval, softreq; 398 399 rval = 0; 400 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 401 zsc = zsc_cd.cd_devs[unit]; 402 if (zsc == NULL) 403 continue; 404 rval |= zsc_intr_hard(zsc); 405 softreq = zsc->zsc_cs[0]->cs_softreq; 406 softreq |= zsc->zsc_cs[1]->cs_softreq; 407 if (softreq) 408 softintr_schedule(zsc->zs_si); 409 } 410 411 return (rval); 412 } 413 414 /* 415 * Compute the current baud rate given a ZS channel. 416 */ 417 static int 418 zs_get_speed(struct zs_chanstate *cs) 419 { 420 int tconst; 421 422 tconst = zs_read_reg(cs, 12); 423 tconst |= zs_read_reg(cs, 13) << 8; 424 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 425 } 426 427 /* 428 * MD functions for setting the baud rate and control modes. 429 */ 430 int 431 zs_set_speed(struct zs_chanstate *cs, int bps) 432 { 433 int tconst, real_bps; 434 435 if (bps == 0) 436 return (0); 437 438 #ifdef DIAGNOSTIC 439 if (cs->cs_brg_clk == 0) 440 panic("zs_set_speed"); 441 #endif 442 443 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 444 if (tconst < 0) 445 return (EINVAL); 446 447 /* Convert back to make sure we can do it. */ 448 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 449 450 /* XXX - Allow some tolerance here? */ 451 if (real_bps != bps) 452 return (EINVAL); 453 454 cs->cs_preg[12] = tconst; 455 cs->cs_preg[13] = tconst >> 8; 456 457 /* Caller will stuff the pending registers. */ 458 return (0); 459 } 460 461 int 462 zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */) 463 { 464 int s; 465 466 /* 467 * Output hardware flow control on the chip is horrendous: 468 * if carrier detect drops, the receiver is disabled, and if 469 * CTS drops, the transmitter is stoped IN MID CHARACTER! 470 * Therefore, NEVER set the HFC bit, and instead use the 471 * status interrupt to detect CTS changes. 472 */ 473 s = splzs(); 474 cs->cs_rr0_pps = 0; 475 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 476 cs->cs_rr0_dcd = 0; 477 if ((cflag & MDMBUF) == 0) 478 cs->cs_rr0_pps = ZSRR0_DCD; 479 } else 480 cs->cs_rr0_dcd = ZSRR0_DCD; 481 if ((cflag & CRTSCTS) != 0) { 482 cs->cs_wr5_dtr = ZSWR5_DTR; 483 cs->cs_wr5_rts = ZSWR5_RTS; 484 cs->cs_rr0_cts = ZSRR0_CTS; 485 } else if ((cflag & MDMBUF) != 0) { 486 cs->cs_wr5_dtr = 0; 487 cs->cs_wr5_rts = ZSWR5_DTR; 488 cs->cs_rr0_cts = ZSRR0_DCD; 489 } else { 490 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 491 cs->cs_wr5_rts = 0; 492 cs->cs_rr0_cts = 0; 493 } 494 splx(s); 495 496 /* Caller will stuff the pending registers. */ 497 return (0); 498 } 499 500 501 /* 502 * Read or write the chip with suitable delays. 503 */ 504 505 u_char 506 zs_read_reg(struct zs_chanstate *cs, u_char reg) 507 { 508 u_char val; 509 510 *cs->cs_reg_csr = reg; 511 ZS_DELAY(); 512 val = *cs->cs_reg_csr; 513 ZS_DELAY(); 514 return val; 515 } 516 517 void 518 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val) 519 { 520 *cs->cs_reg_csr = reg; 521 ZS_DELAY(); 522 *cs->cs_reg_csr = val; 523 ZS_DELAY(); 524 } 525 526 u_char 527 zs_read_csr(struct zs_chanstate *cs) 528 { 529 u_char val; 530 531 val = *cs->cs_reg_csr; 532 ZS_DELAY(); 533 return val; 534 } 535 536 void 537 zs_write_csr(struct zs_chanstate *cs, u_char val) 538 { 539 *cs->cs_reg_csr = val; 540 ZS_DELAY(); 541 } 542 543 u_char 544 zs_read_data(struct zs_chanstate *cs) 545 { 546 u_char val; 547 548 val = *cs->cs_reg_data; 549 ZS_DELAY(); 550 return val; 551 } 552 553 void 554 zs_write_data(struct zs_chanstate *cs, u_char val) 555 { 556 *cs->cs_reg_data = val; 557 ZS_DELAY(); 558 } 559 560 /**************************************************************** 561 * Console support functions (Sun3 specific!) 562 * Note: this code is allowed to know about the layout of 563 * the chip registers, and uses that to keep things simple. 564 * XXX - I think I like the mvme167 code better. -gwr 565 ****************************************************************/ 566 567 void *zs_conschan; 568 569 /* 570 * Handle user request to enter kernel debugger. 571 */ 572 void 573 zs_abort(struct zs_chanstate *cs) 574 { 575 volatile struct zschan *zc = zs_conschan; 576 int rr0; 577 578 /* Wait for end of break to avoid PROM abort. */ 579 /* XXX - Limit the wait? */ 580 do { 581 rr0 = zc->zc_csr; 582 ZS_DELAY(); 583 } while (rr0 & ZSRR0_BREAK); 584 585 /* This is always available on the Sun3. */ 586 Debugger(); 587 } 588 589 /* 590 * Polled input char. 591 */ 592 int 593 zs_getc(void *arg) 594 { 595 volatile struct zschan *zc = arg; 596 int s, c, rr0; 597 598 s = splhigh(); 599 /* Wait for a character to arrive. */ 600 do { 601 rr0 = zc->zc_csr; 602 ZS_DELAY(); 603 } while ((rr0 & ZSRR0_RX_READY) == 0); 604 605 c = zc->zc_data; 606 ZS_DELAY(); 607 splx(s); 608 609 /* 610 * This is used by the kd driver to read scan codes, 611 * so don't translate '\r' ==> '\n' here... 612 */ 613 return (c); 614 } 615 616 /* 617 * Polled output char. 618 */ 619 void 620 zs_putc(void *arg, int c) 621 { 622 volatile struct zschan *zc = arg; 623 int s, rr0; 624 625 s = splhigh(); 626 /* Wait for transmitter to become ready. */ 627 do { 628 rr0 = zc->zc_csr; 629 ZS_DELAY(); 630 } while ((rr0 & ZSRR0_TX_READY) == 0); 631 632 zc->zc_data = c; 633 ZS_DELAY(); 634 splx(s); 635 } 636 637 /*****************************************************************/ 638 639 static void zscninit(struct consdev *); 640 static int zscngetc(dev_t); 641 static void zscnputc(dev_t, int); 642 643 /* 644 * Console table shared by ttya, ttyb 645 */ 646 struct consdev consdev_tty = { 647 nullcnprobe, 648 zscninit, 649 zscngetc, 650 zscnputc, 651 nullcnpollc, 652 NULL, 653 }; 654 655 static void 656 zscninit(struct consdev *cn) 657 { 658 } 659 660 /* 661 * Polled console input putchar. 662 */ 663 static int 664 zscngetc(dev_t dev) 665 { 666 return (zs_getc(zs_conschan)); 667 } 668 669 /* 670 * Polled console output putchar. 671 */ 672 static void 673 zscnputc(dev_t dev, int c) 674 { 675 zs_putc(zs_conschan, c); 676 } 677 678 /*****************************************************************/ 679 680 static void prom_cninit(struct consdev *); 681 static int prom_cngetc(dev_t); 682 static void prom_cnputc(dev_t, int); 683 684 /* 685 * The console is set to this one initially, 686 * which lets us use the PROM until consinit() 687 * is called to select a real console. 688 */ 689 struct consdev consdev_prom = { 690 nullcnprobe, 691 prom_cninit, 692 prom_cngetc, 693 prom_cnputc, 694 nullcnpollc, 695 }; 696 697 /* 698 * The console table pointer is statically initialized 699 * to point to the PROM (output only) table, so that 700 * early calls to printf will work. 701 */ 702 struct consdev *cn_tab = &consdev_prom; 703 704 void 705 nullcnprobe(struct consdev *cn) 706 { 707 } 708 709 static void 710 prom_cninit(struct consdev *cn) 711 { 712 } 713 714 /* 715 * PROM console input putchar. 716 * (dummy - this is output only) 717 */ 718 static int 719 prom_cngetc(dev_t dev) 720 { 721 return (0); 722 } 723 724 /* 725 * PROM console output putchar. 726 */ 727 static void 728 prom_cnputc(dev_t dev, int c) 729 { 730 (*romVectorPtr->putChar)(c & 0x7f); 731 } 732 733 /*****************************************************************/ 734 735 extern struct consdev consdev_kd; 736 737 static struct { 738 int zs_unit, channel; 739 } zstty_conf[NZS*2] = { 740 /* XXX: knowledge from the config file here... */ 741 { 1, 0 }, /* ttya */ 742 { 1, 1 }, /* ttyb */ 743 { 0, 0 }, /* ttyc */ 744 { 0, 1 }, /* ttyd */ 745 }; 746 747 static const char *prom_inSrc_name[] = { 748 "keyboard/display", 749 "ttya", "ttyb", 750 "ttyc", "ttyd" }; 751 752 /* 753 * This function replaces sys/dev/cninit.c 754 * Determine which device is the console using 755 * the PROM "input source" and "output sink". 756 */ 757 void 758 cninit(void) 759 { 760 struct sunromvec *v; 761 struct zschan *zc; 762 struct consdev *cn; 763 int channel, zs_unit, zstty_unit; 764 u_char inSource, outSink; 765 extern const struct cdevsw zstty_cdevsw; 766 767 /* Get the zs driver ready for console duty. */ 768 zs_init(); 769 770 v = romVectorPtr; 771 inSource = *v->inSource; 772 outSink = *v->outSink; 773 if (inSource != outSink) { 774 mon_printf("cninit: mismatched PROM output selector\n"); 775 } 776 777 switch (inSource) { 778 default: 779 mon_printf("cninit: invalid inSource=%d\n", inSource); 780 sunmon_abort(); 781 inSource = 0; 782 /* fall through */ 783 784 case 0: /* keyboard/display */ 785 #if NKBD > 0 786 zs_unit = 0; 787 channel = 0; 788 cn = &consdev_kd; 789 /* Set cn_dev, cn_pri in kd.c */ 790 break; 791 #else /* NKBD */ 792 mon_printf("cninit: kdb/display not configured\n"); 793 sunmon_abort(); 794 inSource = 1; 795 /* fall through */ 796 #endif /* NKBD */ 797 798 case 1: /* ttya */ 799 case 2: /* ttyb */ 800 case 3: /* ttyc (rewired keyboard connector) */ 801 case 4: /* ttyd (rewired mouse connector) */ 802 zstty_unit = inSource - 1; 803 zs_unit = zstty_conf[zstty_unit].zs_unit; 804 channel = zstty_conf[zstty_unit].channel; 805 cn = &consdev_tty; 806 cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 807 zstty_unit); 808 cn->cn_pri = CN_REMOTE; 809 break; 810 811 } 812 /* Now that inSource has been validated, print it. */ 813 mon_printf("console is %s\n", prom_inSrc_name[inSource]); 814 815 zc = zs_get_chan_addr(zs_unit, channel); 816 if (zc == NULL) { 817 mon_printf("cninit: zs not mapped.\n"); 818 return; 819 } 820 zs_conschan = zc; 821 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE; 822 cn_tab = cn; 823 (*cn->cn_init)(cn); 824 #ifdef KGDB 825 zs_kgdb_init(); 826 #endif 827 } 828