1 /* $NetBSD: zs.c,v 1.53 1998/02/05 04:56:47 gwr Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/conf.h> 50 #include <sys/device.h> 51 #include <sys/file.h> 52 #include <sys/ioctl.h> 53 #include <sys/kernel.h> 54 #include <sys/proc.h> 55 #include <sys/tty.h> 56 #include <sys/time.h> 57 #include <sys/syslog.h> 58 59 #include <machine/autoconf.h> 60 #include <machine/cpu.h> 61 #include <machine/mon.h> 62 #include <machine/z8530var.h> 63 64 #include <sun3/sun3/machdep.h> 65 #ifdef _SUN3X_ 66 #include <sun3/sun3x/obio.h> 67 #else 68 #include <sun3/sun3/obio.h> 69 #endif 70 #include <sun3/dev/zs_cons.h> 71 72 #include <dev/cons.h> 73 #include <dev/ic/z8530reg.h> 74 75 #include "kbd.h" /* NKBD */ 76 #include "zsc.h" /* NZSC */ 77 #define NZS NZSC 78 79 /* Make life easier for the initialized arrays here. */ 80 #if NZS < 2 81 #undef NZS 82 #define NZS 2 83 #endif 84 85 extern void Debugger __P((void)); 86 87 /* 88 * Some warts needed by z8530tty.c - 89 * The default parity REALLY needs to be the same as the PROM uses, 90 * or you can not see messages done with printf during boot-up... 91 */ 92 int zs_def_cflag = (CREAD | CS8 | HUPCL); 93 int zs_major = 12; 94 95 /* 96 * The Sun3 provides a 4.9152 MHz clock to the ZS chips. 97 */ 98 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 99 100 /* 101 * Define interrupt levels. 102 */ 103 #define ZSHARD_PRI 6 /* Wired on the CPU board... */ 104 #define ZSSOFT_PRI 3 /* Want tty pri (4) but this is OK. */ 105 106 #define ZS_DELAY() delay(2) 107 108 /* The layout of this is hardware-dependent (padding, order). */ 109 struct zschan { 110 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 111 u_char zc_xxx0; 112 volatile u_char zc_data; /* data */ 113 u_char zc_xxx1; 114 }; 115 struct zsdevice { 116 /* Yes, they are backwards. */ 117 struct zschan zs_chan_b; 118 struct zschan zs_chan_a; 119 }; 120 121 122 /* Default OBIO addresses. */ 123 static int zs_physaddr[NZS] = { 124 OBIO_ZS_KBD_MS, 125 OBIO_ZS_TTY_AB }; 126 127 /* Saved PROM mappings */ 128 static struct zsdevice *zsaddr[NZS]; 129 130 /* Flags from cninit() */ 131 static int zs_hwflags[NZS][2]; 132 133 /* Default speed for each channel */ 134 static int zs_defspeed[NZS][2] = { 135 { 1200, /* keyboard */ 136 1200 }, /* mouse */ 137 { 9600, /* ttya */ 138 9600 }, /* ttyb */ 139 }; 140 141 static u_char zs_init_reg[16] = { 142 0, /* 0: CMD (reset, etc.) */ 143 0, /* 1: No interrupts yet. */ 144 0x18 + ZSHARD_PRI, /* IVECT */ 145 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 146 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 147 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 148 0, /* 6: TXSYNC/SYNCLO */ 149 0, /* 7: RXSYNC/SYNCHI */ 150 0, /* 8: alias for data port */ 151 ZSWR9_MASTER_IE, 152 0, /*10: Misc. TX/RX control bits */ 153 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 154 14, /*12: BAUDLO (default=9600) */ 155 0, /*13: BAUDHI (default=9600) */ 156 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 157 ZSWR15_BREAK_IE | ZSWR15_DCD_IE, 158 }; 159 160 161 /* Find PROM mappings (for console support). */ 162 void 163 zs_init() 164 { 165 int i; 166 167 for (i = 0; i < NZS; i++) { 168 zsaddr[i] = (struct zsdevice *) 169 obio_find_mapping(zs_physaddr[i], sizeof(struct zschan)); 170 } 171 } 172 173 struct zschan * 174 zs_get_chan_addr(zs_unit, channel) 175 int zs_unit, channel; 176 { 177 struct zsdevice *addr; 178 struct zschan *zc; 179 180 if (zs_unit >= NZS) 181 return NULL; 182 addr = zsaddr[zs_unit]; 183 if (addr == NULL) 184 return NULL; 185 if (channel == 0) { 186 zc = &addr->zs_chan_a; 187 } else { 188 zc = &addr->zs_chan_b; 189 } 190 return (zc); 191 } 192 193 194 /**************************************************************** 195 * Autoconfig 196 ****************************************************************/ 197 198 /* Definition of the driver for autoconfig. */ 199 static int zs_match __P((struct device *, struct cfdata *, void *)); 200 static void zs_attach __P((struct device *, struct device *, void *)); 201 static int zs_print __P((void *, const char *name)); 202 203 struct cfattach zsc_ca = { 204 sizeof(struct zsc_softc), zs_match, zs_attach 205 }; 206 207 extern struct cfdriver zsc_cd; 208 209 static int zshard __P((void *)); 210 static int zssoft __P((void *)); 211 static int zs_get_speed __P((struct zs_chanstate *)); 212 213 214 /* 215 * Is the zs chip present? 216 */ 217 static int 218 zs_match(parent, cf, aux) 219 struct device *parent; 220 struct cfdata *cf; 221 void *aux; 222 { 223 struct confargs *ca = aux; 224 int unit = cf->cf_unit; 225 void *va; 226 227 /* 228 * This driver only supports its wired-in mappings, 229 * because the console support depends on those. 230 */ 231 if (ca->ca_paddr != zs_physaddr[unit]) 232 return (0); 233 234 /* Make sure zs_init() found mappings. */ 235 va = zsaddr[unit]; 236 if (va == NULL) 237 return (0); 238 239 /* This returns -1 on a fault (bus error). */ 240 if (peek_byte(va) == -1) 241 return (0); 242 243 /* Default interrupt priority (always splbio==2) */ 244 if (ca->ca_intpri == -1) 245 ca->ca_intpri = ZSHARD_PRI; 246 247 return (1); 248 } 249 250 /* 251 * Attach a found zs. 252 * 253 * Match slave number to zs unit number, so that misconfiguration will 254 * not set up the keyboard as ttya, etc. 255 */ 256 static void 257 zs_attach(parent, self, aux) 258 struct device *parent; 259 struct device *self; 260 void *aux; 261 { 262 struct zsc_softc *zsc = (void *) self; 263 struct confargs *ca = aux; 264 struct zsc_attach_args zsc_args; 265 volatile struct zschan *zc; 266 struct zs_chanstate *cs; 267 int s, zs_unit, channel; 268 static int didintr; 269 270 zs_unit = zsc->zsc_dev.dv_unit; 271 272 printf(": (softpri %d)\n", ZSSOFT_PRI); 273 274 /* Use the mapping setup by the Sun PROM. */ 275 if (zsaddr[zs_unit] == NULL) 276 panic("zs_attach: zs%d not mapped\n", zs_unit); 277 278 /* 279 * Initialize software state for each channel. 280 */ 281 for (channel = 0; channel < 2; channel++) { 282 zsc_args.channel = channel; 283 zsc_args.hwflags = zs_hwflags[zs_unit][channel]; 284 cs = &zsc->zsc_cs_store[channel]; 285 zsc->zsc_cs[channel] = cs; 286 287 cs->cs_channel = channel; 288 cs->cs_private = NULL; 289 cs->cs_ops = &zsops_null; 290 cs->cs_brg_clk = PCLK / 16; 291 292 zc = zs_get_chan_addr(zs_unit, channel); 293 cs->cs_reg_csr = &zc->zc_csr; 294 cs->cs_reg_data = &zc->zc_data; 295 296 bcopy(zs_init_reg, cs->cs_creg, 16); 297 bcopy(zs_init_reg, cs->cs_preg, 16); 298 299 /* XXX: Get these from the EEPROM instead? */ 300 /* XXX: See the mvme167 code. Better. */ 301 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) 302 cs->cs_defspeed = zs_get_speed(cs); 303 else 304 cs->cs_defspeed = zs_defspeed[zs_unit][channel]; 305 cs->cs_defcflag = zs_def_cflag; 306 307 /* Make these correspond to cs_defcflag (-crtscts) */ 308 cs->cs_rr0_dcd = ZSRR0_DCD; 309 cs->cs_rr0_cts = 0; 310 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 311 cs->cs_wr5_rts = 0; 312 313 /* 314 * Clear the master interrupt enable. 315 * The INTENA is common to both channels, 316 * so just do it on the A channel. 317 */ 318 if (channel == 0) { 319 zs_write_reg(cs, 9, 0); 320 } 321 322 /* 323 * Look for a child driver for this channel. 324 * The child attach will setup the hardware. 325 */ 326 if (!config_found(self, (void *)&zsc_args, zs_print)) { 327 /* No sub-driver. Just reset it. */ 328 u_char reset = (channel == 0) ? 329 ZSWR9_A_RESET : ZSWR9_B_RESET; 330 s = splhigh(); 331 zs_write_reg(cs, 9, reset); 332 splx(s); 333 } 334 } 335 336 /* 337 * Now safe to install interrupt handlers. Note the arguments 338 * to the interrupt handlers aren't used. Note, we only do this 339 * once since both SCCs interrupt at the same level and vector. 340 */ 341 if (!didintr) { 342 didintr = 1; 343 isr_add_autovect(zssoft, NULL, ZSSOFT_PRI); 344 isr_add_autovect(zshard, NULL, ca->ca_intpri); 345 } 346 /* XXX; evcnt_attach() ? */ 347 348 /* 349 * Set the master interrupt enable and interrupt vector. 350 * (common to both channels, do it on A) 351 */ 352 cs = zsc->zsc_cs[0]; 353 s = splhigh(); 354 /* interrupt vector */ 355 zs_write_reg(cs, 2, zs_init_reg[2]); 356 /* master interrupt control (enable) */ 357 zs_write_reg(cs, 9, zs_init_reg[9]); 358 splx(s); 359 360 /* 361 * XXX: L1A hack - We would like to be able to break into 362 * the debugger during the rest of autoconfiguration, so 363 * lower interrupts just enough to let zs interrupts in. 364 * This is done after both zs devices are attached. 365 */ 366 if (zs_unit == 1) { 367 printf("zsc1: enabling zs interrupts\n"); 368 (void)spl5(); /* splzs - 1 */ 369 } 370 } 371 372 static int 373 zs_print(aux, name) 374 void *aux; 375 const char *name; 376 { 377 struct zsc_attach_args *args = aux; 378 379 if (name != NULL) 380 printf("%s: ", name); 381 382 if (args->channel != -1) 383 printf(" channel %d", args->channel); 384 385 return UNCONF; 386 } 387 388 static volatile int zssoftpending; 389 390 /* 391 * Our ZS chips all share a common, autovectored interrupt, 392 * so we have to look at all of them on each interrupt. 393 */ 394 static int 395 zshard(arg) 396 void *arg; 397 { 398 register struct zsc_softc *zsc; 399 register int unit, rval, softreq; 400 401 rval = softreq = 0; 402 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 403 zsc = zsc_cd.cd_devs[unit]; 404 if (zsc == NULL) 405 continue; 406 rval |= zsc_intr_hard(zsc); 407 softreq |= zsc->zsc_cs[0]->cs_softreq; 408 softreq |= zsc->zsc_cs[1]->cs_softreq; 409 } 410 411 /* We are at splzs here, so no need to lock. */ 412 if (softreq && (zssoftpending == 0)) { 413 zssoftpending = ZSSOFT_PRI; 414 isr_soft_request(ZSSOFT_PRI); 415 } 416 return (rval); 417 } 418 419 /* 420 * Similar scheme as for zshard (look at all of them) 421 */ 422 static int 423 zssoft(arg) 424 void *arg; 425 { 426 register struct zsc_softc *zsc; 427 register int s, unit; 428 429 /* This is not the only ISR on this IPL. */ 430 if (zssoftpending == 0) 431 return (0); 432 433 /* 434 * The soft intr. bit will be set by zshard only if 435 * the variable zssoftpending is zero. The order of 436 * these next two statements prevents our clearing 437 * the soft intr bit just after zshard has set it. 438 */ 439 isr_soft_clear(ZSSOFT_PRI); 440 zssoftpending = 0; 441 442 /* Make sure we call the tty layer at spltty. */ 443 s = spltty(); 444 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) { 445 zsc = zsc_cd.cd_devs[unit]; 446 if (zsc == NULL) 447 continue; 448 (void) zsc_intr_soft(zsc); 449 } 450 splx(s); 451 return (1); 452 } 453 454 455 /* 456 * Compute the current baud rate given a ZS channel. 457 */ 458 static int 459 zs_get_speed(cs) 460 struct zs_chanstate *cs; 461 { 462 int tconst; 463 464 tconst = zs_read_reg(cs, 12); 465 tconst |= zs_read_reg(cs, 13) << 8; 466 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 467 } 468 469 /* 470 * MD functions for setting the baud rate and control modes. 471 */ 472 int 473 zs_set_speed(cs, bps) 474 struct zs_chanstate *cs; 475 int bps; /* bits per second */ 476 { 477 int tconst, real_bps; 478 479 if (bps == 0) 480 return (0); 481 482 #ifdef DIAGNOSTIC 483 if (cs->cs_brg_clk == 0) 484 panic("zs_set_speed"); 485 #endif 486 487 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 488 if (tconst < 0) 489 return (EINVAL); 490 491 /* Convert back to make sure we can do it. */ 492 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 493 494 /* XXX - Allow some tolerance here? */ 495 if (real_bps != bps) 496 return (EINVAL); 497 498 cs->cs_preg[12] = tconst; 499 cs->cs_preg[13] = tconst >> 8; 500 501 /* Caller will stuff the pending registers. */ 502 return (0); 503 } 504 505 int 506 zs_set_modes(cs, cflag) 507 struct zs_chanstate *cs; 508 int cflag; /* bits per second */ 509 { 510 int s; 511 512 /* 513 * Output hardware flow control on the chip is horrendous: 514 * if carrier detect drops, the receiver is disabled, and if 515 * CTS drops, the transmitter is stoped IN MID CHARACTER! 516 * Therefore, NEVER set the HFC bit, and instead use the 517 * status interrupt to detect CTS changes. 518 */ 519 s = splzs(); 520 if ((cflag & (CLOCAL | MDMBUF)) != 0) 521 cs->cs_rr0_dcd = 0; 522 else 523 cs->cs_rr0_dcd = ZSRR0_DCD; 524 if ((cflag & CRTSCTS) != 0) { 525 cs->cs_wr5_dtr = ZSWR5_DTR; 526 cs->cs_wr5_rts = ZSWR5_RTS; 527 cs->cs_rr0_cts = ZSRR0_CTS; 528 } else if ((cflag & MDMBUF) != 0) { 529 cs->cs_wr5_dtr = 0; 530 cs->cs_wr5_rts = ZSWR5_DTR; 531 cs->cs_rr0_cts = ZSRR0_DCD; 532 } else { 533 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 534 cs->cs_wr5_rts = 0; 535 cs->cs_rr0_cts = 0; 536 } 537 splx(s); 538 539 /* Caller will stuff the pending registers. */ 540 return (0); 541 } 542 543 544 /* 545 * Read or write the chip with suitable delays. 546 */ 547 548 u_char 549 zs_read_reg(cs, reg) 550 struct zs_chanstate *cs; 551 u_char reg; 552 { 553 u_char val; 554 555 *cs->cs_reg_csr = reg; 556 ZS_DELAY(); 557 val = *cs->cs_reg_csr; 558 ZS_DELAY(); 559 return val; 560 } 561 562 void 563 zs_write_reg(cs, reg, val) 564 struct zs_chanstate *cs; 565 u_char reg, val; 566 { 567 *cs->cs_reg_csr = reg; 568 ZS_DELAY(); 569 *cs->cs_reg_csr = val; 570 ZS_DELAY(); 571 } 572 573 u_char zs_read_csr(cs) 574 struct zs_chanstate *cs; 575 { 576 register u_char val; 577 578 val = *cs->cs_reg_csr; 579 ZS_DELAY(); 580 return val; 581 } 582 583 void zs_write_csr(cs, val) 584 struct zs_chanstate *cs; 585 u_char val; 586 { 587 *cs->cs_reg_csr = val; 588 ZS_DELAY(); 589 } 590 591 u_char zs_read_data(cs) 592 struct zs_chanstate *cs; 593 { 594 register u_char val; 595 596 val = *cs->cs_reg_data; 597 ZS_DELAY(); 598 return val; 599 } 600 601 void zs_write_data(cs, val) 602 struct zs_chanstate *cs; 603 u_char val; 604 { 605 *cs->cs_reg_data = val; 606 ZS_DELAY(); 607 } 608 609 /**************************************************************** 610 * Console support functions (Sun3 specific!) 611 * Note: this code is allowed to know about the layout of 612 * the chip registers, and uses that to keep things simple. 613 * XXX - I think I like the mvme167 code better. -gwr 614 ****************************************************************/ 615 616 void *zs_conschan; 617 618 /* 619 * Handle user request to enter kernel debugger. 620 */ 621 void 622 zs_abort(cs) 623 struct zs_chanstate *cs; 624 { 625 register volatile struct zschan *zc = zs_conschan; 626 int rr0; 627 628 /* Wait for end of break to avoid PROM abort. */ 629 /* XXX - Limit the wait? */ 630 do { 631 rr0 = zc->zc_csr; 632 ZS_DELAY(); 633 } while (rr0 & ZSRR0_BREAK); 634 635 /* This is always available on the Sun3. */ 636 Debugger(); 637 } 638 639 /* 640 * Polled input char. 641 */ 642 int 643 zs_getc(arg) 644 void *arg; 645 { 646 register volatile struct zschan *zc = arg; 647 register int s, c, rr0; 648 649 s = splhigh(); 650 /* Wait for a character to arrive. */ 651 do { 652 rr0 = zc->zc_csr; 653 ZS_DELAY(); 654 } while ((rr0 & ZSRR0_RX_READY) == 0); 655 656 c = zc->zc_data; 657 ZS_DELAY(); 658 splx(s); 659 660 /* 661 * This is used by the kd driver to read scan codes, 662 * so don't translate '\r' ==> '\n' here... 663 */ 664 return (c); 665 } 666 667 /* 668 * Polled output char. 669 */ 670 void 671 zs_putc(arg, c) 672 void *arg; 673 int c; 674 { 675 register volatile struct zschan *zc = arg; 676 register int s, rr0; 677 678 s = splhigh(); 679 /* Wait for transmitter to become ready. */ 680 do { 681 rr0 = zc->zc_csr; 682 ZS_DELAY(); 683 } while ((rr0 & ZSRR0_TX_READY) == 0); 684 685 zc->zc_data = c; 686 ZS_DELAY(); 687 splx(s); 688 } 689 690 /*****************************************************************/ 691 692 static void zscninit __P((struct consdev *)); 693 static int zscngetc __P((dev_t)); 694 static void zscnputc __P((dev_t, int)); 695 696 /* 697 * Console table shared by ttya, ttyb 698 */ 699 struct consdev consdev_tty = { 700 nullcnprobe, 701 zscninit, 702 zscngetc, 703 zscnputc, 704 nullcnpollc, 705 }; 706 707 static void 708 zscninit(cn) 709 struct consdev *cn; 710 { 711 } 712 713 /* 714 * Polled console input putchar. 715 */ 716 static int 717 zscngetc(dev) 718 dev_t dev; 719 { 720 return (zs_getc(zs_conschan)); 721 } 722 723 /* 724 * Polled console output putchar. 725 */ 726 static void 727 zscnputc(dev, c) 728 dev_t dev; 729 int c; 730 { 731 zs_putc(zs_conschan, c); 732 } 733 734 /*****************************************************************/ 735 736 static void prom_cninit __P((struct consdev *)); 737 static int prom_cngetc __P((dev_t)); 738 static void prom_cnputc __P((dev_t, int)); 739 740 /* 741 * The console is set to this one initially, 742 * which lets us use the PROM until consinit() 743 * is called to select a real console. 744 */ 745 struct consdev consdev_prom = { 746 nullcnprobe, 747 prom_cninit, 748 prom_cngetc, 749 prom_cnputc, 750 nullcnpollc, 751 }; 752 753 /* 754 * The console table pointer is statically initialized 755 * to point to the PROM (output only) table, so that 756 * early calls to printf will work. 757 */ 758 struct consdev *cn_tab = &consdev_prom; 759 760 void 761 nullcnprobe(cn) 762 struct consdev *cn; 763 { 764 } 765 766 static void 767 prom_cninit(cn) 768 struct consdev *cn; 769 { 770 } 771 772 /* 773 * PROM console input putchar. 774 * (dummy - this is output only) 775 */ 776 static int 777 prom_cngetc(dev) 778 dev_t dev; 779 { 780 return (0); 781 } 782 783 /* 784 * PROM console output putchar. 785 */ 786 static void 787 prom_cnputc(dev, c) 788 dev_t dev; 789 int c; 790 { 791 (*romVectorPtr->putChar)(c & 0x7f); 792 } 793 794 /*****************************************************************/ 795 796 extern struct consdev consdev_kd; 797 798 static struct { 799 int zs_unit, channel; 800 } zstty_conf[NZS*2] = { 801 /* XXX: knowledge from the config file here... */ 802 { 1, 0 }, /* ttya */ 803 { 1, 1 }, /* ttyb */ 804 { 0, 0 }, /* ttyc */ 805 { 0, 1 }, /* ttyd */ 806 }; 807 808 static char *prom_inSrc_name[] = { 809 "keyboard/display", 810 "ttya", "ttyb", 811 "ttyc", "ttyd" }; 812 813 /* 814 * This function replaces sys/dev/cninit.c 815 * Determine which device is the console using 816 * the PROM "input source" and "output sink". 817 */ 818 void 819 cninit() 820 { 821 struct sunromvec *v; 822 struct zschan *zc; 823 struct consdev *cn; 824 int channel, zs_unit, zstty_unit; 825 u_char inSource, outSink; 826 827 /* Get the zs driver ready for console duty. */ 828 zs_init(); 829 830 v = romVectorPtr; 831 inSource = *v->inSource; 832 outSink = *v->outSink; 833 if (inSource != outSink) { 834 mon_printf("cninit: mismatched PROM output selector\n"); 835 } 836 837 switch (inSource) { 838 default: 839 mon_printf("cninit: invalid inSource=%d\n", inSource); 840 sunmon_abort(); 841 inSource = 0; 842 /* fall through */ 843 844 case 0: /* keyboard/display */ 845 #if NKBD > 0 846 zs_unit = 0; 847 channel = 0; 848 cn = &consdev_kd; 849 /* Set cn_dev, cn_pri in kd.c */ 850 break; 851 #else /* NKBD */ 852 mon_printf("cninit: kdb/display not configured\n"); 853 sunmon_abort(); 854 inSource = 1; 855 /* fall through */ 856 #endif /* NKBD */ 857 858 case 1: /* ttya */ 859 case 2: /* ttyb */ 860 case 3: /* ttyc (rewired keyboard connector) */ 861 case 4: /* ttyd (rewired mouse connector) */ 862 zstty_unit = inSource - 1; 863 zs_unit = zstty_conf[zstty_unit].zs_unit; 864 channel = zstty_conf[zstty_unit].channel; 865 cn = &consdev_tty; 866 cn->cn_dev = makedev(zs_major, zstty_unit); 867 cn->cn_pri = CN_REMOTE; 868 break; 869 870 } 871 /* Now that inSource has been validated, print it. */ 872 mon_printf("console is %s\n", prom_inSrc_name[inSource]); 873 874 zc = zs_get_chan_addr(zs_unit, channel); 875 if (zc == NULL) { 876 mon_printf("cninit: zs not mapped.\n"); 877 return; 878 } 879 zs_conschan = zc; 880 zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE; 881 cn_tab = cn; 882 (*cn->cn_init)(cn); 883 #ifdef KGDB 884 zs_kgdb_init(); 885 #endif 886 } 887