xref: /netbsd-src/sys/arch/sun3/dev/zs.c (revision 2a399c6883d870daece976daec6ffa7bb7f934ce)
1 /*	$NetBSD: zs.c,v 1.51 1997/11/02 08:05:16 mycroft Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/conf.h>
50 #include <sys/device.h>
51 #include <sys/file.h>
52 #include <sys/ioctl.h>
53 #include <sys/kernel.h>
54 #include <sys/proc.h>
55 #include <sys/tty.h>
56 #include <sys/time.h>
57 #include <sys/syslog.h>
58 
59 #include <machine/autoconf.h>
60 #include <machine/cpu.h>
61 #include <machine/obio.h>
62 #include <machine/machdep.h>
63 #include <machine/mon.h>
64 #include <machine/z8530var.h>
65 
66 #include <dev/cons.h>
67 #include <dev/ic/z8530reg.h>
68 
69 #include <sun3/dev/zs_cons.h>
70 
71 #include "kbd.h"	/* NKBD */
72 #include "zsc.h"	/* NZSC */
73 #define NZS NZSC
74 
75 /* Make life easier for the initialized arrays here. */
76 #if NZS < 2
77 #undef  NZS
78 #define NZS 2
79 #endif
80 
81 extern void Debugger __P((void));
82 
83 /*
84  * Some warts needed by z8530tty.c -
85  * The default parity REALLY needs to be the same as the PROM uses,
86  * or you can not see messages done with printf during boot-up...
87  */
88 int zs_def_cflag = (CREAD | CS8 | HUPCL);
89 int zs_major = 12;
90 
91 /*
92  * The Sun3 provides a 4.9152 MHz clock to the ZS chips.
93  */
94 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
95 
96 /*
97  * Define interrupt levels.
98  */
99 #define ZSHARD_PRI	6	/* Wired on the CPU board... */
100 #define ZSSOFT_PRI	3	/* Want tty pri (4) but this is OK. */
101 
102 #define ZS_DELAY()			delay(2)
103 
104 /* The layout of this is hardware-dependent (padding, order). */
105 struct zschan {
106 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
107 	u_char		zc_xxx0;
108 	volatile u_char	zc_data;	/* data */
109 	u_char		zc_xxx1;
110 };
111 struct zsdevice {
112 	/* Yes, they are backwards. */
113 	struct	zschan zs_chan_b;
114 	struct	zschan zs_chan_a;
115 };
116 
117 
118 /* Default OBIO addresses. */
119 static int zs_physaddr[NZS] = {
120 	OBIO_ZS_KBD_MS,
121 	OBIO_ZS_TTY_AB };
122 
123 /* Saved PROM mappings */
124 static struct zsdevice *zsaddr[NZS];
125 
126 /* Flags from cninit() */
127 static int zs_hwflags[NZS][2];
128 
129 /* Default speed for each channel */
130 static int zs_defspeed[NZS][2] = {
131 	{ 1200, 	/* keyboard */
132 	  1200 },	/* mouse */
133 	{ 9600, 	/* ttya */
134 	  9600 },	/* ttyb */
135 };
136 
137 static u_char zs_init_reg[16] = {
138 	0,	/* 0: CMD (reset, etc.) */
139 	0,	/* 1: No interrupts yet. */
140 	0x18 + ZSHARD_PRI,	/* IVECT */
141 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
142 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
143 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
144 	0,	/* 6: TXSYNC/SYNCLO */
145 	0,	/* 7: RXSYNC/SYNCHI */
146 	0,	/* 8: alias for data port */
147 	ZSWR9_MASTER_IE,
148 	0,	/*10: Misc. TX/RX control bits */
149 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
150 	14,	/*12: BAUDLO (default=9600) */
151 	0,	/*13: BAUDHI (default=9600) */
152 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
153 	ZSWR15_BREAK_IE | ZSWR15_DCD_IE,
154 };
155 
156 
157 /* Find PROM mappings (for console support). */
158 void
159 zs_init()
160 {
161 	int i;
162 
163 	for (i = 0; i < NZS; i++) {
164 		zsaddr[i] = (struct zsdevice *)
165 			obio_find_mapping(zs_physaddr[i], sizeof(struct zschan));
166 	}
167 }
168 
169 struct zschan *
170 zs_get_chan_addr(zs_unit, channel)
171 	int zs_unit, channel;
172 {
173 	struct zsdevice *addr;
174 	struct zschan *zc;
175 
176 	if (zs_unit >= NZS)
177 		return NULL;
178 	addr = zsaddr[zs_unit];
179 	if (addr == NULL)
180 		return NULL;
181 	if (channel == 0) {
182 		zc = &addr->zs_chan_a;
183 	} else {
184 		zc = &addr->zs_chan_b;
185 	}
186 	return (zc);
187 }
188 
189 
190 /****************************************************************
191  * Autoconfig
192  ****************************************************************/
193 
194 /* Definition of the driver for autoconfig. */
195 static int	zs_match __P((struct device *, struct cfdata *, void *));
196 static void	zs_attach __P((struct device *, struct device *, void *));
197 static int  zs_print __P((void *, const char *name));
198 
199 struct cfattach zsc_ca = {
200 	sizeof(struct zsc_softc), zs_match, zs_attach
201 };
202 
203 struct cfdriver zsc_cd = {
204 	NULL, "zsc", DV_DULL
205 };
206 
207 static int zshard __P((void *));
208 static int zssoft __P((void *));
209 static int zs_get_speed __P((struct zs_chanstate *));
210 
211 
212 /*
213  * Is the zs chip present?
214  */
215 static int
216 zs_match(parent, cf, aux)
217 	struct device *parent;
218 	struct cfdata *cf;
219 	void *aux;
220 {
221 	struct confargs *ca = aux;
222 	int unit = cf->cf_unit;
223 	void *va;
224 
225 	/*
226 	 * This driver only supports its wired-in mappings,
227 	 * because the console support depends on those.
228 	 */
229 	if (ca->ca_paddr != zs_physaddr[unit])
230 		return (0);
231 
232 	/* Make sure zs_init() found mappings. */
233 	va = zsaddr[unit];
234 	if (va == NULL)
235 		return (0);
236 
237 	/* This returns -1 on a fault (bus error). */
238 	if (peek_byte(va) == -1)
239 		return (0);
240 
241 	/* Default interrupt priority (always splbio==2) */
242 	if (ca->ca_intpri == -1)
243 		ca->ca_intpri = ZSHARD_PRI;
244 
245 	return (1);
246 }
247 
248 /*
249  * Attach a found zs.
250  *
251  * Match slave number to zs unit number, so that misconfiguration will
252  * not set up the keyboard as ttya, etc.
253  */
254 static void
255 zs_attach(parent, self, aux)
256 	struct device *parent;
257 	struct device *self;
258 	void *aux;
259 {
260 	struct zsc_softc *zsc = (void *) self;
261 	struct confargs *ca = aux;
262 	struct zsc_attach_args zsc_args;
263 	volatile struct zschan *zc;
264 	struct zs_chanstate *cs;
265 	int s, zs_unit, channel;
266 	static int didintr;
267 
268 	zs_unit = zsc->zsc_dev.dv_unit;
269 
270 	printf(": (softpri %d)\n", ZSSOFT_PRI);
271 
272 	/* Use the mapping setup by the Sun PROM. */
273 	if (zsaddr[zs_unit] == NULL)
274 		panic("zs_attach: zs%d not mapped\n", zs_unit);
275 
276 	/*
277 	 * Initialize software state for each channel.
278 	 */
279 	for (channel = 0; channel < 2; channel++) {
280 		zsc_args.channel = channel;
281 		zsc_args.hwflags = zs_hwflags[zs_unit][channel];
282 		cs = &zsc->zsc_cs_store[channel];
283 		zsc->zsc_cs[channel] = cs;
284 
285 		cs->cs_channel = channel;
286 		cs->cs_private = NULL;
287 		cs->cs_ops = &zsops_null;
288 		cs->cs_brg_clk = PCLK / 16;
289 
290 		zc = zs_get_chan_addr(zs_unit, channel);
291 		cs->cs_reg_csr  = &zc->zc_csr;
292 		cs->cs_reg_data = &zc->zc_data;
293 
294 		bcopy(zs_init_reg, cs->cs_creg, 16);
295 		bcopy(zs_init_reg, cs->cs_preg, 16);
296 
297 		/* XXX: Get these from the EEPROM instead? */
298 		/* XXX: See the mvme167 code.  Better. */
299 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
300 			cs->cs_defspeed = zs_get_speed(cs);
301 		else
302 			cs->cs_defspeed = zs_defspeed[zs_unit][channel];
303 		cs->cs_defcflag = zs_def_cflag;
304 
305 		/* Make these correspond to cs_defcflag (-crtscts) */
306 		cs->cs_rr0_dcd = ZSRR0_DCD;
307 		cs->cs_rr0_cts = 0;
308 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
309 		cs->cs_wr5_rts = 0;
310 
311 		/*
312 		 * Clear the master interrupt enable.
313 		 * The INTENA is common to both channels,
314 		 * so just do it on the A channel.
315 		 */
316 		if (channel == 0) {
317 			zs_write_reg(cs, 9, 0);
318 		}
319 
320 		/*
321 		 * Look for a child driver for this channel.
322 		 * The child attach will setup the hardware.
323 		 */
324 		if (!config_found(self, (void *)&zsc_args, zs_print)) {
325 			/* No sub-driver.  Just reset it. */
326 			u_char reset = (channel == 0) ?
327 				ZSWR9_A_RESET : ZSWR9_B_RESET;
328 			s = splhigh();
329 			zs_write_reg(cs,  9, reset);
330 			splx(s);
331 		}
332 	}
333 
334 	/*
335 	 * Now safe to install interrupt handlers.  Note the arguments
336 	 * to the interrupt handlers aren't used.  Note, we only do this
337 	 * once since both SCCs interrupt at the same level and vector.
338 	 */
339 	if (!didintr) {
340 		didintr = 1;
341 		isr_add_autovect(zssoft, NULL, ZSSOFT_PRI);
342 		isr_add_autovect(zshard, NULL, ca->ca_intpri);
343 	}
344 	/* XXX; evcnt_attach() ? */
345 
346 	/*
347 	 * Set the master interrupt enable and interrupt vector.
348 	 * (common to both channels, do it on A)
349 	 */
350 	cs = zsc->zsc_cs[0];
351 	s = splhigh();
352 	/* interrupt vector */
353 	zs_write_reg(cs, 2, zs_init_reg[2]);
354 	/* master interrupt control (enable) */
355 	zs_write_reg(cs, 9, zs_init_reg[9]);
356 	splx(s);
357 
358 	/*
359 	 * XXX: L1A hack - We would like to be able to break into
360 	 * the debugger during the rest of autoconfiguration, so
361 	 * lower interrupts just enough to let zs interrupts in.
362 	 * This is done after both zs devices are attached.
363 	 */
364 	if (zs_unit == 1) {
365 		printf("zsc1: enabling zs interrupts\n");
366 		(void)spl5(); /* splzs - 1 */
367 	}
368 }
369 
370 static int
371 zs_print(aux, name)
372 	void *aux;
373 	const char *name;
374 {
375 	struct zsc_attach_args *args = aux;
376 
377 	if (name != NULL)
378 		printf("%s: ", name);
379 
380 	if (args->channel != -1)
381 		printf(" channel %d", args->channel);
382 
383 	return UNCONF;
384 }
385 
386 static volatile int zssoftpending;
387 
388 /*
389  * Our ZS chips all share a common, autovectored interrupt,
390  * so we have to look at all of them on each interrupt.
391  */
392 static int
393 zshard(arg)
394 	void *arg;
395 {
396 	register struct zsc_softc *zsc;
397 	register int unit, rval, softreq;
398 
399 	rval = softreq = 0;
400 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
401 		zsc = zsc_cd.cd_devs[unit];
402 		if (zsc == NULL)
403 			continue;
404 		rval |= zsc_intr_hard(zsc);
405 		softreq |= zsc->zsc_cs[0]->cs_softreq;
406 		softreq |= zsc->zsc_cs[1]->cs_softreq;
407 	}
408 
409 	/* We are at splzs here, so no need to lock. */
410 	if (softreq && (zssoftpending == 0)) {
411 		zssoftpending = ZSSOFT_PRI;
412 		isr_soft_request(ZSSOFT_PRI);
413 	}
414 	return (rval);
415 }
416 
417 /*
418  * Similar scheme as for zshard (look at all of them)
419  */
420 static int
421 zssoft(arg)
422 	void *arg;
423 {
424 	register struct zsc_softc *zsc;
425 	register int s, unit;
426 
427 	/* This is not the only ISR on this IPL. */
428 	if (zssoftpending == 0)
429 		return (0);
430 
431 	/*
432 	 * The soft intr. bit will be set by zshard only if
433 	 * the variable zssoftpending is zero.  The order of
434 	 * these next two statements prevents our clearing
435 	 * the soft intr bit just after zshard has set it.
436 	 */
437 	isr_soft_clear(ZSSOFT_PRI);
438 	zssoftpending = 0;
439 
440 	/* Make sure we call the tty layer at spltty. */
441 	s = spltty();
442 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
443 		zsc = zsc_cd.cd_devs[unit];
444 		if (zsc == NULL)
445 			continue;
446 		(void) zsc_intr_soft(zsc);
447 	}
448 	splx(s);
449 	return (1);
450 }
451 
452 
453 /*
454  * Compute the current baud rate given a ZS channel.
455  */
456 static int
457 zs_get_speed(cs)
458 	struct zs_chanstate *cs;
459 {
460 	int tconst;
461 
462 	tconst = zs_read_reg(cs, 12);
463 	tconst |= zs_read_reg(cs, 13) << 8;
464 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
465 }
466 
467 /*
468  * MD functions for setting the baud rate and control modes.
469  */
470 int
471 zs_set_speed(cs, bps)
472 	struct zs_chanstate *cs;
473 	int bps;	/* bits per second */
474 {
475 	int tconst, real_bps;
476 
477 	if (bps == 0)
478 		return (0);
479 
480 #ifdef	DIAGNOSTIC
481 	if (cs->cs_brg_clk == 0)
482 		panic("zs_set_speed");
483 #endif
484 
485 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
486 	if (tconst < 0)
487 		return (EINVAL);
488 
489 	/* Convert back to make sure we can do it. */
490 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
491 
492 	/* XXX - Allow some tolerance here? */
493 	if (real_bps != bps)
494 		return (EINVAL);
495 
496 	cs->cs_preg[12] = tconst;
497 	cs->cs_preg[13] = tconst >> 8;
498 
499 	/* Caller will stuff the pending registers. */
500 	return (0);
501 }
502 
503 int
504 zs_set_modes(cs, cflag)
505 	struct zs_chanstate *cs;
506 	int cflag;	/* bits per second */
507 {
508 	int s;
509 
510 	/*
511 	 * Output hardware flow control on the chip is horrendous:
512 	 * if carrier detect drops, the receiver is disabled, and if
513 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
514 	 * Therefore, NEVER set the HFC bit, and instead use the
515 	 * status interrupt to detect CTS changes.
516 	 */
517 	s = splzs();
518 	if ((cflag & (CLOCAL | MDMBUF)) != 0)
519 		cs->cs_rr0_dcd = 0;
520 	else
521 		cs->cs_rr0_dcd = ZSRR0_DCD;
522 	if ((cflag & CRTSCTS) != 0) {
523 		cs->cs_wr5_dtr = ZSWR5_DTR;
524 		cs->cs_wr5_rts = ZSWR5_RTS;
525 		cs->cs_rr0_cts = ZSRR0_CTS;
526 	} else if ((cflag & MDMBUF) != 0) {
527 		cs->cs_wr5_dtr = 0;
528 		cs->cs_wr5_rts = ZSWR5_DTR;
529 		cs->cs_rr0_cts = ZSRR0_DCD;
530 	} else {
531 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
532 		cs->cs_wr5_rts = 0;
533 		cs->cs_rr0_cts = 0;
534 	}
535 	splx(s);
536 
537 	/* Caller will stuff the pending registers. */
538 	return (0);
539 }
540 
541 
542 /*
543  * Read or write the chip with suitable delays.
544  */
545 
546 u_char
547 zs_read_reg(cs, reg)
548 	struct zs_chanstate *cs;
549 	u_char reg;
550 {
551 	u_char val;
552 
553 	*cs->cs_reg_csr = reg;
554 	ZS_DELAY();
555 	val = *cs->cs_reg_csr;
556 	ZS_DELAY();
557 	return val;
558 }
559 
560 void
561 zs_write_reg(cs, reg, val)
562 	struct zs_chanstate *cs;
563 	u_char reg, val;
564 {
565 	*cs->cs_reg_csr = reg;
566 	ZS_DELAY();
567 	*cs->cs_reg_csr = val;
568 	ZS_DELAY();
569 }
570 
571 u_char zs_read_csr(cs)
572 	struct zs_chanstate *cs;
573 {
574 	register u_char val;
575 
576 	val = *cs->cs_reg_csr;
577 	ZS_DELAY();
578 	return val;
579 }
580 
581 void  zs_write_csr(cs, val)
582 	struct zs_chanstate *cs;
583 	u_char val;
584 {
585 	*cs->cs_reg_csr = val;
586 	ZS_DELAY();
587 }
588 
589 u_char zs_read_data(cs)
590 	struct zs_chanstate *cs;
591 {
592 	register u_char val;
593 
594 	val = *cs->cs_reg_data;
595 	ZS_DELAY();
596 	return val;
597 }
598 
599 void  zs_write_data(cs, val)
600 	struct zs_chanstate *cs;
601 	u_char val;
602 {
603 	*cs->cs_reg_data = val;
604 	ZS_DELAY();
605 }
606 
607 /****************************************************************
608  * Console support functions (Sun3 specific!)
609  * Note: this code is allowed to know about the layout of
610  * the chip registers, and uses that to keep things simple.
611  * XXX - I think I like the mvme167 code better. -gwr
612  ****************************************************************/
613 
614 void *zs_conschan;
615 
616 /*
617  * Handle user request to enter kernel debugger.
618  */
619 void
620 zs_abort(cs)
621 	struct zs_chanstate *cs;
622 {
623 	register volatile struct zschan *zc = zs_conschan;
624 	int rr0;
625 
626 	/* Wait for end of break to avoid PROM abort. */
627 	/* XXX - Limit the wait? */
628 	do {
629 		rr0 = zc->zc_csr;
630 		ZS_DELAY();
631 	} while (rr0 & ZSRR0_BREAK);
632 
633 	/* This is always available on the Sun3. */
634 	Debugger();
635 }
636 
637 /*
638  * Polled input char.
639  */
640 int
641 zs_getc(arg)
642 	void *arg;
643 {
644 	register volatile struct zschan *zc = arg;
645 	register int s, c, rr0;
646 
647 	s = splhigh();
648 	/* Wait for a character to arrive. */
649 	do {
650 		rr0 = zc->zc_csr;
651 		ZS_DELAY();
652 	} while ((rr0 & ZSRR0_RX_READY) == 0);
653 
654 	c = zc->zc_data;
655 	ZS_DELAY();
656 	splx(s);
657 
658 	/*
659 	 * This is used by the kd driver to read scan codes,
660 	 * so don't translate '\r' ==> '\n' here...
661 	 */
662 	return (c);
663 }
664 
665 /*
666  * Polled output char.
667  */
668 void
669 zs_putc(arg, c)
670 	void *arg;
671 	int c;
672 {
673 	register volatile struct zschan *zc = arg;
674 	register int s, rr0;
675 
676 	s = splhigh();
677 	/* Wait for transmitter to become ready. */
678 	do {
679 		rr0 = zc->zc_csr;
680 		ZS_DELAY();
681 	} while ((rr0 & ZSRR0_TX_READY) == 0);
682 
683 	zc->zc_data = c;
684 	ZS_DELAY();
685 	splx(s);
686 }
687 
688 /*****************************************************************/
689 
690 static void zscninit __P((struct consdev *));
691 static int  zscngetc __P((dev_t));
692 static void zscnputc __P((dev_t, int));
693 
694 /*
695  * Console table shared by ttya, ttyb
696  */
697 struct consdev consdev_tty = {
698 	nullcnprobe,
699 	zscninit,
700 	zscngetc,
701 	zscnputc,
702 	nullcnpollc,
703 };
704 
705 static void
706 zscninit(cn)
707 	struct consdev *cn;
708 {
709 }
710 
711 /*
712  * Polled console input putchar.
713  */
714 static int
715 zscngetc(dev)
716 	dev_t dev;
717 {
718 	return (zs_getc(zs_conschan));
719 }
720 
721 /*
722  * Polled console output putchar.
723  */
724 static void
725 zscnputc(dev, c)
726 	dev_t dev;
727 	int c;
728 {
729 	zs_putc(zs_conschan, c);
730 }
731 
732 /*****************************************************************/
733 
734 static void prom_cninit __P((struct consdev *));
735 static int  prom_cngetc __P((dev_t));
736 static void prom_cnputc __P((dev_t, int));
737 
738 /*
739  * The console is set to this one initially,
740  * which lets us use the PROM until consinit()
741  * is called to select a real console.
742  */
743 struct consdev consdev_prom = {
744 	nullcnprobe,
745 	prom_cninit,
746 	prom_cngetc,
747 	prom_cnputc,
748 	nullcnpollc,
749 };
750 
751 /*
752  * The console table pointer is statically initialized
753  * to point to the PROM (output only) table, so that
754  * early calls to printf will work.
755  */
756 struct consdev *cn_tab = &consdev_prom;
757 
758 void
759 nullcnprobe(cn)
760 	struct consdev *cn;
761 {
762 }
763 
764 static void
765 prom_cninit(cn)
766 	struct consdev *cn;
767 {
768 }
769 
770 /*
771  * PROM console input putchar.
772  * (dummy - this is output only)
773  */
774 static int
775 prom_cngetc(dev)
776 	dev_t dev;
777 {
778 	return (0);
779 }
780 
781 /*
782  * PROM console output putchar.
783  */
784 static void
785 prom_cnputc(dev, c)
786 	dev_t dev;
787 	int c;
788 {
789 	(*romVectorPtr->putChar)(c & 0x7f);
790 }
791 
792 /*****************************************************************/
793 
794 extern struct consdev consdev_kd;
795 
796 static struct {
797 	int zs_unit, channel;
798 } zstty_conf[NZS*2] = {
799 	/* XXX: knowledge from the config file here... */
800 	{ 1, 0 },	/* ttya */
801 	{ 1, 1 },	/* ttyb */
802 	{ 0, 0 },	/* ttyc */
803 	{ 0, 1 },	/* ttyd */
804 };
805 
806 static char *prom_inSrc_name[] = {
807 	"keyboard/display",
808 	"ttya", "ttyb",
809 	"ttyc", "ttyd" };
810 
811 /*
812  * This function replaces sys/dev/cninit.c
813  * Determine which device is the console using
814  * the PROM "input source" and "output sink".
815  */
816 void
817 cninit()
818 {
819 	MachMonRomVector *v;
820 	struct zschan *zc;
821 	struct consdev *cn;
822 	int channel, zs_unit, zstty_unit;
823 	u_char inSource, outSink;
824 
825 	v = romVectorPtr;
826 	inSource = *v->inSource;
827 	outSink  = *v->outSink;
828 	if (inSource != outSink) {
829 		mon_printf("cninit: mismatched PROM output selector\n");
830 	}
831 
832 	switch (inSource) {
833 	default:
834 		mon_printf("cninit: invalid inSource=%d\n", inSource);
835 		sunmon_abort();
836 		inSource = 0;
837 		/* fall through */
838 
839 	case 0:	/* keyboard/display */
840 #if NKBD > 0
841 		zs_unit = 0;
842 		channel = 0;
843 		cn = &consdev_kd;
844 		/* Set cn_dev, cn_pri in kd.c */
845 		break;
846 #else	/* NKBD */
847 		mon_printf("cninit: kdb/display not configured\n");
848 		sunmon_abort();
849 		inSource = 1;
850 		/* fall through */
851 #endif	/* NKBD */
852 
853 	case 1:	/* ttya */
854 	case 2:	/* ttyb */
855 	case 3:	/* ttyc (rewired keyboard connector) */
856 	case 4:	/* ttyd (rewired mouse connector)   */
857 		zstty_unit = inSource - 1;
858 		zs_unit = zstty_conf[zstty_unit].zs_unit;
859 		channel = zstty_conf[zstty_unit].channel;
860 		cn = &consdev_tty;
861 		cn->cn_dev = makedev(zs_major, zstty_unit);
862 		cn->cn_pri = CN_REMOTE;
863 		break;
864 
865 	}
866 	/* Now that inSource has been validated, print it. */
867 	mon_printf("console is %s\n", prom_inSrc_name[inSource]);
868 
869 	zc = zs_get_chan_addr(zs_unit, channel);
870 	if (zc == NULL) {
871 		mon_printf("cninit: zs not mapped.\n");
872 		return;
873 	}
874 	zs_conschan = zc;
875 	zs_hwflags[zs_unit][channel] = ZS_HWFLAG_CONSOLE;
876 	cn_tab = cn;
877 	(*cn->cn_init)(cn);
878 #ifdef	KGDB
879 	zs_kgdb_init();
880 #endif
881 }
882