1*39094c9dSchuck /* $NetBSD: xdvar.h,v 1.12 2011/02/01 20:19:32 chuck Exp $ */ 2b3a6cbaeSgwr 3b3a6cbaeSgwr /* 4b3a6cbaeSgwr * Copyright (c) 1995 Charles D. Cranor 5b3a6cbaeSgwr * All rights reserved. 6b3a6cbaeSgwr * 7b3a6cbaeSgwr * Redistribution and use in source and binary forms, with or without 8b3a6cbaeSgwr * modification, are permitted provided that the following conditions 9b3a6cbaeSgwr * are met: 10b3a6cbaeSgwr * 1. Redistributions of source code must retain the above copyright 11b3a6cbaeSgwr * notice, this list of conditions and the following disclaimer. 12b3a6cbaeSgwr * 2. Redistributions in binary form must reproduce the above copyright 13b3a6cbaeSgwr * notice, this list of conditions and the following disclaimer in the 14b3a6cbaeSgwr * documentation and/or other materials provided with the distribution. 15b3a6cbaeSgwr * 16b3a6cbaeSgwr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17b3a6cbaeSgwr * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18b3a6cbaeSgwr * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19b3a6cbaeSgwr * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20b3a6cbaeSgwr * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21b3a6cbaeSgwr * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22b3a6cbaeSgwr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23b3a6cbaeSgwr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24b3a6cbaeSgwr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25b3a6cbaeSgwr * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26b3a6cbaeSgwr */ 27b3a6cbaeSgwr 28b3a6cbaeSgwr /* 29b3a6cbaeSgwr * x d v a r . h 30b3a6cbaeSgwr * 31b3a6cbaeSgwr * this file defines the software structure we use to control the 32b3a6cbaeSgwr * 753/7053. 33b3a6cbaeSgwr * 34*39094c9dSchuck * author: Chuck Cranor <chuck@netbsd> 35b3a6cbaeSgwr */ 36b3a6cbaeSgwr 377b918b40Sthorpej #include <sys/callout.h> 387b918b40Sthorpej 39b3a6cbaeSgwr /* 40b3a6cbaeSgwr * i/o request: wrapper for hardware's iopb data structure 41b3a6cbaeSgwr */ 42b3a6cbaeSgwr 43b3a6cbaeSgwr struct xd_iorq { 44b3a6cbaeSgwr struct xd_iopb *iopb; /* address of matching iopb */ 45b3a6cbaeSgwr struct xdc_softc *xdc; /* who we are working with */ 46b3a6cbaeSgwr struct xd_softc *xd; /* which disk */ 47b3a6cbaeSgwr int ttl; /* time to live */ 48b3a6cbaeSgwr int mode; /* current mode (state+other data) */ 49b3a6cbaeSgwr int tries; /* number of times we have tried it */ 50b3a6cbaeSgwr int errno; /* error number if we fail */ 51b3a6cbaeSgwr int lasterror; /* last error we got */ 52b3a6cbaeSgwr int blockno; /* starting block no for this xfer */ 53b3a6cbaeSgwr int sectcnt; /* number of sectors in xfer */ 54b3a6cbaeSgwr char *dbuf; /* KVA of data buffer (advances) */ 55b3a6cbaeSgwr char *dbufbase; /* base of dbuf */ 56b3a6cbaeSgwr struct buf *buf; /* for NORM */ 57b3a6cbaeSgwr }; 58b3a6cbaeSgwr 59b3a6cbaeSgwr /* 60b3a6cbaeSgwr * state 61b3a6cbaeSgwr */ 62b3a6cbaeSgwr 63b3a6cbaeSgwr #define XD_SUB_MASK 0xf0 /* mask bits for state */ 64b3a6cbaeSgwr #define XD_SUB_FREE 0x00 /* free */ 65b3a6cbaeSgwr #define XD_SUB_NORM 0x10 /* normal I/O request */ 66b3a6cbaeSgwr #define XD_SUB_WAIT 0x20 /* normal I/O request in the 67b3a6cbaeSgwr context of a process */ 68b3a6cbaeSgwr #define XD_SUB_POLL 0x30 /* polled mode */ 69b3a6cbaeSgwr #define XD_SUB_DONE 0x40 /* not active, but can't be free'd yet */ 70b3a6cbaeSgwr #define XD_SUB_NOQ 0x50 /* don't queue, just submit (internal) */ 71b3a6cbaeSgwr 72b3a6cbaeSgwr #define XD_STATE(X) ((X) & XD_SUB_MASK) /* extract state from mode */ 73b3a6cbaeSgwr #define XD_NEWSTATE(OLD, NEW) (((OLD) & ~XD_SUB_MASK) |(NEW)) /* new state */ 74b3a6cbaeSgwr 75b3a6cbaeSgwr 76b3a6cbaeSgwr /* 77b3a6cbaeSgwr * other mode data 78b3a6cbaeSgwr */ 79b3a6cbaeSgwr 80b3a6cbaeSgwr #define XD_MODE_VERBO 0x08 /* print error messages */ 81b3a6cbaeSgwr #define XD_MODE_B144 0x04 /* handling a bad144 sector */ 82b3a6cbaeSgwr 83b3a6cbaeSgwr 84b3a6cbaeSgwr /* 85b3a6cbaeSgwr * software timers and flags 86b3a6cbaeSgwr */ 87b3a6cbaeSgwr 88b3a6cbaeSgwr #define XDC_SUBWAITLIM 4 /* max number of "done" IOPBs there can be 89b3a6cbaeSgwr where we still allow a SUB_WAIT command */ 90b3a6cbaeSgwr #define XDC_TICKCNT (5*hz) /* call xdc_tick on this interval (5 sec) */ 91b3a6cbaeSgwr #define XDC_MAXTTL 2 /* max number of xd ticks to live */ 92b3a6cbaeSgwr #define XDC_NOUNIT (-1) /* for xdcmd: no unit number */ 93b3a6cbaeSgwr 94b3a6cbaeSgwr /* 95b3a6cbaeSgwr * a "xd_softc" structure contains per-disk state info. 96b3a6cbaeSgwr */ 97b3a6cbaeSgwr 98b3a6cbaeSgwr struct xd_softc { 992c5f71ccStsutsui device_t sc_dev; /* device struct, reqd by autoconf */ 1005b39541eSthorpej struct disk sc_dk; /* generic disk info */ 101b3a6cbaeSgwr struct xdc_softc *parent; /* parent */ 102b3a6cbaeSgwr u_short flags; /* flags */ 103b3a6cbaeSgwr u_short state; /* device state */ 104b3a6cbaeSgwr int xd_drive; /* unit number */ 105b3a6cbaeSgwr /* geometry */ 106b3a6cbaeSgwr u_short ncyl, acyl, pcyl; /* number of cyl's */ 107b3a6cbaeSgwr u_short sectpercyl; /* nhead*nsect */ 108b3a6cbaeSgwr u_char nhead; /* number of heads */ 109b3a6cbaeSgwr u_char nsect; /* number of sectors per track */ 110b3a6cbaeSgwr u_char hw_spt; /* as above, but includes spare sectors */ 111b3a6cbaeSgwr struct dkbad dkb; /* bad144 sectors */ 112b3a6cbaeSgwr }; 113b3a6cbaeSgwr 114b3a6cbaeSgwr /* 115b3a6cbaeSgwr * flags 116b3a6cbaeSgwr */ 117b3a6cbaeSgwr 118b3a6cbaeSgwr #define XD_WLABEL 0x0001 /* write label */ 119b3a6cbaeSgwr /* 120b3a6cbaeSgwr * state 121b3a6cbaeSgwr */ 122b3a6cbaeSgwr 123b3a6cbaeSgwr #define XD_DRIVE_UNKNOWN 0 /* never talked to it */ 124b3a6cbaeSgwr #define XD_DRIVE_ATTACHING 1 /* attach in progress */ 125b3a6cbaeSgwr #define XD_DRIVE_NOLABEL 2 /* drive on-line, no label */ 126b3a6cbaeSgwr #define XD_DRIVE_ONLINE 3 /* drive is on-line */ 127b3a6cbaeSgwr 128b3a6cbaeSgwr /* 129b3a6cbaeSgwr * a "xdc_softc" structure contains per-disk-controller state info, 130b3a6cbaeSgwr * including a list of active controllers. 131b3a6cbaeSgwr */ 132b3a6cbaeSgwr 133b3a6cbaeSgwr struct xdc_softc { 1342c5f71ccStsutsui device_t sc_dev; /* device struct, reqd by autoconf */ 135b3a6cbaeSgwr struct evcnt sc_intrcnt; /* event counter (for vmstat -i) */ 136b3a6cbaeSgwr 1377b918b40Sthorpej struct callout sc_tick_ch; 1387b918b40Sthorpej 139b3a6cbaeSgwr struct xdc *xdc; /* vaddr of vme registers */ 140b3a6cbaeSgwr 141faf4390cSgwr int bustype; /* from attach args */ 142b3a6cbaeSgwr int ipl; /* interrupt level */ 143b3a6cbaeSgwr int vector; /* interrupt vector */ 144b3a6cbaeSgwr 145faf4390cSgwr struct xd_softc *sc_drives[XDC_MAXDEV]; /* drives on this controller */ 146faf4390cSgwr 147b3a6cbaeSgwr struct xd_iorq *reqs; /* i/o requests */ 148b3a6cbaeSgwr struct xd_iopb *iopbase; /* iopb base addr (maps iopb->iorq) */ 149b3a6cbaeSgwr struct xd_iopb *dvmaiopb; /* iopb base in DVMA space, not kvm */ 150aec75b1cSyamt struct bufq_state *sc_wq; /* queue'd IOPBs for this controller */ 151b3a6cbaeSgwr char freereq[XDC_MAXIOPB]; /* free list (stack) */ 152b3a6cbaeSgwr char waitq[XDC_MAXIOPB]; /* wait queue */ 1531ea958faSgwr u_char nfree; /* number of iopbs free */ 1541ea958faSgwr u_char nrun; /* number running */ 1551ea958faSgwr u_char nwait; /* number of waiting iopbs */ 1561ea958faSgwr u_char ndone; /* number of done IORQs */ 1571ea958faSgwr u_char waithead; /* head of queue */ 1581ea958faSgwr u_char waitend; /* end of queue */ 159b3a6cbaeSgwr }; 160b3a6cbaeSgwr 161b3a6cbaeSgwr /* 162b3a6cbaeSgwr * reset blast modes 163b3a6cbaeSgwr */ 164b3a6cbaeSgwr 165b3a6cbaeSgwr #define XD_RSET_NONE (-1) /* restart all requests */ 166b3a6cbaeSgwr #define XD_RSET_ALL (-2) /* don't restart anything */ 167