xref: /netbsd-src/sys/arch/sun3/dev/si_vme.c (revision e5548b402ae4c44fb816de42c7bba9581ce23ef5)
1 /*	$NetBSD: si_vme.c,v 1.24 2005/12/11 12:19:20 christos Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Adam Glass, David Jones, and Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * This file contains only the machine-dependent parts of the
41  * Sun3 SCSI driver.  (Autoconfig stuff and DMA functions.)
42  * The machine-independent parts are in ncr5380sbc.c
43  *
44  * Supported hardware includes:
45  * Sun SCSI-3 on OBIO (Sun3/50,Sun3/60)
46  * Sun SCSI-3 on VME (Sun3/160,Sun3/260)
47  *
48  * Could be made to support the Sun3/E if someone wanted to.
49  *
50  * Note:  Both supported variants of the Sun SCSI-3 adapter have
51  * some really unusual "features" for this driver to deal with,
52  * generally related to the DMA engine.  The OBIO variant will
53  * ignore any attempt to write the FIFO count register while the
54  * SCSI bus is in DATA_IN or DATA_OUT phase.  This is dealt with
55  * by setting the FIFO count early in COMMAND or MSG_IN phase.
56  *
57  * The VME variant has a bit to enable or disable the DMA engine,
58  * but that bit also gates the interrupt line from the NCR5380!
59  * Therefore, in order to get any interrupt from the 5380, (i.e.
60  * for reselect) one must clear the DMA engine transfer count and
61  * then enable DMA.  This has the further complication that you
62  * CAN NOT touch the NCR5380 while the DMA enable bit is set, so
63  * we have to turn DMA back off before we even look at the 5380.
64  *
65  * What wonderfully whacky hardware this is!
66  *
67  * Credits, history:
68  *
69  * David Jones wrote the initial version of this module, which
70  * included support for the VME adapter only. (no reselection).
71  *
72  * Gordon Ross added support for the OBIO adapter, and re-worked
73  * both the VME and OBIO code to support disconnect/reselect.
74  * (Required figuring out the hardware "features" noted above.)
75  *
76  * The autoconfiguration boilerplate came from Adam Glass.
77  */
78 
79 /*****************************************************************
80  * VME functions for DMA
81  ****************************************************************/
82 
83 #include <sys/cdefs.h>
84 __KERNEL_RCSID(0, "$NetBSD: si_vme.c,v 1.24 2005/12/11 12:19:20 christos Exp $");
85 
86 #include <sys/param.h>
87 #include <sys/systm.h>
88 #include <sys/errno.h>
89 #include <sys/kernel.h>
90 #include <sys/malloc.h>
91 #include <sys/device.h>
92 #include <sys/buf.h>
93 #include <sys/proc.h>
94 #include <sys/user.h>
95 
96 #include <dev/scsipi/scsi_all.h>
97 #include <dev/scsipi/scsipi_all.h>
98 #include <dev/scsipi/scsipi_debug.h>
99 #include <dev/scsipi/scsiconf.h>
100 
101 #include <machine/autoconf.h>
102 #include <machine/dvma.h>
103 
104 /* #define DEBUG XXX */
105 
106 #include <dev/ic/ncr5380reg.h>
107 #include <dev/ic/ncr5380var.h>
108 
109 #include "sireg.h"
110 #include "sivar.h"
111 
112 void si_vme_dma_setup(struct ncr5380_softc *);
113 void si_vme_dma_start(struct ncr5380_softc *);
114 void si_vme_dma_eop(struct ncr5380_softc *);
115 void si_vme_dma_stop(struct ncr5380_softc *);
116 
117 void si_vme_intr_on (struct ncr5380_softc *);
118 void si_vme_intr_off(struct ncr5380_softc *);
119 
120 static void si_vme_reset(struct ncr5380_softc *);
121 
122 /*
123  * New-style autoconfig attachment
124  */
125 
126 static int	si_vme_match(struct device *, struct cfdata *, void *);
127 static void	si_vme_attach(struct device *, struct device *, void *);
128 
129 CFATTACH_DECL(si_vme, sizeof(struct si_softc),
130     si_vme_match, si_vme_attach, NULL, NULL);
131 
132 /*
133  * Options for disconnect/reselect, DMA, and interrupts.
134  * By default, allow disconnect/reselect on targets 4-6.
135  * Those are normally tapes that really need it enabled.
136  */
137 int si_vme_options = 0x0f;
138 
139 
140 static int
141 si_vme_match(struct device *parent, struct cfdata *cf, void *aux)
142 {
143 	struct confargs *ca = aux;
144 	int probe_addr;
145 
146 	/* No default VME address. */
147 	if (ca->ca_paddr == -1)
148 		return (0);
149 
150 	/* Make sure something is there... */
151 	probe_addr = ca->ca_paddr + 1;
152 	if (bus_peek(ca->ca_bustype, probe_addr, 1) == -1)
153 		return (0);
154 
155 	/*
156 	 * If this is a VME SCSI board, we have to determine whether
157 	 * it is an "sc" (Sun2) or "si" (Sun3) SCSI board.  This can
158 	 * be determined using the fact that the "sc" board occupies
159 	 * 4K bytes in VME space but the "si" board occupies 2K bytes.
160 	 */
161 	/* Note: the "si" board should NOT respond here. */
162 	probe_addr = ca->ca_paddr + 0x801;
163 	if (bus_peek(ca->ca_bustype, probe_addr, 1) != -1) {
164 		/* Something responded at 2K+1.  Maybe an "sc" board? */
165 #ifdef	DEBUG
166 		printf("si_vme_match: May be an `sc' board at pa=0x%x\n",
167 			   ca->ca_paddr);
168 #endif
169 		return(0);
170 	}
171 
172 	/* Default interrupt priority. */
173 	if (ca->ca_intpri == -1)
174 		ca->ca_intpri = 2;
175 
176 	return (1);
177 }
178 
179 static void
180 si_vme_attach(struct device *parent, struct device *self, void *args)
181 {
182 	struct si_softc *sc = (struct si_softc *) self;
183 	struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
184 	struct cfdata *cf = self->dv_cfdata;
185 	struct confargs *ca = args;
186 
187 	/* Get options from config flags if specified. */
188 	if (cf->cf_flags)
189 		sc->sc_options = cf->cf_flags;
190 	else
191 		sc->sc_options = si_vme_options;
192 
193 	printf(": options=0x%x\n", sc->sc_options);
194 
195 	sc->sc_adapter_type = ca->ca_bustype;
196 	sc->sc_regs = (struct si_regs *)
197 		bus_mapin(ca->ca_bustype, ca->ca_paddr,
198 				sizeof(struct si_regs));
199 	sc->sc_adapter_iv_am =
200 		VME_SUPV_DATA_24 | (ca->ca_intvec & 0xFF);
201 
202 	/*
203 	 * MD function pointers used by the MI code.
204 	 */
205 	ncr_sc->sc_pio_out = ncr5380_pio_out;
206 	ncr_sc->sc_pio_in =  ncr5380_pio_in;
207 	ncr_sc->sc_dma_alloc = si_dma_alloc;
208 	ncr_sc->sc_dma_free  = si_dma_free;
209 	ncr_sc->sc_dma_setup = si_vme_dma_setup;
210 	ncr_sc->sc_dma_start = si_vme_dma_start;
211 	ncr_sc->sc_dma_poll  = si_dma_poll;
212 	ncr_sc->sc_dma_eop   = si_vme_dma_eop;
213 	ncr_sc->sc_dma_stop  = si_vme_dma_stop;
214 	ncr_sc->sc_intr_on   = si_vme_intr_on;
215 	ncr_sc->sc_intr_off  = si_vme_intr_off;
216 
217 	/* Attach interrupt handler. */
218 	isr_add_vectored(si_intr, (void *)sc,
219 		ca->ca_intpri, ca->ca_intvec);
220 
221 	/* Reset the hardware. */
222 	si_vme_reset(ncr_sc);
223 
224 	/* Do the common attach stuff. */
225 	si_attach(sc);
226 }
227 
228 static void
229 si_vme_reset(struct ncr5380_softc *ncr_sc)
230 {
231 	struct si_softc *sc = (struct si_softc *)ncr_sc;
232 	volatile struct si_regs *si = sc->sc_regs;
233 
234 #ifdef	DEBUG
235 	if (si_debug) {
236 		printf("si_vme_reset\n");
237 	}
238 #endif
239 
240 	/*
241 	 * The SCSI3 controller has an 8K FIFO to buffer data between the
242 	 * 5380 and the DMA.  Make sure it starts out empty.
243 	 *
244 	 * The reset bits in the CSR are active low.
245 	 */
246 	si->si_csr = 0;
247 	delay(10);
248 	si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN;
249 	delay(10);
250 	si->fifo_count = 0;
251 
252 	/* Make sure the DMA engine is stopped. */
253 	si->dma_addrh = 0;
254 	si->dma_addrl = 0;
255 	si->dma_counth = 0;
256 	si->dma_countl = 0;
257 	si->si_iv_am = sc->sc_adapter_iv_am;
258 	si->fifo_cnt_hi = 0;
259 }
260 
261 /*
262  * This is called when the bus is going idle,
263  * so we want to enable the SBC interrupts.
264  * That is controlled by the DMA enable!
265  * Who would have guessed!
266  * What a NASTY trick!
267  */
268 void
269 si_vme_intr_on(struct ncr5380_softc *ncr_sc)
270 {
271 	struct si_softc *sc = (struct si_softc *)ncr_sc;
272 	volatile struct si_regs *si = sc->sc_regs;
273 
274 	/* receive mode should be safer */
275 	si->si_csr &= ~SI_CSR_SEND;
276 
277 	/* Clear the count so nothing happens. */
278 	si->dma_counth = 0;
279 	si->dma_countl = 0;
280 
281 	/* Clear the start address too. (paranoid?) */
282 	si->dma_addrh = 0;
283 	si->dma_addrl = 0;
284 
285 	/* Finally, enable the DMA engine. */
286 	si->si_csr |= SI_CSR_DMA_EN;
287 }
288 
289 /*
290  * This is called when the bus is idle and we are
291  * about to start playing with the SBC chip.
292  */
293 void
294 si_vme_intr_off(struct ncr5380_softc *ncr_sc)
295 {
296 	struct si_softc *sc = (struct si_softc *)ncr_sc;
297 	volatile struct si_regs *si = sc->sc_regs;
298 
299 	si->si_csr &= ~SI_CSR_DMA_EN;
300 }
301 
302 /*
303  * This function is called during the COMMAND or MSG_IN phase
304  * that precedes a DATA_IN or DATA_OUT phase, in case we need
305  * to setup the DMA engine before the bus enters a DATA phase.
306  *
307  * XXX: The VME adapter appears to suppress SBC interrupts
308  * when the FIFO is not empty or the FIFO count is non-zero!
309  *
310  * On the VME version, setup the start addres, but clear the
311  * count (to make sure it stays idle) and set that later.
312  */
313 void
314 si_vme_dma_setup(struct ncr5380_softc *ncr_sc)
315 {
316 	struct si_softc *sc = (struct si_softc *)ncr_sc;
317 	struct sci_req *sr = ncr_sc->sc_current;
318 	struct si_dma_handle *dh = sr->sr_dma_hand;
319 	volatile struct si_regs *si = sc->sc_regs;
320 	long data_pa;
321 	int xlen;
322 
323 	/*
324 	 * Get the DVMA mapping for this segment.
325 	 * XXX - Should separate allocation and mapin.
326 	 */
327 	data_pa = dvma_kvtopa(dh->dh_dvma, sc->sc_adapter_type);
328 	data_pa += (ncr_sc->sc_dataptr - dh->dh_addr);
329 	if (data_pa & 1)
330 		panic("si_dma_start: bad pa=0x%lx", data_pa);
331 	xlen = ncr_sc->sc_datalen;
332 	xlen &= ~1;				/* XXX: necessary? */
333 	sc->sc_reqlen = xlen; 	/* XXX: or less? */
334 
335 #ifdef	DEBUG
336 	if (si_debug & 2) {
337 		printf("si_dma_setup: dh=%p, pa=0x%lx, xlen=0x%x\n",
338 			   dh, data_pa, xlen);
339 	}
340 #endif
341 
342 	/* Set direction (send/recv) */
343 	if (dh->dh_flags & SIDH_OUT) {
344 		si->si_csr |= SI_CSR_SEND;
345 	} else {
346 		si->si_csr &= ~SI_CSR_SEND;
347 	}
348 
349 	/* Reset the FIFO. */
350 	si->si_csr &= ~SI_CSR_FIFO_RES; 	/* active low */
351 	si->si_csr |= SI_CSR_FIFO_RES;
352 
353 	if (data_pa & 2) {
354 		si->si_csr |= SI_CSR_BPCON;
355 	} else {
356 		si->si_csr &= ~SI_CSR_BPCON;
357 	}
358 
359 	/* Load the start address. */
360 	si->dma_addrh = (ushort)(data_pa >> 16);
361 	si->dma_addrl = (ushort)(data_pa & 0xFFFF);
362 
363 	/*
364 	 * Keep the count zero or it may start early!
365 	 */
366 	si->dma_counth = 0;
367 	si->dma_countl = 0;
368 
369 #if 0
370 	/* Clear FIFO counter. (also hits dma_count) */
371 	si->fifo_cnt_hi = 0;
372 	si->fifo_count = 0;
373 #endif
374 }
375 
376 
377 void
378 si_vme_dma_start(struct ncr5380_softc *ncr_sc)
379 {
380 	struct si_softc *sc = (struct si_softc *)ncr_sc;
381 	struct sci_req *sr = ncr_sc->sc_current;
382 	struct si_dma_handle *dh = sr->sr_dma_hand;
383 	volatile struct si_regs *si = sc->sc_regs;
384 	int s, xlen;
385 
386 	xlen = sc->sc_reqlen;
387 
388 	/* This MAY be time critical (not sure). */
389 	s = splhigh();
390 
391 	si->dma_counth = (ushort)(xlen >> 16);
392 	si->dma_countl = (ushort)(xlen & 0xFFFF);
393 
394 	/* Set it anyway, even though dma_count hits it. */
395 	si->fifo_cnt_hi = (ushort)(xlen >> 16);
396 	si->fifo_count  = (ushort)(xlen & 0xFFFF);
397 
398 	/*
399 	 * Acknowledge the phase change.  (After DMA setup!)
400 	 * Put the SBIC into DMA mode, and start the transfer.
401 	 */
402 	if (dh->dh_flags & SIDH_OUT) {
403 		*ncr_sc->sci_tcmd = PHASE_DATA_OUT;
404 		SCI_CLR_INTR(ncr_sc);
405 		*ncr_sc->sci_icmd = SCI_ICMD_DATA;
406 		*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
407 		*ncr_sc->sci_dma_send = 0;	/* start it */
408 	} else {
409 		*ncr_sc->sci_tcmd = PHASE_DATA_IN;
410 		SCI_CLR_INTR(ncr_sc);
411 		*ncr_sc->sci_icmd = 0;
412 		*ncr_sc->sci_mode |= (SCI_MODE_DMA | SCI_MODE_DMA_IE);
413 		*ncr_sc->sci_irecv = 0;	/* start it */
414 	}
415 
416 	/* Let'er rip! */
417 	si->si_csr |= SI_CSR_DMA_EN;
418 
419 	splx(s);
420 	ncr_sc->sc_state |= NCR_DOINGDMA;
421 
422 #ifdef	DEBUG
423 	if (si_debug & 2) {
424 		printf("si_dma_start: started, flags=0x%x\n",
425 			   ncr_sc->sc_state);
426 	}
427 #endif
428 }
429 
430 
431 void
432 si_vme_dma_eop(struct ncr5380_softc *ncr_sc)
433 {
434 
435 	/* Not needed - DMA was stopped prior to examining sci_csr */
436 }
437 
438 
439 void
440 si_vme_dma_stop(struct ncr5380_softc *ncr_sc)
441 {
442 	struct si_softc *sc = (struct si_softc *)ncr_sc;
443 	struct sci_req *sr = ncr_sc->sc_current;
444 	struct si_dma_handle *dh = sr->sr_dma_hand;
445 	volatile struct si_regs *si = sc->sc_regs;
446 	int resid, ntrans;
447 
448 	if ((ncr_sc->sc_state & NCR_DOINGDMA) == 0) {
449 #ifdef	DEBUG
450 		printf("si_dma_stop: DMA not running\n");
451 #endif
452 		return;
453 	}
454 	ncr_sc->sc_state &= ~NCR_DOINGDMA;
455 
456 	/* First, halt the DMA engine. */
457 	si->si_csr &= ~SI_CSR_DMA_EN;	/* VME only */
458 
459 	/* Set an impossible phase to prevent data movement? */
460 	*ncr_sc->sci_tcmd = PHASE_INVALID;
461 
462 	if (si->si_csr & (SI_CSR_DMA_CONFLICT | SI_CSR_DMA_BUS_ERR)) {
463 		printf("si: DMA error, csr=0x%x, reset\n", si->si_csr);
464 		sr->sr_xs->error = XS_DRIVER_STUFFUP;
465 		ncr_sc->sc_state |= NCR_ABORTING;
466 		si_vme_reset(ncr_sc);
467 		goto out;
468 	}
469 
470 	/* Note that timeout may have set the error flag. */
471 	if (ncr_sc->sc_state & NCR_ABORTING)
472 		goto out;
473 
474 	/* XXX: Wait for DMA to actually finish? */
475 
476 	/*
477 	 * Now try to figure out how much actually transferred
478 	 *
479 	 * The fifo_count does not reflect how many bytes were
480 	 * actually transferred for VME.
481 	 *
482 	 * SCSI-3 VME interface is a little funny on writes:
483 	 * if we have a disconnect, the DMA has overshot by
484 	 * one byte and the resid needs to be incremented.
485 	 * Only happens for partial transfers.
486 	 * (Thanks to Matt Jacob)
487 	 */
488 
489 	resid = si->fifo_count & 0xFFFF;
490 	if (dh->dh_flags & SIDH_OUT)
491 		if ((resid > 0) && (resid < sc->sc_reqlen))
492 			resid++;
493 	ntrans = sc->sc_reqlen - resid;
494 
495 #ifdef	DEBUG
496 	if (si_debug & 2) {
497 		printf("si_dma_stop: resid=0x%x ntrans=0x%x\n",
498 		       resid, ntrans);
499 	}
500 #endif
501 
502 	if (ntrans < MIN_DMA_LEN) {
503 		printf("si: fifo count: 0x%x\n", resid);
504 		ncr_sc->sc_state |= NCR_ABORTING;
505 		goto out;
506 	}
507 	if (ntrans > ncr_sc->sc_datalen)
508 		panic("si_dma_stop: excess transfer");
509 
510 	/* Adjust data pointer */
511 	ncr_sc->sc_dataptr += ntrans;
512 	ncr_sc->sc_datalen -= ntrans;
513 
514 	/*
515 	 * After a read, we may need to clean-up
516 	 * "Left-over bytes" (yuck!)
517 	 */
518 	if (((dh->dh_flags & SIDH_OUT) == 0) &&
519 		((si->si_csr & SI_CSR_LOB) != 0))
520 	{
521 		char *cp = ncr_sc->sc_dataptr;
522 #ifdef DEBUG
523 		printf("si: Got Left-over bytes!\n");
524 #endif
525 		if (si->si_csr & SI_CSR_BPCON) {
526 			/* have SI_CSR_BPCON */
527 			cp[-1] = (si->si_bprl & 0xff00) >> 8;
528 		} else {
529 			switch (si->si_csr & SI_CSR_LOB) {
530 			case SI_CSR_LOB_THREE:
531 				cp[-3] = (si->si_bprh & 0xff00) >> 8;
532 				cp[-2] = (si->si_bprh & 0x00ff);
533 				cp[-1] = (si->si_bprl & 0xff00) >> 8;
534 				break;
535 			case SI_CSR_LOB_TWO:
536 				cp[-2] = (si->si_bprh & 0xff00) >> 8;
537 				cp[-1] = (si->si_bprh & 0x00ff);
538 				break;
539 			case SI_CSR_LOB_ONE:
540 				cp[-1] = (si->si_bprh & 0xff00) >> 8;
541 				break;
542 			}
543 		}
544 	}
545 
546 out:
547 	si->dma_addrh = 0;
548 	si->dma_addrl = 0;
549 
550 	si->dma_counth = 0;
551 	si->dma_countl = 0;
552 
553 	si->fifo_cnt_hi = 0;
554 	si->fifo_count  = 0;
555 
556 	/* Put SBIC back in PIO mode. */
557 	*ncr_sc->sci_mode &= ~(SCI_MODE_DMA | SCI_MODE_DMA_IE);
558 	*ncr_sc->sci_icmd = 0;
559 }
560