xref: /netbsd-src/sys/arch/sun3/dev/memerr.c (revision eff2e270bd1e64ffd8555c2b61feceb503a80db8)
1 /*	$NetBSD: memerr.c,v 1.10 1998/02/05 04:56:43 gwr Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)memreg.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
50 
51 #include <machine/autoconf.h>
52 #include <machine/cpu.h>
53 #include <machine/idprom.h>
54 #include <machine/pte.h>
55 
56 #include <sun3/sun3/machdep.h>
57 #include <sun3/dev/memerr.h>
58 /* #include <sun3/dev/eccreg.h> - not yet */
59 
60 #define	ME_PRI	7	/* Interrupt level (NMI) */
61 
62 extern unsigned char cpu_machine_id;
63 
64 enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
65 
66 struct memerr_softc {
67 	struct device sc_dev;
68 	struct memerr *sc_reg;
69 	enum memerr_type sc_type;
70 	char *sc_typename;	/* "Parity" or "ECC" */
71 	char *sc_csrbits;	/* how to print csr bits */
72 	/* XXX: counters? */
73 };
74 
75 static int  memerr_match __P((struct device *, struct cfdata *, void *));
76 static void memerr_attach __P((struct device *, struct device *, void *));
77 static int  memerr_interrupt __P((void *));
78 static void memerr_correctable __P((struct memerr_softc *));
79 
80 struct cfattach memerr_ca = {
81 	sizeof(struct memerr_softc), memerr_match, memerr_attach
82 };
83 
84 static int
85 memerr_match(parent, cf, args)
86     struct device *parent;
87     struct cfdata *cf;
88     void *args;
89 {
90 	struct confargs *ca = args;
91 
92 	/* This driver only supports one unit. */
93 	if (cf->cf_unit != 0)
94 		return (0);
95 
96 	/* Make sure there is something there... */
97 	if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
98 		return (0);
99 
100 	/* Default interrupt priority. */
101 	if (ca->ca_intpri == -1)
102 		ca->ca_intpri = ME_PRI;
103 
104 	return (1);
105 }
106 
107 static void
108 memerr_attach(parent, self, args)
109 	struct device *parent;
110 	struct device *self;
111 	void *args;
112 {
113 	struct memerr_softc *sc = (void *)self;
114 	struct confargs *ca = args;
115 	struct memerr *mer;
116 
117 	/*
118 	 * Which type of memory subsystem do we have?
119 	 */
120 	switch (cpu_machine_id) {
121 	case SUN3_MACH_160:		/* XXX: correct? */
122 	case SUN3_MACH_260:
123 	case SUN3X_MACH_470:
124 		sc->sc_type = ME_ECC;
125 		sc->sc_typename = "ECC";
126 		sc->sc_csrbits = ME_ECC_STR;
127 		break;
128 
129 	default:
130 		sc->sc_type = ME_PAR;
131 		sc->sc_typename = "Parity";
132 		sc->sc_csrbits = ME_PAR_STR;
133 		break;
134 	}
135 	printf(": (%s memory)\n", sc->sc_typename);
136 
137 	mer = bus_mapin(ca->ca_bustype, ca->ca_paddr, sizeof(*mer));
138 	if (mer == NULL)
139 		panic("memerr: can not map register");
140 	sc->sc_reg = mer;
141 
142 	/* Install interrupt handler. */
143 	isr_add_autovect(memerr_interrupt,
144 		(void *)sc, ca->ca_intpri);
145 
146 	/* Enable error interrupt (and checking). */
147 	if (sc->sc_type == ME_PAR)
148 		mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
149 	else {
150 		/*
151 		 * XXX:  Some day, figure out how to decode
152 		 * correctable errors and set ME_ECC_CE_ENA
153 		 * here so we can log them...
154 		 */
155 		mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
156 	}
157 }
158 
159 /*****************************************************************
160  * Functions for ECC memory
161  *****************************************************************/
162 
163 static int
164 memerr_interrupt(arg)
165 	void *arg;
166 {
167 	struct memerr_softc *sc = arg;
168 	volatile struct memerr *me = sc->sc_reg;
169 	u_char csr, ctx;
170 	u_int pa, va;
171 	int pte;
172 	char bits[64];
173 
174 	csr = me->me_csr;
175 	if ((csr & ME_CSR_IPEND) == 0)
176 		return (0);
177 
178 	va = me->me_vaddr;
179  	ctx = (va >> 28) & 0xF;
180 	va &= 0x0FFFffff;
181 	pte = get_pte(va);
182 	pa = PG_PA(pte);
183 
184 	printf("\nMemory error on %s cycle!\n",
185 		(ctx & 8) ? "DVMA" : "CPU");
186 	printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
187 		   (ctx & 7), va, pa);
188 	printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
189 	    bits, sizeof(bits)));
190 
191 	/*
192 	 * If we have parity-checked memory, there is
193 	 * not much to be done.  Any error is fatal.
194 	 */
195 	if (sc->sc_type == ME_PAR) {
196 		if (csr & ME_PAR_EMASK) {
197 			/* Parity errors are fatal. */
198 			goto die;
199 		}
200 		/* The IPEND bit was set, but no error bits. */
201 		goto noerror;
202 	}
203 
204 	/*
205 	 * We have ECC memory.  More complicated...
206 	 */
207 	if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
208 		printf(" write-back failed, pte=0x%x\n", pte);
209 		goto die;
210 	}
211 	if (csr & ME_ECC_UE) {
212 		printf(" uncorrectable ECC error\n");
213 		goto die;
214 	}
215 	if (csr & ME_ECC_CE) {
216 		/* Just log this and continue. */
217 		memerr_correctable(sc);
218 		goto recover;
219 	}
220 	/* The IPEND bit was set, but no error bits. */
221 	goto noerror;
222 
223 die:
224 	panic("all bets are off...");
225 
226 noerror:
227 	printf("memerr: no error bits set?\n");
228 
229 recover:
230 	/* Clear the error by writing the address register. */
231 	me->me_vaddr = 0;
232 	return (1);
233 }
234 
235 /*
236  * Announce (and log) a correctable ECC error.
237  * Need to look at the ECC syndrome register on
238  * the memory board that caused the error...
239  */
240 void
241 memerr_correctable(sc)
242 	struct memerr_softc *sc;
243 {
244 	/* XXX: Not yet... */
245 }
246