xref: /netbsd-src/sys/arch/sun3/dev/memerr.c (revision d0fed6c87ddc40a8bffa6f99e7433ddfc864dd83)
1 /*	$NetBSD: memerr.c,v 1.7 1996/12/17 21:10:50 gwr Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)memreg.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
50 
51 #include <machine/autoconf.h>
52 #include <machine/control.h>
53 #include <machine/cpu.h>
54 #include <machine/idprom.h>
55 #include <machine/obio.h>
56 #include <machine/pte.h>
57 
58 #include <sun3/dev/memerr.h>
59 /* #include <sun3/dev/eccreg.h> - not yet */
60 
61 #define	ME_PRI	7	/* Interrupt level (NMI) */
62 
63 extern unsigned char cpu_machine_id;
64 
65 enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
66 
67 struct memerr_softc {
68 	struct device sc_dev;
69 	struct memerr *sc_reg;
70 	enum memerr_type sc_type;
71 	char *sc_typename;	/* "Parity" or "ECC" */
72 	char *sc_csrbits;	/* how to print csr bits */
73 	/* XXX: counters? */
74 };
75 
76 static int  memerr_match __P((struct device *, struct cfdata *, void *));
77 static void memerr_attach __P((struct device *, struct device *, void *));
78 static int  memerr_interrupt __P((void *));
79 static void memerr_correctable __P((struct memerr_softc *));
80 
81 struct cfattach memerr_ca = {
82 	sizeof(struct memerr_softc), memerr_match, memerr_attach
83 };
84 
85 struct cfdriver memerr_cd = {
86 	NULL, "memerr", DV_DULL
87 };
88 
89 
90 static int
91 memerr_match(parent, cf, args)
92     struct device *parent;
93     struct cfdata *cf;
94     void *args;
95 {
96 	struct confargs *ca = args;
97 
98 	/* This driver only supports one unit. */
99 	if (cf->cf_unit != 0)
100 		return (0);
101 
102 	/* The peek returns -1 on bus error. */
103 	if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
104 		return (0);
105 
106 	/* Default interrupt priority. */
107 	if (ca->ca_intpri == -1)
108 		ca->ca_intpri = ME_PRI;
109 
110 	return (1);
111 }
112 
113 static void
114 memerr_attach(parent, self, args)
115 	struct device *parent;
116 	struct device *self;
117 	void *args;
118 {
119 	struct memerr_softc *sc = (void *)self;
120 	struct confargs *ca = args;
121 	struct memerr *mer;
122 
123 	/*
124 	 * Which type of memory subsystem do we have?
125 	 */
126 	switch (cpu_machine_id) {
127 	case SUN3_MACH_160:		/* XXX: correct? */
128 	case SUN3_MACH_260:
129 		sc->sc_type = ME_ECC;
130 		sc->sc_typename = "ECC";
131 		sc->sc_csrbits = ME_ECC_STR;
132 		break;
133 
134 	default:
135 		sc->sc_type = ME_PAR;
136 		sc->sc_typename = "Parity";
137 		sc->sc_csrbits = ME_PAR_STR;
138 		break;
139 	}
140 	printf(": (%s memory)\n", sc->sc_typename);
141 
142 	mer = (struct memerr *)
143 	    obio_alloc(ca->ca_paddr, sizeof(*mer));
144 	if (mer == NULL)
145 		panic("memerr: can not map register");
146 	sc->sc_reg = mer;
147 
148 	/* Install interrupt handler. */
149 	isr_add_autovect(memerr_interrupt,
150 		(void *)sc, ca->ca_intpri);
151 
152 	/* Enable error interrupt (and checking). */
153 	if (sc->sc_type == ME_PAR)
154 		mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
155 	else {
156 		/*
157 		 * XXX:  Some day, figure out how to decode
158 		 * correctable errors and set ME_ECC_CE_ENA
159 		 * here so we can log them...
160 		 */
161 		mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
162 	}
163 }
164 
165 /*****************************************************************
166  * Functions for ECC memory
167  *****************************************************************/
168 
169 static int
170 memerr_interrupt(arg)
171 	void *arg;
172 {
173 	struct memerr_softc *sc = arg;
174 	volatile struct memerr *me = sc->sc_reg;
175 	u_char csr, ctx;
176 	u_int pa, va;
177 	int pte;
178 	char bits[64];
179 
180 	csr = me->me_csr;
181 	if ((csr & ME_CSR_IPEND) == 0)
182 		return (0);
183 
184 	va = me->me_vaddr;
185  	ctx = (va >> 28) & 0xF;
186 	va &= 0x0FFFffff;
187 	pte = get_pte(va);
188 	pa = PG_PA(pte);
189 
190 	printf("\nMemory error on %s cycle!\n",
191 		(ctx & 8) ? "DVMA" : "CPU");
192 	printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
193 		   (ctx & 7), va, pa);
194 	printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
195 	    bits, sizeof(bits)));
196 
197 	/*
198 	 * If we have parity-checked memory, there is
199 	 * not much to be done.  Any error is fatal.
200 	 */
201 	if (sc->sc_type == ME_PAR) {
202 		if (csr & ME_PAR_EMASK) {
203 			/* Parity errors are fatal. */
204 			goto die;
205 		}
206 		/* The IPEND bit was set, but no error bits. */
207 		goto noerror;
208 	}
209 
210 	/*
211 	 * We have ECC memory.  More complicated...
212 	 */
213 	if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
214 		printf(" write-back failed, pte=0x%x\n", pte);
215 		goto die;
216 	}
217 	if (csr & ME_ECC_UE) {
218 		printf(" uncorrectable ECC error\n");
219 		goto die;
220 	}
221 	if (csr & ME_ECC_CE) {
222 		/* Just log this and continue. */
223 		memerr_correctable(sc);
224 		goto recover;
225 	}
226 	/* The IPEND bit was set, but no error bits. */
227 	goto noerror;
228 
229 die:
230 	panic("all bets are off...");
231 
232 noerror:
233 	printf("memerr: no error bits set?\n");
234 
235 recover:
236 	/* Clear the error by writing the address register. */
237 	me->me_vaddr = 0;
238 	return (1);
239 }
240 
241 /*
242  * Announce (and log) a correctable ECC error.
243  * Need to look at the ECC syndrome register on
244  * the memory board that caused the error...
245  */
246 void
247 memerr_correctable(sc)
248 	struct memerr_softc *sc;
249 {
250 	/* XXX: Not yet... */
251 }
252