xref: /netbsd-src/sys/arch/sun3/dev/memerr.c (revision a0dffcafc20b0b125811ffe6556275e137e71fa9)
1 /*	$NetBSD: memerr.c,v 1.6 1996/11/13 07:05:14 thorpej Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)memreg.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
50 
51 #include <machine/autoconf.h>
52 #include <machine/cpu.h>
53 #include <machine/obio.h>
54 #include <machine/pte.h>
55 
56 #include <sun3/dev/memerr.h>
57 /* #include <sun3/dev/eccreg.h> - not yet */
58 
59 #define	ME_PRI	7	/* Interrupt level (NMI) */
60 
61 extern unsigned char cpu_machine_id;
62 
63 enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
64 
65 struct memerr_softc {
66 	struct device sc_dev;
67 	struct memerr *sc_reg;
68 	enum memerr_type sc_type;
69 	char *sc_typename;	/* "Parity" or "ECC" */
70 	char *sc_csrbits;	/* how to print csr bits */
71 	/* XXX: counters? */
72 };
73 
74 static int  memerr_match __P((struct device *, void *vcf, void *args));
75 static void memerr_attach __P((struct device *, struct device *, void *));
76 static int  memerr_interrupt __P((void *));
77 static void memerr_correctable __P((struct memerr_softc *));
78 
79 struct cfattach memerr_ca = {
80 	sizeof(struct memerr_softc), memerr_match, memerr_attach
81 };
82 
83 struct cfdriver memerr_cd = {
84 	NULL, "memerr", DV_DULL
85 };
86 
87 
88 static int
89 memerr_match(parent, vcf, args)
90     struct device *parent;
91     void *vcf, *args;
92 {
93     struct cfdata *cf = vcf;
94 	struct confargs *ca = args;
95 
96 	/* This driver only supports one unit. */
97 	if (cf->cf_unit != 0)
98 		return (0);
99 
100 	/* The peek returns -1 on bus error. */
101 	if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
102 		return (0);
103 
104 	/* Default interrupt priority. */
105 	if (ca->ca_intpri == -1)
106 		ca->ca_intpri = ME_PRI;
107 
108 	return (1);
109 }
110 
111 static void
112 memerr_attach(parent, self, args)
113 	struct device *parent;
114 	struct device *self;
115 	void *args;
116 {
117 	struct memerr_softc *sc = (void *)self;
118 	struct confargs *ca = args;
119 	struct memerr *mer;
120 
121 	/*
122 	 * Which type of memory subsystem do we have?
123 	 */
124 	switch (cpu_machine_id) {
125 	case SUN3_MACH_160:		/* XXX: correct? */
126 	case SUN3_MACH_260:
127 		sc->sc_type = ME_ECC;
128 		sc->sc_typename = "ECC";
129 		sc->sc_csrbits = ME_ECC_STR;
130 		break;
131 
132 	default:
133 		sc->sc_type = ME_PAR;
134 		sc->sc_typename = "Parity";
135 		sc->sc_csrbits = ME_PAR_STR;
136 		break;
137 	}
138 	printf(": (%s memory)\n", sc->sc_typename);
139 
140 	mer = (struct memerr *)
141 	    obio_alloc(ca->ca_paddr, sizeof(*mer));
142 	if (mer == NULL)
143 		panic("memerr: can not map register");
144 	sc->sc_reg = mer;
145 
146 	/* Install interrupt handler. */
147 	isr_add_autovect(memerr_interrupt,
148 		(void *)sc, ca->ca_intpri);
149 
150 	/* Enable error interrupt (and checking). */
151 	if (sc->sc_type == ME_PAR)
152 		mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
153 	else {
154 		/*
155 		 * XXX:  Some day, figure out how to decode
156 		 * correctable errors and set ME_ECC_CE_ENA
157 		 * here so we can log them...
158 		 */
159 		mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
160 	}
161 }
162 
163 /*****************************************************************
164  * Functions for ECC memory
165  *****************************************************************/
166 
167 static int
168 memerr_interrupt(arg)
169 	void *arg;
170 {
171 	struct memerr_softc *sc = arg;
172 	volatile struct memerr *me = sc->sc_reg;
173 	u_char csr, ctx, err;
174 	u_int pa, va;
175 	int pte;
176 	char bits[64];
177 
178 	csr = me->me_csr;
179 	if ((csr & ME_CSR_IPEND) == 0)
180 		return (0);
181 
182 	va = me->me_vaddr;
183  	ctx = (va >> 28) & 0xF;
184 	va &= 0x0FFFffff;
185 	pte = get_pte(va);
186 	pa = PG_PA(pte);
187 
188 	printf("\nMemory error on %s cycle!\n",
189 		(ctx & 8) ? "DVMA" : "CPU");
190 	printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
191 		   (ctx & 7), va, pa);
192 	printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
193 	    bits, sizeof(bits)));
194 
195 	/*
196 	 * If we have parity-checked memory, there is
197 	 * not much to be done.  Any error is fatal.
198 	 */
199 	if (sc->sc_type == ME_PAR) {
200 		if (csr & ME_PAR_EMASK) {
201 			/* Parity errors are fatal. */
202 			goto die;
203 		}
204 		/* The IPEND bit was set, but no error bits. */
205 		goto noerror;
206 	}
207 
208 	/*
209 	 * We have ECC memory.  More complicated...
210 	 */
211 	if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
212 		printf(" write-back failed, pte=0x%x\n", pte);
213 		goto die;
214 	}
215 	if (csr & ME_ECC_UE) {
216 		printf(" uncorrectable ECC error\n");
217 		goto die;
218 	}
219 	if (csr & ME_ECC_CE) {
220 		/* Just log this and continue. */
221 		memerr_correctable(sc);
222 		goto recover;
223 	}
224 	/* The IPEND bit was set, but no error bits. */
225 	goto noerror;
226 
227 die:
228 	panic("all bets are off...");
229 
230 noerror:
231 	printf("memerr: no error bits set?\n");
232 
233 recover:
234 	/* Clear the error by writing the address register. */
235 	me->me_vaddr = 0;
236 	return (1);
237 }
238 
239 /*
240  * Announce (and log) a correctable ECC error.
241  * Need to look at the ECC syndrome register on
242  * the memory board that caused the error...
243  */
244 void
245 memerr_correctable(sc)
246 	struct memerr_softc *sc;
247 {
248 	/* XXX: Not yet... */
249 }
250