xref: /netbsd-src/sys/arch/sun3/dev/memerr.c (revision 1394f01b4a9e99092957ca5d824d67219565d9b5)
1 /*	$NetBSD: memerr.c,v 1.8 1997/04/28 21:59:22 gwr Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)memreg.c	8.1 (Berkeley) 6/11/93
45  */
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
50 
51 #include <machine/autoconf.h>
52 #include <machine/control.h>
53 #include <machine/cpu.h>
54 #include <machine/idprom.h>
55 #include <machine/obio.h>
56 #include <machine/pte.h>
57 
58 #include <sun3/dev/memerr.h>
59 /* #include <sun3/dev/eccreg.h> - not yet */
60 
61 #define	ME_PRI	7	/* Interrupt level (NMI) */
62 
63 extern unsigned char cpu_machine_id;
64 
65 enum memerr_type { ME_PAR = 0, ME_ECC = 1 };
66 
67 struct memerr_softc {
68 	struct device sc_dev;
69 	struct memerr *sc_reg;
70 	enum memerr_type sc_type;
71 	char *sc_typename;	/* "Parity" or "ECC" */
72 	char *sc_csrbits;	/* how to print csr bits */
73 	/* XXX: counters? */
74 };
75 
76 static int  memerr_match __P((struct device *, struct cfdata *, void *));
77 static void memerr_attach __P((struct device *, struct device *, void *));
78 static int  memerr_interrupt __P((void *));
79 static void memerr_correctable __P((struct memerr_softc *));
80 
81 struct cfattach memerr_ca = {
82 	sizeof(struct memerr_softc), memerr_match, memerr_attach
83 };
84 
85 struct cfdriver memerr_cd = {
86 	NULL, "memerr", DV_DULL
87 };
88 
89 
90 static int
91 memerr_match(parent, cf, args)
92     struct device *parent;
93     struct cfdata *cf;
94     void *args;
95 {
96 	struct confargs *ca = args;
97 
98 	/* This driver only supports one unit. */
99 	if (cf->cf_unit != 0)
100 		return (0);
101 
102 	/* We use obio_mapin(), so require OBIO. */
103 	if (ca->ca_bustype != BUS_OBIO)
104 		return (0);
105 
106 	/* Make sure there is something there... */
107 	if (bus_peek(ca->ca_bustype, ca->ca_paddr, 1) == -1)
108 		return (0);
109 
110 	/* Default interrupt priority. */
111 	if (ca->ca_intpri == -1)
112 		ca->ca_intpri = ME_PRI;
113 
114 	return (1);
115 }
116 
117 static void
118 memerr_attach(parent, self, args)
119 	struct device *parent;
120 	struct device *self;
121 	void *args;
122 {
123 	struct memerr_softc *sc = (void *)self;
124 	struct confargs *ca = args;
125 	struct memerr *mer;
126 
127 	/*
128 	 * Which type of memory subsystem do we have?
129 	 */
130 	switch (cpu_machine_id) {
131 	case SUN3_MACH_160:		/* XXX: correct? */
132 	case SUN3_MACH_260:
133 		sc->sc_type = ME_ECC;
134 		sc->sc_typename = "ECC";
135 		sc->sc_csrbits = ME_ECC_STR;
136 		break;
137 
138 	default:
139 		sc->sc_type = ME_PAR;
140 		sc->sc_typename = "Parity";
141 		sc->sc_csrbits = ME_PAR_STR;
142 		break;
143 	}
144 	printf(": (%s memory)\n", sc->sc_typename);
145 
146 	mer = (struct memerr *)
147 	    obio_mapin(ca->ca_paddr, sizeof(*mer));
148 	if (mer == NULL)
149 		panic("memerr: can not map register");
150 	sc->sc_reg = mer;
151 
152 	/* Install interrupt handler. */
153 	isr_add_autovect(memerr_interrupt,
154 		(void *)sc, ca->ca_intpri);
155 
156 	/* Enable error interrupt (and checking). */
157 	if (sc->sc_type == ME_PAR)
158 		mer->me_csr = ME_CSR_IENA | ME_PAR_CHECK;
159 	else {
160 		/*
161 		 * XXX:  Some day, figure out how to decode
162 		 * correctable errors and set ME_ECC_CE_ENA
163 		 * here so we can log them...
164 		 */
165 		mer->me_csr = ME_CSR_IENA; /* | ME_ECC_CE_ENA */
166 	}
167 }
168 
169 /*****************************************************************
170  * Functions for ECC memory
171  *****************************************************************/
172 
173 static int
174 memerr_interrupt(arg)
175 	void *arg;
176 {
177 	struct memerr_softc *sc = arg;
178 	volatile struct memerr *me = sc->sc_reg;
179 	u_char csr, ctx;
180 	u_int pa, va;
181 	int pte;
182 	char bits[64];
183 
184 	csr = me->me_csr;
185 	if ((csr & ME_CSR_IPEND) == 0)
186 		return (0);
187 
188 	va = me->me_vaddr;
189  	ctx = (va >> 28) & 0xF;
190 	va &= 0x0FFFffff;
191 	pte = get_pte(va);
192 	pa = PG_PA(pte);
193 
194 	printf("\nMemory error on %s cycle!\n",
195 		(ctx & 8) ? "DVMA" : "CPU");
196 	printf(" ctx=%d, vaddr=0x%x, paddr=0x%x\n",
197 		   (ctx & 7), va, pa);
198 	printf(" csr=%s\n", bitmask_snprintf(csr, sc->sc_csrbits,
199 	    bits, sizeof(bits)));
200 
201 	/*
202 	 * If we have parity-checked memory, there is
203 	 * not much to be done.  Any error is fatal.
204 	 */
205 	if (sc->sc_type == ME_PAR) {
206 		if (csr & ME_PAR_EMASK) {
207 			/* Parity errors are fatal. */
208 			goto die;
209 		}
210 		/* The IPEND bit was set, but no error bits. */
211 		goto noerror;
212 	}
213 
214 	/*
215 	 * We have ECC memory.  More complicated...
216 	 */
217 	if (csr & (ME_ECC_WBTMO | ME_ECC_WBERR)) {
218 		printf(" write-back failed, pte=0x%x\n", pte);
219 		goto die;
220 	}
221 	if (csr & ME_ECC_UE) {
222 		printf(" uncorrectable ECC error\n");
223 		goto die;
224 	}
225 	if (csr & ME_ECC_CE) {
226 		/* Just log this and continue. */
227 		memerr_correctable(sc);
228 		goto recover;
229 	}
230 	/* The IPEND bit was set, but no error bits. */
231 	goto noerror;
232 
233 die:
234 	panic("all bets are off...");
235 
236 noerror:
237 	printf("memerr: no error bits set?\n");
238 
239 recover:
240 	/* Clear the error by writing the address register. */
241 	me->me_vaddr = 0;
242 	return (1);
243 }
244 
245 /*
246  * Announce (and log) a correctable ECC error.
247  * Need to look at the ECC syndrome register on
248  * the memory board that caused the error...
249  */
250 void
251 memerr_correctable(sc)
252 	struct memerr_softc *sc;
253 {
254 	/* XXX: Not yet... */
255 }
256