1 /* $NetBSD: cg4.c,v 1.33 2005/12/11 12:19:20 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93 41 */ 42 43 /* 44 * color display (cg4) driver. 45 * 46 * Credits, history: 47 * Gordon Ross created this driver based on the cg3 driver from 48 * the sparc port as distributed in BSD 4.4 Lite, but included 49 * support for only the "type B" adapter (Brooktree DACs). 50 * Ezra Story added support for the "type A" (AMD DACs). 51 * 52 * Todo: 53 * Make this driver handle video interrupts. 54 * Defer colormap updates to vertical retrace interrupts. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: cg4.c,v 1.33 2005/12/11 12:19:20 christos Exp $"); 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/conf.h> 63 #include <sys/device.h> 64 #include <sys/ioctl.h> 65 #include <sys/malloc.h> 66 #include <sys/mman.h> 67 #include <sys/proc.h> 68 #include <sys/tty.h> 69 70 #include <uvm/uvm_extern.h> 71 72 #include <machine/autoconf.h> 73 #include <machine/cpu.h> 74 #include <dev/sun/fbio.h> 75 #include <machine/idprom.h> 76 #include <machine/pmap.h> 77 78 #include <sun3/dev/fbvar.h> 79 #include <sun3/dev/btreg.h> 80 #include <sun3/dev/cg4reg.h> 81 #include <sun3/dev/p4reg.h> 82 83 union bt_cmap_u { 84 u_char btcm_char[256 * 3]; /* raw data */ 85 u_char btcm_rgb[256][3]; /* 256 R/G/B entries */ 86 u_int btcm_int[256 * 3 / 4]; /* the way the chip gets loaded */ 87 }; 88 89 #define CG4_TYPE_A 0 /* AMD DACs */ 90 #define CG4_TYPE_B 1 /* Brooktree DACs */ 91 92 #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE) 93 94 #define CMAP_SIZE 256 95 struct soft_cmap { 96 u_char r[CMAP_SIZE]; 97 u_char g[CMAP_SIZE]; 98 u_char b[CMAP_SIZE]; 99 }; 100 101 /* per-display variables */ 102 struct cg4_softc { 103 struct device sc_dev; /* base device */ 104 struct fbdevice sc_fb; /* frame buffer device */ 105 int sc_cg4type; /* A or B */ 106 int sc_pa_overlay; /* phys. addr. of overlay plane */ 107 int sc_pa_enable; /* phys. addr. of enable plane */ 108 int sc_pa_pixmap; /* phys. addr. of color plane */ 109 int sc_video_on; /* zero if blanked */ 110 void *sc_va_cmap; /* Colormap h/w (mapped KVA) */ 111 void *sc_btcm; /* Soft cmap, Brooktree format */ 112 void (*sc_ldcmap)(struct cg4_softc *); 113 struct soft_cmap sc_cmap; /* Soft cmap, user format */ 114 }; 115 116 /* autoconfiguration driver */ 117 static void cg4attach(struct device *, struct device *, void *); 118 static int cg4match(struct device *, struct cfdata *, void *); 119 120 CFATTACH_DECL(cgfour, sizeof(struct cg4_softc), 121 cg4match, cg4attach, NULL, NULL); 122 123 extern struct cfdriver cgfour_cd; 124 125 dev_type_open(cg4open); 126 dev_type_ioctl(cg4ioctl); 127 dev_type_mmap(cg4mmap); 128 129 const struct cdevsw cgfour_cdevsw = { 130 cg4open, nullclose, noread, nowrite, cg4ioctl, 131 nostop, notty, nopoll, cg4mmap, nokqfilter, 132 }; 133 134 static int cg4gattr (struct fbdevice *, void *); 135 static int cg4gvideo (struct fbdevice *, void *); 136 static int cg4svideo (struct fbdevice *, void *); 137 static int cg4getcmap(struct fbdevice *, void *); 138 static int cg4putcmap(struct fbdevice *, void *); 139 140 #ifdef _SUN3_ 141 static void cg4a_init (struct cg4_softc *); 142 static void cg4a_ldcmap(struct cg4_softc *); 143 #endif /* SUN3 */ 144 145 static void cg4b_init (struct cg4_softc *); 146 static void cg4b_ldcmap(struct cg4_softc *); 147 148 static struct fbdriver cg4_fbdriver = { 149 cg4open, nullclose, cg4mmap, nokqfilter, cg4gattr, 150 cg4gvideo, cg4svideo, 151 cg4getcmap, cg4putcmap }; 152 153 /* 154 * Match a cg4. 155 */ 156 static int 157 cg4match(struct device *parent, struct cfdata *cf, void *args) 158 { 159 struct confargs *ca = args; 160 int mid, p4id, peekval, tmp; 161 void *p4reg; 162 163 /* No default address support. */ 164 if (ca->ca_paddr == -1) 165 return (0); 166 167 /* 168 * Slight hack here: The low four bits of the 169 * config flags, if set, restrict the match to 170 * that machine "implementation" only. 171 */ 172 mid = cf->cf_flags & IDM_IMPL_MASK; 173 if (mid && (mid != (cpu_machine_id & IDM_IMPL_MASK))) 174 return (0); 175 176 /* 177 * The config flag 0x10 if set means we are 178 * looking for a Type A board (3/110). 179 */ 180 if (cf->cf_flags & 0x10) { 181 #ifdef _SUN3_ 182 /* Type A: Check for AMD RAMDACs in control space. */ 183 if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1) 184 return (0); 185 /* Check for the overlay plane. */ 186 tmp = ca->ca_paddr + CG4A_OFF_OVERLAY; 187 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 188 return (0); 189 /* OK, it looks like a Type A. */ 190 return (1); 191 #else /* SUN3 */ 192 /* Only the Sun3/110 ever has a type A. */ 193 return (0); 194 #endif /* SUN3 */ 195 } 196 197 /* 198 * From here on, it is a type B or nothing. 199 * The config flag 0x20 if set means there 200 * is no P4 register. (bus error) 201 */ 202 if ((cf->cf_flags & 0x20) == 0) { 203 p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr); 204 peekval = peek_long(p4reg); 205 p4id = (peekval == -1) ? 206 P4_NOTFOUND : fb_pfour_id(p4reg); 207 bus_tmapout(p4reg); 208 if (peekval == -1) 209 return (0); 210 if (p4id != P4_ID_COLOR8P1) { 211 #ifdef DEBUG 212 printf("cgfour at 0x%x match p4id=0x%x fails\n", 213 ca->ca_paddr, p4id & 0xFF); 214 #endif 215 return (0); 216 } 217 } 218 219 /* 220 * Check for CMAP hardware and overlay plane. 221 */ 222 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 223 if (bus_peek(ca->ca_bustype, tmp, 4) == -1) 224 return (0); 225 tmp = ca->ca_paddr + CG4B_OFF_OVERLAY; 226 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 227 return (0); 228 229 return (1); 230 } 231 232 /* 233 * Attach a display. We need to notice if it is the console, too. 234 */ 235 static void 236 cg4attach(struct device *parent, struct device *self, void *args) 237 { 238 struct cg4_softc *sc = (struct cg4_softc *)self; 239 struct fbdevice *fb = &sc->sc_fb; 240 struct confargs *ca = args; 241 struct fbtype *fbt; 242 int tmp; 243 244 fbt = &fb->fb_fbtype; 245 fbt->fb_type = FBTYPE_SUN4COLOR; 246 fbt->fb_width = 1152; /* default - see below */ 247 fbt->fb_height = 900; /* default - see below */ 248 fbt->fb_depth = 8; 249 fbt->fb_cmsize = 256; 250 fbt->fb_size = CG4_MMAP_SIZE; 251 fb->fb_driver = &cg4_fbdriver; 252 fb->fb_private = sc; 253 fb->fb_name = sc->sc_dev.dv_xname; 254 fb->fb_flags = sc->sc_dev.dv_cfdata->cf_flags; 255 256 /* 257 * The config flag 0x10 if set means we are 258 * attaching a Type A (3/110) which has the 259 * AMD RAMDACs in control space, and no P4. 260 */ 261 if (fb->fb_flags & 0x10) { 262 #ifdef _SUN3_ 263 sc->sc_cg4type = CG4_TYPE_A; 264 sc->sc_ldcmap = cg4a_ldcmap; 265 sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY; 266 sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE; 267 sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP; 268 sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP, 269 sizeof(struct amd_regs)); 270 cg4a_init(sc); 271 #else /* SUN3 */ 272 panic("cgfour flags 0x10"); 273 #endif /* SUN3 */ 274 } else { 275 sc->sc_cg4type = CG4_TYPE_B; 276 sc->sc_ldcmap = cg4b_ldcmap; 277 sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY; 278 sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE; 279 sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP; 280 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 281 sc->sc_va_cmap = bus_mapin(ca->ca_bustype, tmp, 282 sizeof(struct bt_regs)); 283 cg4b_init(sc); 284 } 285 286 if ((fb->fb_flags & 0x20) == 0) { 287 /* It is supposed to have a P4 register. */ 288 fb->fb_pfour = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4); 289 } 290 291 /* 292 * Determine width and height as follows: 293 * If it has a P4 register, use that; 294 * else if unit==0, use the EEPROM size, 295 * else make our best guess. 296 */ 297 if (fb->fb_pfour) 298 fb_pfour_setsize(fb); 299 else if (sc->sc_dev.dv_unit == 0) 300 fb_eeprom_setsize(fb); 301 else { 302 /* Guess based on machine ID. */ 303 switch (cpu_machine_id) { 304 default: 305 /* Leave the defaults set above. */ 306 break; 307 } 308 } 309 printf(" (%dx%d)\n", fbt->fb_width, fbt->fb_height); 310 311 /* 312 * Make sure video is on. This driver uses a 313 * black colormap to blank the screen, so if 314 * there is any global enable, set it here. 315 */ 316 tmp = 1; 317 cg4svideo(fb, &tmp); 318 if (fb->fb_pfour) 319 fb_pfour_set_video(fb, 1); 320 else 321 enable_video(1); 322 323 /* Let /dev/fb know we are here. */ 324 fb_attach(fb, 4); 325 } 326 327 int 328 cg4open(dev_t dev, int flags, int mode, struct lwp *l) 329 { 330 int unit = minor(dev); 331 332 if (unit >= cgfour_cd.cd_ndevs || cgfour_cd.cd_devs[unit] == NULL) 333 return (ENXIO); 334 return (0); 335 } 336 337 int 338 cg4ioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct lwp *l) 339 { 340 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 341 342 return (fbioctlfb(&sc->sc_fb, cmd, data)); 343 } 344 345 /* 346 * Return the address that would map the given device at the given 347 * offset, allowing for the given protection, or return -1 for error. 348 * 349 * X11 expects its mmap'd region to look like this: 350 * 128k overlay data memory 351 * 128k overlay enable bitmap 352 * 1024k color memory 353 * 354 * The hardware looks completely different. 355 */ 356 paddr_t 357 cg4mmap(dev_t dev, off_t off, int prot) 358 { 359 struct cg4_softc *sc = cgfour_cd.cd_devs[minor(dev)]; 360 int physbase; 361 362 if (off & PGOFSET) 363 panic("cg4mmap"); 364 365 if ((off < 0) || (off >= CG4_MMAP_SIZE)) 366 return (-1); 367 368 if (off < 0x40000) { 369 if (off < 0x20000) { 370 physbase = sc->sc_pa_overlay; 371 } else { 372 /* enable plane */ 373 off -= 0x20000; 374 physbase = sc->sc_pa_enable; 375 } 376 } else { 377 /* pixel map */ 378 off -= 0x40000; 379 physbase = sc->sc_pa_pixmap; 380 } 381 382 /* 383 * I turned on PMAP_NC here to disable the cache as I was 384 * getting horribly broken behaviour without it. 385 */ 386 return ((physbase + off) | PMAP_NC); 387 } 388 389 /* 390 * Internal ioctl functions. 391 */ 392 393 /* FBIOGATTR: */ 394 static int 395 cg4gattr(struct fbdevice *fb, void *data) 396 { 397 struct fbgattr *fba = data; 398 399 fba->real_type = fb->fb_fbtype.fb_type; 400 fba->owner = 0; /* XXX - TIOCCONS stuff? */ 401 fba->fbtype = fb->fb_fbtype; 402 fba->sattr.flags = 0; 403 fba->sattr.emu_type = fb->fb_fbtype.fb_type; 404 fba->sattr.dev_specific[0] = -1; 405 fba->emu_types[0] = fb->fb_fbtype.fb_type; 406 fba->emu_types[1] = -1; 407 return (0); 408 } 409 410 /* FBIOGVIDEO: */ 411 static int 412 cg4gvideo(struct fbdevice *fb, void *data) 413 { 414 struct cg4_softc *sc = fb->fb_private; 415 int *on = data; 416 417 *on = sc->sc_video_on; 418 return (0); 419 } 420 421 /* FBIOSVIDEO: */ 422 static int 423 cg4svideo(struct fbdevice *fb, void *data) 424 { 425 struct cg4_softc *sc = fb->fb_private; 426 int *on = data; 427 428 if (sc->sc_video_on == *on) 429 return (0); 430 sc->sc_video_on = *on; 431 432 (*sc->sc_ldcmap)(sc); 433 return (0); 434 } 435 436 /* 437 * FBIOGETCMAP: 438 * Copy current colormap out to user space. 439 */ 440 static int 441 cg4getcmap(struct fbdevice *fb, void *data) 442 { 443 struct cg4_softc *sc = fb->fb_private; 444 struct soft_cmap *cm = &sc->sc_cmap; 445 struct fbcmap *fbcm = data; 446 u_int start, count; 447 int error; 448 449 start = fbcm->index; 450 count = fbcm->count; 451 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 452 return (EINVAL); 453 454 if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0) 455 return (error); 456 457 if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0) 458 return (error); 459 460 if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0) 461 return (error); 462 463 return (0); 464 } 465 466 /* 467 * FBIOPUTCMAP: 468 * Copy new colormap from user space and load. 469 */ 470 static int 471 cg4putcmap(struct fbdevice *fb, void *data) 472 { 473 struct cg4_softc *sc = fb->fb_private; 474 struct soft_cmap *cm = &sc->sc_cmap; 475 struct fbcmap *fbcm = data; 476 u_int start, count; 477 int error; 478 479 start = fbcm->index; 480 count = fbcm->count; 481 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 482 return (EINVAL); 483 484 if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0) 485 return (error); 486 487 if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0) 488 return (error); 489 490 if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0) 491 return (error); 492 493 (*sc->sc_ldcmap)(sc); 494 return (0); 495 } 496 497 /**************************************************************** 498 * Routines for the "Type A" hardware 499 ****************************************************************/ 500 #ifdef _SUN3_ 501 502 static void 503 cg4a_init(struct cg4_softc *sc) 504 { 505 volatile struct amd_regs *ar = sc->sc_va_cmap; 506 struct soft_cmap *cm = &sc->sc_cmap; 507 int i; 508 509 /* Grab initial (current) color map. */ 510 for(i = 0; i < 256; i++) { 511 cm->r[i] = ar->r[i]; 512 cm->g[i] = ar->g[i]; 513 cm->b[i] = ar->b[i]; 514 } 515 } 516 517 static void 518 cg4a_ldcmap(struct cg4_softc *sc) 519 { 520 volatile struct amd_regs *ar = sc->sc_va_cmap; 521 struct soft_cmap *cm = &sc->sc_cmap; 522 int i; 523 524 /* 525 * Now blast them into the chip! 526 * XXX Should use retrace interrupt! 527 * Just set a "need load" bit and let the 528 * retrace interrupt handler do the work. 529 */ 530 if (sc->sc_video_on) { 531 /* Update H/W colormap. */ 532 for (i = 0; i < 256; i++) { 533 ar->r[i] = cm->r[i]; 534 ar->g[i] = cm->g[i]; 535 ar->b[i] = cm->b[i]; 536 } 537 } else { 538 /* Clear H/W colormap. */ 539 for (i = 0; i < 256; i++) { 540 ar->r[i] = 0; 541 ar->g[i] = 0; 542 ar->b[i] = 0; 543 } 544 } 545 } 546 #endif /* SUN3 */ 547 548 /**************************************************************** 549 * Routines for the "Type B" hardware 550 ****************************************************************/ 551 552 static void 553 cg4b_init(struct cg4_softc *sc) 554 { 555 volatile struct bt_regs *bt = sc->sc_va_cmap; 556 struct soft_cmap *cm = &sc->sc_cmap; 557 union bt_cmap_u *btcm; 558 int i; 559 560 /* Need a buffer for colormap format translation. */ 561 btcm = malloc(sizeof(*btcm), M_DEVBUF, M_WAITOK); 562 sc->sc_btcm = btcm; 563 564 /* 565 * BT458 chip initialization as described in Brooktree's 566 * 1993 Graphics and Imaging Product Databook (DB004-1/93). 567 * 568 * It appears that the 3/60 uses the low byte, and the 3/80 569 * uses the high byte, while both ignore the other bytes. 570 * Writing same value to all bytes works on both. 571 */ 572 bt->bt_addr = 0x04040404; /* select read mask register */ 573 bt->bt_ctrl = ~0; /* all planes on */ 574 bt->bt_addr = 0x05050505; /* select blink mask register */ 575 bt->bt_ctrl = 0; /* all planes non-blinking */ 576 bt->bt_addr = 0x06060606; /* select command register */ 577 bt->bt_ctrl = 0x43434343; /* palette enabled, overlay planes enabled */ 578 bt->bt_addr = 0x07070707; /* select test register */ 579 bt->bt_ctrl = 0; /* not test mode */ 580 581 /* grab initial (current) color map */ 582 bt->bt_addr = 0; 583 #ifdef _SUN3_ 584 /* Sun3/60 wants 32-bit access, packed. */ 585 for (i = 0; i < (256 * 3 / 4); i++) 586 btcm->btcm_int[i] = bt->bt_cmap; 587 #else /* SUN3 */ 588 /* Sun3/80 wants 8-bits in the high byte. */ 589 for (i = 0; i < (256 * 3); i++) 590 btcm->btcm_char[i] = bt->bt_cmap >> 24; 591 #endif /* SUN3 */ 592 593 /* Transpose into H/W cmap into S/W form. */ 594 for (i = 0; i < 256; i++) { 595 cm->r[i] = btcm->btcm_rgb[i][0]; 596 cm->g[i] = btcm->btcm_rgb[i][1]; 597 cm->b[i] = btcm->btcm_rgb[i][2]; 598 } 599 } 600 601 static void 602 cg4b_ldcmap(struct cg4_softc *sc) 603 { 604 volatile struct bt_regs *bt = sc->sc_va_cmap; 605 struct soft_cmap *cm = &sc->sc_cmap; 606 union bt_cmap_u *btcm = sc->sc_btcm; 607 int i; 608 609 /* Transpose S/W cmap into H/W form. */ 610 for (i = 0; i < 256; i++) { 611 btcm->btcm_rgb[i][0] = cm->r[i]; 612 btcm->btcm_rgb[i][1] = cm->g[i]; 613 btcm->btcm_rgb[i][2] = cm->b[i]; 614 } 615 616 /* 617 * Now blast them into the chip! 618 * XXX Should use retrace interrupt! 619 * Just set a "need load" bit and let the 620 * retrace interrupt handler do the work. 621 */ 622 bt->bt_addr = 0; 623 624 #ifdef _SUN3_ 625 /* Sun3/60 wants 32-bit access, packed. */ 626 if (sc->sc_video_on) { 627 /* Update H/W colormap. */ 628 for (i = 0; i < (256 * 3 / 4); i++) 629 bt->bt_cmap = btcm->btcm_int[i]; 630 } else { 631 /* Clear H/W colormap. */ 632 for (i = 0; i < (256 * 3 / 4); i++) 633 bt->bt_cmap = 0; 634 } 635 #else /* SUN3 */ 636 /* Sun3/80 wants 8-bits in the high byte. */ 637 if (sc->sc_video_on) { 638 /* Update H/W colormap. */ 639 for (i = 0; i < (256 * 3); i++) 640 bt->bt_cmap = btcm->btcm_char[i] << 24; 641 } else { 642 /* Clear H/W colormap. */ 643 for (i = 0; i < (256 * 3); i++) 644 bt->bt_cmap = 0; 645 } 646 #endif /* SUN3 */ 647 } 648 649