1 /* $NetBSD: cg4.c,v 1.40 2014/03/16 05:20:26 dholland Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93 41 */ 42 43 /* 44 * color display (cg4) driver. 45 * 46 * Credits, history: 47 * Gordon Ross created this driver based on the cg3 driver from 48 * the sparc port as distributed in BSD 4.4 Lite, but included 49 * support for only the "type B" adapter (Brooktree DACs). 50 * Ezra Story added support for the "type A" (AMD DACs). 51 * 52 * Todo: 53 * Make this driver handle video interrupts. 54 * Defer colormap updates to vertical retrace interrupts. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: cg4.c,v 1.40 2014/03/16 05:20:26 dholland Exp $"); 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/conf.h> 63 #include <sys/device.h> 64 #include <sys/ioctl.h> 65 #include <sys/malloc.h> 66 #include <sys/mman.h> 67 #include <sys/proc.h> 68 #include <sys/tty.h> 69 70 #include <uvm/uvm_extern.h> 71 72 #include <machine/autoconf.h> 73 #include <machine/cpu.h> 74 #include <dev/sun/fbio.h> 75 #include <machine/idprom.h> 76 #include <machine/pmap.h> 77 78 #include <sun3/dev/fbvar.h> 79 #include <sun3/dev/btreg.h> 80 #include <sun3/dev/cg4reg.h> 81 #include <sun3/dev/p4reg.h> 82 83 #include "ioconf.h" 84 85 union bt_cmap_u { 86 uint8_t btcm_char[256 * 3]; /* raw data */ 87 uint8_t btcm_rgb[256][3]; /* 256 R/G/B entries */ 88 u_int btcm_int[256 * 3 / 4]; /* the way the chip gets loaded */ 89 }; 90 91 #define CG4_TYPE_A 0 /* AMD DACs */ 92 #define CG4_TYPE_B 1 /* Brooktree DACs */ 93 94 #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE) 95 96 #define CMAP_SIZE 256 97 struct soft_cmap { 98 uint8_t r[CMAP_SIZE]; 99 uint8_t g[CMAP_SIZE]; 100 uint8_t b[CMAP_SIZE]; 101 }; 102 103 /* per-display variables */ 104 struct cg4_softc { 105 device_t sc_dev; /* base device */ 106 struct fbdevice sc_fb; /* frame buffer device */ 107 int sc_cg4type; /* A or B */ 108 int sc_pa_overlay; /* phys. addr. of overlay plane */ 109 int sc_pa_enable; /* phys. addr. of enable plane */ 110 int sc_pa_pixmap; /* phys. addr. of color plane */ 111 int sc_video_on; /* zero if blanked */ 112 void *sc_va_cmap; /* Colormap h/w (mapped KVA) */ 113 void *sc_btcm; /* Soft cmap, Brooktree format */ 114 void (*sc_ldcmap)(struct cg4_softc *); 115 struct soft_cmap sc_cmap; /* Soft cmap, user format */ 116 }; 117 118 /* autoconfiguration driver */ 119 static int cg4match(device_t, cfdata_t, void *); 120 static void cg4attach(device_t, device_t, void *); 121 122 CFATTACH_DECL_NEW(cgfour, sizeof(struct cg4_softc), 123 cg4match, cg4attach, NULL, NULL); 124 125 dev_type_open(cg4open); 126 dev_type_ioctl(cg4ioctl); 127 dev_type_mmap(cg4mmap); 128 129 const struct cdevsw cgfour_cdevsw = { 130 .d_open = cg4open, 131 .d_close = nullclose, 132 .d_read = noread, 133 .d_write = nowrite, 134 .d_ioctl = cg4ioctl, 135 .d_stop = nostop, 136 .d_tty = notty, 137 .d_poll = nopoll, 138 .d_mmap = cg4mmap, 139 .d_kqfilter = nokqfilter, 140 .d_flag = 0 141 }; 142 143 static int cg4gattr (struct fbdevice *, void *); 144 static int cg4gvideo (struct fbdevice *, void *); 145 static int cg4svideo (struct fbdevice *, void *); 146 static int cg4getcmap(struct fbdevice *, void *); 147 static int cg4putcmap(struct fbdevice *, void *); 148 149 #ifdef _SUN3_ 150 static void cg4a_init (struct cg4_softc *); 151 static void cg4a_ldcmap(struct cg4_softc *); 152 #endif /* SUN3 */ 153 154 static void cg4b_init (struct cg4_softc *); 155 static void cg4b_ldcmap(struct cg4_softc *); 156 157 static struct fbdriver cg4_fbdriver = { 158 cg4open, nullclose, cg4mmap, nokqfilter, cg4gattr, 159 cg4gvideo, cg4svideo, 160 cg4getcmap, cg4putcmap }; 161 162 /* 163 * Match a cg4. 164 */ 165 static int 166 cg4match(device_t parent, cfdata_t cf, void *args) 167 { 168 struct confargs *ca = args; 169 int mid, p4id, peekval, tmp; 170 void *p4reg; 171 172 /* No default address support. */ 173 if (ca->ca_paddr == -1) 174 return 0; 175 176 /* 177 * Slight hack here: The low four bits of the 178 * config flags, if set, restrict the match to 179 * that machine "implementation" only. 180 */ 181 mid = cf->cf_flags & IDM_IMPL_MASK; 182 if (mid && (mid != (cpu_machine_id & IDM_IMPL_MASK))) 183 return 0; 184 185 /* 186 * The config flag 0x10 if set means we are 187 * looking for a Type A board (3/110). 188 */ 189 if (cf->cf_flags & 0x10) { 190 #ifdef _SUN3_ 191 /* Type A: Check for AMD RAMDACs in control space. */ 192 if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1) 193 return 0; 194 /* Check for the overlay plane. */ 195 tmp = ca->ca_paddr + CG4A_OFF_OVERLAY; 196 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 197 return 0; 198 /* OK, it looks like a Type A. */ 199 return 1; 200 #else /* SUN3 */ 201 /* Only the Sun3/110 ever has a type A. */ 202 return 0; 203 #endif /* SUN3 */ 204 } 205 206 /* 207 * From here on, it is a type B or nothing. 208 * The config flag 0x20 if set means there 209 * is no P4 register. (bus error) 210 */ 211 if ((cf->cf_flags & 0x20) == 0) { 212 p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr); 213 peekval = peek_long(p4reg); 214 p4id = (peekval == -1) ? 215 P4_NOTFOUND : fb_pfour_id(p4reg); 216 bus_tmapout(p4reg); 217 if (peekval == -1) 218 return (0); 219 if (p4id != P4_ID_COLOR8P1) { 220 #ifdef DEBUG 221 aprint_debug("cgfour at 0x%lx match p4id=0x%x fails\n", 222 ca->ca_paddr, p4id & 0xFF); 223 #endif 224 return 0; 225 } 226 } 227 228 /* 229 * Check for CMAP hardware and overlay plane. 230 */ 231 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 232 if (bus_peek(ca->ca_bustype, tmp, 4) == -1) 233 return 0; 234 tmp = ca->ca_paddr + CG4B_OFF_OVERLAY; 235 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 236 return 0; 237 238 return 1; 239 } 240 241 /* 242 * Attach a display. We need to notice if it is the console, too. 243 */ 244 static void 245 cg4attach(device_t parent, device_t self, void *args) 246 { 247 struct cg4_softc *sc = device_private(self); 248 struct fbdevice *fb = &sc->sc_fb; 249 struct confargs *ca = args; 250 struct fbtype *fbt; 251 int tmp; 252 253 sc->sc_dev = self; 254 255 fbt = &fb->fb_fbtype; 256 fbt->fb_type = FBTYPE_SUN4COLOR; 257 fbt->fb_width = 1152; /* default - see below */ 258 fbt->fb_height = 900; /* default - see below */ 259 fbt->fb_depth = 8; 260 fbt->fb_cmsize = 256; 261 fbt->fb_size = CG4_MMAP_SIZE; 262 fb->fb_driver = &cg4_fbdriver; 263 fb->fb_private = sc; 264 fb->fb_name = device_xname(self); 265 fb->fb_flags = device_cfdata(self)->cf_flags; 266 267 /* 268 * The config flag 0x10 if set means we are 269 * attaching a Type A (3/110) which has the 270 * AMD RAMDACs in control space, and no P4. 271 */ 272 if (fb->fb_flags & 0x10) { 273 #ifdef _SUN3_ 274 sc->sc_cg4type = CG4_TYPE_A; 275 sc->sc_ldcmap = cg4a_ldcmap; 276 sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY; 277 sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE; 278 sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP; 279 sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP, 280 sizeof(struct amd_regs)); 281 cg4a_init(sc); 282 #else /* SUN3 */ 283 panic("cgfour flags 0x10"); 284 #endif /* SUN3 */ 285 } else { 286 sc->sc_cg4type = CG4_TYPE_B; 287 sc->sc_ldcmap = cg4b_ldcmap; 288 sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY; 289 sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE; 290 sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP; 291 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 292 sc->sc_va_cmap = bus_mapin(ca->ca_bustype, tmp, 293 sizeof(struct bt_regs)); 294 cg4b_init(sc); 295 } 296 297 if ((fb->fb_flags & 0x20) == 0) { 298 /* It is supposed to have a P4 register. */ 299 fb->fb_pfour = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4); 300 } 301 302 /* 303 * Determine width and height as follows: 304 * If it has a P4 register, use that; 305 * else if unit==0, use the EEPROM size, 306 * else make our best guess. 307 */ 308 if (fb->fb_pfour) 309 fb_pfour_setsize(fb); 310 /* XXX device_unit() abuse */ 311 else if (device_unit(self) == 0) 312 fb_eeprom_setsize(fb); 313 else { 314 /* Guess based on machine ID. */ 315 switch (cpu_machine_id) { 316 default: 317 /* Leave the defaults set above. */ 318 break; 319 } 320 } 321 aprint_normal(" (%dx%d)\n", fbt->fb_width, fbt->fb_height); 322 323 /* 324 * Make sure video is on. This driver uses a 325 * black colormap to blank the screen, so if 326 * there is any global enable, set it here. 327 */ 328 tmp = 1; 329 cg4svideo(fb, &tmp); 330 if (fb->fb_pfour) 331 fb_pfour_set_video(fb, 1); 332 else 333 enable_video(1); 334 335 /* Let /dev/fb know we are here. */ 336 fb_attach(fb, 4); 337 } 338 339 int 340 cg4open(dev_t dev, int flags, int mode, struct lwp *l) 341 { 342 struct cg4_softc *sc; 343 int unit = minor(dev); 344 345 sc = device_lookup_private(&cgfour_cd, unit); 346 if (sc == NULL) 347 return ENXIO; 348 return 0; 349 } 350 351 int 352 cg4ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 353 { 354 struct cg4_softc *sc = device_lookup_private(&cgfour_cd, minor(dev)); 355 356 return fbioctlfb(&sc->sc_fb, cmd, data); 357 } 358 359 /* 360 * Return the address that would map the given device at the given 361 * offset, allowing for the given protection, or return -1 for error. 362 * 363 * X11 expects its mmap'd region to look like this: 364 * 128k overlay data memory 365 * 128k overlay enable bitmap 366 * 1024k color memory 367 * 368 * The hardware looks completely different. 369 */ 370 paddr_t 371 cg4mmap(dev_t dev, off_t off, int prot) 372 { 373 struct cg4_softc *sc = device_lookup_private(&cgfour_cd, minor(dev)); 374 int physbase; 375 376 if (off & PGOFSET) 377 panic("%s: bad offset", __func__); 378 379 if ((off < 0) || (off >= CG4_MMAP_SIZE)) 380 return -1; 381 382 if (off < 0x40000) { 383 if (off < 0x20000) { 384 physbase = sc->sc_pa_overlay; 385 } else { 386 /* enable plane */ 387 off -= 0x20000; 388 physbase = sc->sc_pa_enable; 389 } 390 } else { 391 /* pixel map */ 392 off -= 0x40000; 393 physbase = sc->sc_pa_pixmap; 394 } 395 396 /* 397 * I turned on PMAP_NC here to disable the cache as I was 398 * getting horribly broken behaviour without it. 399 */ 400 return (physbase + off) | PMAP_NC; 401 } 402 403 /* 404 * Internal ioctl functions. 405 */ 406 407 /* FBIOGATTR: */ 408 static int 409 cg4gattr(struct fbdevice *fb, void *data) 410 { 411 struct fbgattr *fba = data; 412 413 fba->real_type = fb->fb_fbtype.fb_type; 414 fba->owner = 0; /* XXX - TIOCCONS stuff? */ 415 fba->fbtype = fb->fb_fbtype; 416 fba->sattr.flags = 0; 417 fba->sattr.emu_type = fb->fb_fbtype.fb_type; 418 fba->sattr.dev_specific[0] = -1; 419 fba->emu_types[0] = fb->fb_fbtype.fb_type; 420 fba->emu_types[1] = -1; 421 return 0; 422 } 423 424 /* FBIOGVIDEO: */ 425 static int 426 cg4gvideo(struct fbdevice *fb, void *data) 427 { 428 struct cg4_softc *sc = fb->fb_private; 429 int *on = data; 430 431 *on = sc->sc_video_on; 432 return 0; 433 } 434 435 /* FBIOSVIDEO: */ 436 static int 437 cg4svideo(struct fbdevice *fb, void *data) 438 { 439 struct cg4_softc *sc = fb->fb_private; 440 int *on = data; 441 442 if (sc->sc_video_on == *on) 443 return 0; 444 sc->sc_video_on = *on; 445 446 (*sc->sc_ldcmap)(sc); 447 return 0; 448 } 449 450 /* 451 * FBIOGETCMAP: 452 * Copy current colormap out to user space. 453 */ 454 static int 455 cg4getcmap(struct fbdevice *fb, void *data) 456 { 457 struct cg4_softc *sc = fb->fb_private; 458 struct soft_cmap *cm = &sc->sc_cmap; 459 struct fbcmap *fbcm = data; 460 u_int start, count; 461 int error; 462 463 start = fbcm->index; 464 count = fbcm->count; 465 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 466 return EINVAL; 467 468 if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0) 469 return error; 470 471 if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0) 472 return error; 473 474 if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0) 475 return error; 476 477 return 0; 478 } 479 480 /* 481 * FBIOPUTCMAP: 482 * Copy new colormap from user space and load. 483 */ 484 static int 485 cg4putcmap(struct fbdevice *fb, void *data) 486 { 487 struct cg4_softc *sc = fb->fb_private; 488 struct soft_cmap *cm = &sc->sc_cmap; 489 struct fbcmap *fbcm = data; 490 u_int start, count; 491 int error; 492 493 start = fbcm->index; 494 count = fbcm->count; 495 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 496 return EINVAL; 497 498 if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0) 499 return error; 500 501 if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0) 502 return error; 503 504 if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0) 505 return error; 506 507 (*sc->sc_ldcmap)(sc); 508 return 0; 509 } 510 511 /**************************************************************** 512 * Routines for the "Type A" hardware 513 ****************************************************************/ 514 #ifdef _SUN3_ 515 516 static void 517 cg4a_init(struct cg4_softc *sc) 518 { 519 volatile struct amd_regs *ar = sc->sc_va_cmap; 520 struct soft_cmap *cm = &sc->sc_cmap; 521 int i; 522 523 /* Grab initial (current) color map. */ 524 for(i = 0; i < 256; i++) { 525 cm->r[i] = ar->r[i]; 526 cm->g[i] = ar->g[i]; 527 cm->b[i] = ar->b[i]; 528 } 529 } 530 531 static void 532 cg4a_ldcmap(struct cg4_softc *sc) 533 { 534 volatile struct amd_regs *ar = sc->sc_va_cmap; 535 struct soft_cmap *cm = &sc->sc_cmap; 536 int i; 537 538 /* 539 * Now blast them into the chip! 540 * XXX Should use retrace interrupt! 541 * Just set a "need load" bit and let the 542 * retrace interrupt handler do the work. 543 */ 544 if (sc->sc_video_on) { 545 /* Update H/W colormap. */ 546 for (i = 0; i < 256; i++) { 547 ar->r[i] = cm->r[i]; 548 ar->g[i] = cm->g[i]; 549 ar->b[i] = cm->b[i]; 550 } 551 } else { 552 /* Clear H/W colormap. */ 553 for (i = 0; i < 256; i++) { 554 ar->r[i] = 0; 555 ar->g[i] = 0; 556 ar->b[i] = 0; 557 } 558 } 559 } 560 #endif /* SUN3 */ 561 562 /**************************************************************** 563 * Routines for the "Type B" hardware 564 ****************************************************************/ 565 566 static void 567 cg4b_init(struct cg4_softc *sc) 568 { 569 volatile struct bt_regs *bt = sc->sc_va_cmap; 570 struct soft_cmap *cm = &sc->sc_cmap; 571 union bt_cmap_u *btcm; 572 int i; 573 574 /* Need a buffer for colormap format translation. */ 575 btcm = malloc(sizeof(*btcm), M_DEVBUF, M_WAITOK); 576 sc->sc_btcm = btcm; 577 578 /* 579 * BT458 chip initialization as described in Brooktree's 580 * 1993 Graphics and Imaging Product Databook (DB004-1/93). 581 * 582 * It appears that the 3/60 uses the low byte, and the 3/80 583 * uses the high byte, while both ignore the other bytes. 584 * Writing same value to all bytes works on both. 585 */ 586 bt->bt_addr = 0x04040404; /* select read mask register */ 587 bt->bt_ctrl = ~0; /* all planes on */ 588 bt->bt_addr = 0x05050505; /* select blink mask register */ 589 bt->bt_ctrl = 0; /* all planes non-blinking */ 590 bt->bt_addr = 0x06060606; /* select command register */ 591 bt->bt_ctrl = 0x43434343; /* palette enabled, overlay planes enabled */ 592 bt->bt_addr = 0x07070707; /* select test register */ 593 bt->bt_ctrl = 0; /* not test mode */ 594 595 /* grab initial (current) color map */ 596 bt->bt_addr = 0; 597 #ifdef _SUN3_ 598 /* Sun3/60 wants 32-bit access, packed. */ 599 for (i = 0; i < (256 * 3 / 4); i++) 600 btcm->btcm_int[i] = bt->bt_cmap; 601 #else /* SUN3 */ 602 /* Sun3/80 wants 8-bits in the high byte. */ 603 for (i = 0; i < (256 * 3); i++) 604 btcm->btcm_char[i] = bt->bt_cmap >> 24; 605 #endif /* SUN3 */ 606 607 /* Transpose into H/W cmap into S/W form. */ 608 for (i = 0; i < 256; i++) { 609 cm->r[i] = btcm->btcm_rgb[i][0]; 610 cm->g[i] = btcm->btcm_rgb[i][1]; 611 cm->b[i] = btcm->btcm_rgb[i][2]; 612 } 613 } 614 615 static void 616 cg4b_ldcmap(struct cg4_softc *sc) 617 { 618 volatile struct bt_regs *bt = sc->sc_va_cmap; 619 struct soft_cmap *cm = &sc->sc_cmap; 620 union bt_cmap_u *btcm = sc->sc_btcm; 621 int i; 622 623 /* Transpose S/W cmap into H/W form. */ 624 for (i = 0; i < 256; i++) { 625 btcm->btcm_rgb[i][0] = cm->r[i]; 626 btcm->btcm_rgb[i][1] = cm->g[i]; 627 btcm->btcm_rgb[i][2] = cm->b[i]; 628 } 629 630 /* 631 * Now blast them into the chip! 632 * XXX Should use retrace interrupt! 633 * Just set a "need load" bit and let the 634 * retrace interrupt handler do the work. 635 */ 636 bt->bt_addr = 0; 637 638 #ifdef _SUN3_ 639 /* Sun3/60 wants 32-bit access, packed. */ 640 if (sc->sc_video_on) { 641 /* Update H/W colormap. */ 642 for (i = 0; i < (256 * 3 / 4); i++) 643 bt->bt_cmap = btcm->btcm_int[i]; 644 } else { 645 /* Clear H/W colormap. */ 646 for (i = 0; i < (256 * 3 / 4); i++) 647 bt->bt_cmap = 0; 648 } 649 #else /* SUN3 */ 650 /* Sun3/80 wants 8-bits in the high byte. */ 651 if (sc->sc_video_on) { 652 /* Update H/W colormap. */ 653 for (i = 0; i < (256 * 3); i++) 654 bt->bt_cmap = btcm->btcm_char[i] << 24; 655 } else { 656 /* Clear H/W colormap. */ 657 for (i = 0; i < (256 * 3); i++) 658 bt->bt_cmap = 0; 659 } 660 #endif /* SUN3 */ 661 } 662