1 /* $NetBSD: cg4.c,v 1.39 2008/06/28 12:13:38 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: @(#)cgthree.c 8.2 (Berkeley) 10/30/93 41 */ 42 43 /* 44 * color display (cg4) driver. 45 * 46 * Credits, history: 47 * Gordon Ross created this driver based on the cg3 driver from 48 * the sparc port as distributed in BSD 4.4 Lite, but included 49 * support for only the "type B" adapter (Brooktree DACs). 50 * Ezra Story added support for the "type A" (AMD DACs). 51 * 52 * Todo: 53 * Make this driver handle video interrupts. 54 * Defer colormap updates to vertical retrace interrupts. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: cg4.c,v 1.39 2008/06/28 12:13:38 tsutsui Exp $"); 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/conf.h> 63 #include <sys/device.h> 64 #include <sys/ioctl.h> 65 #include <sys/malloc.h> 66 #include <sys/mman.h> 67 #include <sys/proc.h> 68 #include <sys/tty.h> 69 70 #include <uvm/uvm_extern.h> 71 72 #include <machine/autoconf.h> 73 #include <machine/cpu.h> 74 #include <dev/sun/fbio.h> 75 #include <machine/idprom.h> 76 #include <machine/pmap.h> 77 78 #include <sun3/dev/fbvar.h> 79 #include <sun3/dev/btreg.h> 80 #include <sun3/dev/cg4reg.h> 81 #include <sun3/dev/p4reg.h> 82 83 #include "ioconf.h" 84 85 union bt_cmap_u { 86 uint8_t btcm_char[256 * 3]; /* raw data */ 87 uint8_t btcm_rgb[256][3]; /* 256 R/G/B entries */ 88 u_int btcm_int[256 * 3 / 4]; /* the way the chip gets loaded */ 89 }; 90 91 #define CG4_TYPE_A 0 /* AMD DACs */ 92 #define CG4_TYPE_B 1 /* Brooktree DACs */ 93 94 #define CG4_MMAP_SIZE (CG4_OVERLAY_SIZE + CG4_ENABLE_SIZE + CG4_PIXMAP_SIZE) 95 96 #define CMAP_SIZE 256 97 struct soft_cmap { 98 uint8_t r[CMAP_SIZE]; 99 uint8_t g[CMAP_SIZE]; 100 uint8_t b[CMAP_SIZE]; 101 }; 102 103 /* per-display variables */ 104 struct cg4_softc { 105 device_t sc_dev; /* base device */ 106 struct fbdevice sc_fb; /* frame buffer device */ 107 int sc_cg4type; /* A or B */ 108 int sc_pa_overlay; /* phys. addr. of overlay plane */ 109 int sc_pa_enable; /* phys. addr. of enable plane */ 110 int sc_pa_pixmap; /* phys. addr. of color plane */ 111 int sc_video_on; /* zero if blanked */ 112 void *sc_va_cmap; /* Colormap h/w (mapped KVA) */ 113 void *sc_btcm; /* Soft cmap, Brooktree format */ 114 void (*sc_ldcmap)(struct cg4_softc *); 115 struct soft_cmap sc_cmap; /* Soft cmap, user format */ 116 }; 117 118 /* autoconfiguration driver */ 119 static int cg4match(device_t, cfdata_t, void *); 120 static void cg4attach(device_t, device_t, void *); 121 122 CFATTACH_DECL_NEW(cgfour, sizeof(struct cg4_softc), 123 cg4match, cg4attach, NULL, NULL); 124 125 dev_type_open(cg4open); 126 dev_type_ioctl(cg4ioctl); 127 dev_type_mmap(cg4mmap); 128 129 const struct cdevsw cgfour_cdevsw = { 130 cg4open, nullclose, noread, nowrite, cg4ioctl, 131 nostop, notty, nopoll, cg4mmap, nokqfilter, 132 }; 133 134 static int cg4gattr (struct fbdevice *, void *); 135 static int cg4gvideo (struct fbdevice *, void *); 136 static int cg4svideo (struct fbdevice *, void *); 137 static int cg4getcmap(struct fbdevice *, void *); 138 static int cg4putcmap(struct fbdevice *, void *); 139 140 #ifdef _SUN3_ 141 static void cg4a_init (struct cg4_softc *); 142 static void cg4a_ldcmap(struct cg4_softc *); 143 #endif /* SUN3 */ 144 145 static void cg4b_init (struct cg4_softc *); 146 static void cg4b_ldcmap(struct cg4_softc *); 147 148 static struct fbdriver cg4_fbdriver = { 149 cg4open, nullclose, cg4mmap, nokqfilter, cg4gattr, 150 cg4gvideo, cg4svideo, 151 cg4getcmap, cg4putcmap }; 152 153 /* 154 * Match a cg4. 155 */ 156 static int 157 cg4match(device_t parent, cfdata_t cf, void *args) 158 { 159 struct confargs *ca = args; 160 int mid, p4id, peekval, tmp; 161 void *p4reg; 162 163 /* No default address support. */ 164 if (ca->ca_paddr == -1) 165 return 0; 166 167 /* 168 * Slight hack here: The low four bits of the 169 * config flags, if set, restrict the match to 170 * that machine "implementation" only. 171 */ 172 mid = cf->cf_flags & IDM_IMPL_MASK; 173 if (mid && (mid != (cpu_machine_id & IDM_IMPL_MASK))) 174 return 0; 175 176 /* 177 * The config flag 0x10 if set means we are 178 * looking for a Type A board (3/110). 179 */ 180 if (cf->cf_flags & 0x10) { 181 #ifdef _SUN3_ 182 /* Type A: Check for AMD RAMDACs in control space. */ 183 if (bus_peek(BUS_OBIO, CG4A_OBIO_CMAP, 1) == -1) 184 return 0; 185 /* Check for the overlay plane. */ 186 tmp = ca->ca_paddr + CG4A_OFF_OVERLAY; 187 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 188 return 0; 189 /* OK, it looks like a Type A. */ 190 return 1; 191 #else /* SUN3 */ 192 /* Only the Sun3/110 ever has a type A. */ 193 return 0; 194 #endif /* SUN3 */ 195 } 196 197 /* 198 * From here on, it is a type B or nothing. 199 * The config flag 0x20 if set means there 200 * is no P4 register. (bus error) 201 */ 202 if ((cf->cf_flags & 0x20) == 0) { 203 p4reg = bus_tmapin(ca->ca_bustype, ca->ca_paddr); 204 peekval = peek_long(p4reg); 205 p4id = (peekval == -1) ? 206 P4_NOTFOUND : fb_pfour_id(p4reg); 207 bus_tmapout(p4reg); 208 if (peekval == -1) 209 return (0); 210 if (p4id != P4_ID_COLOR8P1) { 211 #ifdef DEBUG 212 aprint_debug("cgfour at 0x%lx match p4id=0x%x fails\n", 213 ca->ca_paddr, p4id & 0xFF); 214 #endif 215 return 0; 216 } 217 } 218 219 /* 220 * Check for CMAP hardware and overlay plane. 221 */ 222 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 223 if (bus_peek(ca->ca_bustype, tmp, 4) == -1) 224 return 0; 225 tmp = ca->ca_paddr + CG4B_OFF_OVERLAY; 226 if (bus_peek(ca->ca_bustype, tmp, 1) == -1) 227 return 0; 228 229 return 1; 230 } 231 232 /* 233 * Attach a display. We need to notice if it is the console, too. 234 */ 235 static void 236 cg4attach(device_t parent, device_t self, void *args) 237 { 238 struct cg4_softc *sc = device_private(self); 239 struct fbdevice *fb = &sc->sc_fb; 240 struct confargs *ca = args; 241 struct fbtype *fbt; 242 int tmp; 243 244 sc->sc_dev = self; 245 246 fbt = &fb->fb_fbtype; 247 fbt->fb_type = FBTYPE_SUN4COLOR; 248 fbt->fb_width = 1152; /* default - see below */ 249 fbt->fb_height = 900; /* default - see below */ 250 fbt->fb_depth = 8; 251 fbt->fb_cmsize = 256; 252 fbt->fb_size = CG4_MMAP_SIZE; 253 fb->fb_driver = &cg4_fbdriver; 254 fb->fb_private = sc; 255 fb->fb_name = device_xname(self); 256 fb->fb_flags = device_cfdata(self)->cf_flags; 257 258 /* 259 * The config flag 0x10 if set means we are 260 * attaching a Type A (3/110) which has the 261 * AMD RAMDACs in control space, and no P4. 262 */ 263 if (fb->fb_flags & 0x10) { 264 #ifdef _SUN3_ 265 sc->sc_cg4type = CG4_TYPE_A; 266 sc->sc_ldcmap = cg4a_ldcmap; 267 sc->sc_pa_overlay = ca->ca_paddr + CG4A_OFF_OVERLAY; 268 sc->sc_pa_enable = ca->ca_paddr + CG4A_OFF_ENABLE; 269 sc->sc_pa_pixmap = ca->ca_paddr + CG4A_OFF_PIXMAP; 270 sc->sc_va_cmap = bus_mapin(BUS_OBIO, CG4A_OBIO_CMAP, 271 sizeof(struct amd_regs)); 272 cg4a_init(sc); 273 #else /* SUN3 */ 274 panic("cgfour flags 0x10"); 275 #endif /* SUN3 */ 276 } else { 277 sc->sc_cg4type = CG4_TYPE_B; 278 sc->sc_ldcmap = cg4b_ldcmap; 279 sc->sc_pa_overlay = ca->ca_paddr + CG4B_OFF_OVERLAY; 280 sc->sc_pa_enable = ca->ca_paddr + CG4B_OFF_ENABLE; 281 sc->sc_pa_pixmap = ca->ca_paddr + CG4B_OFF_PIXMAP; 282 tmp = ca->ca_paddr + CG4B_OFF_CMAP; 283 sc->sc_va_cmap = bus_mapin(ca->ca_bustype, tmp, 284 sizeof(struct bt_regs)); 285 cg4b_init(sc); 286 } 287 288 if ((fb->fb_flags & 0x20) == 0) { 289 /* It is supposed to have a P4 register. */ 290 fb->fb_pfour = bus_mapin(ca->ca_bustype, ca->ca_paddr, 4); 291 } 292 293 /* 294 * Determine width and height as follows: 295 * If it has a P4 register, use that; 296 * else if unit==0, use the EEPROM size, 297 * else make our best guess. 298 */ 299 if (fb->fb_pfour) 300 fb_pfour_setsize(fb); 301 /* XXX device_unit() abuse */ 302 else if (device_unit(self) == 0) 303 fb_eeprom_setsize(fb); 304 else { 305 /* Guess based on machine ID. */ 306 switch (cpu_machine_id) { 307 default: 308 /* Leave the defaults set above. */ 309 break; 310 } 311 } 312 aprint_normal(" (%dx%d)\n", fbt->fb_width, fbt->fb_height); 313 314 /* 315 * Make sure video is on. This driver uses a 316 * black colormap to blank the screen, so if 317 * there is any global enable, set it here. 318 */ 319 tmp = 1; 320 cg4svideo(fb, &tmp); 321 if (fb->fb_pfour) 322 fb_pfour_set_video(fb, 1); 323 else 324 enable_video(1); 325 326 /* Let /dev/fb know we are here. */ 327 fb_attach(fb, 4); 328 } 329 330 int 331 cg4open(dev_t dev, int flags, int mode, struct lwp *l) 332 { 333 struct cg4_softc *sc; 334 int unit = minor(dev); 335 336 sc = device_lookup_private(&cgfour_cd, unit); 337 if (sc == NULL) 338 return ENXIO; 339 return 0; 340 } 341 342 int 343 cg4ioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 344 { 345 struct cg4_softc *sc = device_lookup_private(&cgfour_cd, minor(dev)); 346 347 return fbioctlfb(&sc->sc_fb, cmd, data); 348 } 349 350 /* 351 * Return the address that would map the given device at the given 352 * offset, allowing for the given protection, or return -1 for error. 353 * 354 * X11 expects its mmap'd region to look like this: 355 * 128k overlay data memory 356 * 128k overlay enable bitmap 357 * 1024k color memory 358 * 359 * The hardware looks completely different. 360 */ 361 paddr_t 362 cg4mmap(dev_t dev, off_t off, int prot) 363 { 364 struct cg4_softc *sc = device_lookup_private(&cgfour_cd, minor(dev)); 365 int physbase; 366 367 if (off & PGOFSET) 368 panic("%s: bad offset", __func__); 369 370 if ((off < 0) || (off >= CG4_MMAP_SIZE)) 371 return -1; 372 373 if (off < 0x40000) { 374 if (off < 0x20000) { 375 physbase = sc->sc_pa_overlay; 376 } else { 377 /* enable plane */ 378 off -= 0x20000; 379 physbase = sc->sc_pa_enable; 380 } 381 } else { 382 /* pixel map */ 383 off -= 0x40000; 384 physbase = sc->sc_pa_pixmap; 385 } 386 387 /* 388 * I turned on PMAP_NC here to disable the cache as I was 389 * getting horribly broken behaviour without it. 390 */ 391 return (physbase + off) | PMAP_NC; 392 } 393 394 /* 395 * Internal ioctl functions. 396 */ 397 398 /* FBIOGATTR: */ 399 static int 400 cg4gattr(struct fbdevice *fb, void *data) 401 { 402 struct fbgattr *fba = data; 403 404 fba->real_type = fb->fb_fbtype.fb_type; 405 fba->owner = 0; /* XXX - TIOCCONS stuff? */ 406 fba->fbtype = fb->fb_fbtype; 407 fba->sattr.flags = 0; 408 fba->sattr.emu_type = fb->fb_fbtype.fb_type; 409 fba->sattr.dev_specific[0] = -1; 410 fba->emu_types[0] = fb->fb_fbtype.fb_type; 411 fba->emu_types[1] = -1; 412 return 0; 413 } 414 415 /* FBIOGVIDEO: */ 416 static int 417 cg4gvideo(struct fbdevice *fb, void *data) 418 { 419 struct cg4_softc *sc = fb->fb_private; 420 int *on = data; 421 422 *on = sc->sc_video_on; 423 return 0; 424 } 425 426 /* FBIOSVIDEO: */ 427 static int 428 cg4svideo(struct fbdevice *fb, void *data) 429 { 430 struct cg4_softc *sc = fb->fb_private; 431 int *on = data; 432 433 if (sc->sc_video_on == *on) 434 return 0; 435 sc->sc_video_on = *on; 436 437 (*sc->sc_ldcmap)(sc); 438 return 0; 439 } 440 441 /* 442 * FBIOGETCMAP: 443 * Copy current colormap out to user space. 444 */ 445 static int 446 cg4getcmap(struct fbdevice *fb, void *data) 447 { 448 struct cg4_softc *sc = fb->fb_private; 449 struct soft_cmap *cm = &sc->sc_cmap; 450 struct fbcmap *fbcm = data; 451 u_int start, count; 452 int error; 453 454 start = fbcm->index; 455 count = fbcm->count; 456 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 457 return EINVAL; 458 459 if ((error = copyout(&cm->r[start], fbcm->red, count)) != 0) 460 return error; 461 462 if ((error = copyout(&cm->g[start], fbcm->green, count)) != 0) 463 return error; 464 465 if ((error = copyout(&cm->b[start], fbcm->blue, count)) != 0) 466 return error; 467 468 return 0; 469 } 470 471 /* 472 * FBIOPUTCMAP: 473 * Copy new colormap from user space and load. 474 */ 475 static int 476 cg4putcmap(struct fbdevice *fb, void *data) 477 { 478 struct cg4_softc *sc = fb->fb_private; 479 struct soft_cmap *cm = &sc->sc_cmap; 480 struct fbcmap *fbcm = data; 481 u_int start, count; 482 int error; 483 484 start = fbcm->index; 485 count = fbcm->count; 486 if (start >= CMAP_SIZE || count > CMAP_SIZE - start) 487 return EINVAL; 488 489 if ((error = copyin(fbcm->red, &cm->r[start], count)) != 0) 490 return error; 491 492 if ((error = copyin(fbcm->green, &cm->g[start], count)) != 0) 493 return error; 494 495 if ((error = copyin(fbcm->blue, &cm->b[start], count)) != 0) 496 return error; 497 498 (*sc->sc_ldcmap)(sc); 499 return 0; 500 } 501 502 /**************************************************************** 503 * Routines for the "Type A" hardware 504 ****************************************************************/ 505 #ifdef _SUN3_ 506 507 static void 508 cg4a_init(struct cg4_softc *sc) 509 { 510 volatile struct amd_regs *ar = sc->sc_va_cmap; 511 struct soft_cmap *cm = &sc->sc_cmap; 512 int i; 513 514 /* Grab initial (current) color map. */ 515 for(i = 0; i < 256; i++) { 516 cm->r[i] = ar->r[i]; 517 cm->g[i] = ar->g[i]; 518 cm->b[i] = ar->b[i]; 519 } 520 } 521 522 static void 523 cg4a_ldcmap(struct cg4_softc *sc) 524 { 525 volatile struct amd_regs *ar = sc->sc_va_cmap; 526 struct soft_cmap *cm = &sc->sc_cmap; 527 int i; 528 529 /* 530 * Now blast them into the chip! 531 * XXX Should use retrace interrupt! 532 * Just set a "need load" bit and let the 533 * retrace interrupt handler do the work. 534 */ 535 if (sc->sc_video_on) { 536 /* Update H/W colormap. */ 537 for (i = 0; i < 256; i++) { 538 ar->r[i] = cm->r[i]; 539 ar->g[i] = cm->g[i]; 540 ar->b[i] = cm->b[i]; 541 } 542 } else { 543 /* Clear H/W colormap. */ 544 for (i = 0; i < 256; i++) { 545 ar->r[i] = 0; 546 ar->g[i] = 0; 547 ar->b[i] = 0; 548 } 549 } 550 } 551 #endif /* SUN3 */ 552 553 /**************************************************************** 554 * Routines for the "Type B" hardware 555 ****************************************************************/ 556 557 static void 558 cg4b_init(struct cg4_softc *sc) 559 { 560 volatile struct bt_regs *bt = sc->sc_va_cmap; 561 struct soft_cmap *cm = &sc->sc_cmap; 562 union bt_cmap_u *btcm; 563 int i; 564 565 /* Need a buffer for colormap format translation. */ 566 btcm = malloc(sizeof(*btcm), M_DEVBUF, M_WAITOK); 567 sc->sc_btcm = btcm; 568 569 /* 570 * BT458 chip initialization as described in Brooktree's 571 * 1993 Graphics and Imaging Product Databook (DB004-1/93). 572 * 573 * It appears that the 3/60 uses the low byte, and the 3/80 574 * uses the high byte, while both ignore the other bytes. 575 * Writing same value to all bytes works on both. 576 */ 577 bt->bt_addr = 0x04040404; /* select read mask register */ 578 bt->bt_ctrl = ~0; /* all planes on */ 579 bt->bt_addr = 0x05050505; /* select blink mask register */ 580 bt->bt_ctrl = 0; /* all planes non-blinking */ 581 bt->bt_addr = 0x06060606; /* select command register */ 582 bt->bt_ctrl = 0x43434343; /* palette enabled, overlay planes enabled */ 583 bt->bt_addr = 0x07070707; /* select test register */ 584 bt->bt_ctrl = 0; /* not test mode */ 585 586 /* grab initial (current) color map */ 587 bt->bt_addr = 0; 588 #ifdef _SUN3_ 589 /* Sun3/60 wants 32-bit access, packed. */ 590 for (i = 0; i < (256 * 3 / 4); i++) 591 btcm->btcm_int[i] = bt->bt_cmap; 592 #else /* SUN3 */ 593 /* Sun3/80 wants 8-bits in the high byte. */ 594 for (i = 0; i < (256 * 3); i++) 595 btcm->btcm_char[i] = bt->bt_cmap >> 24; 596 #endif /* SUN3 */ 597 598 /* Transpose into H/W cmap into S/W form. */ 599 for (i = 0; i < 256; i++) { 600 cm->r[i] = btcm->btcm_rgb[i][0]; 601 cm->g[i] = btcm->btcm_rgb[i][1]; 602 cm->b[i] = btcm->btcm_rgb[i][2]; 603 } 604 } 605 606 static void 607 cg4b_ldcmap(struct cg4_softc *sc) 608 { 609 volatile struct bt_regs *bt = sc->sc_va_cmap; 610 struct soft_cmap *cm = &sc->sc_cmap; 611 union bt_cmap_u *btcm = sc->sc_btcm; 612 int i; 613 614 /* Transpose S/W cmap into H/W form. */ 615 for (i = 0; i < 256; i++) { 616 btcm->btcm_rgb[i][0] = cm->r[i]; 617 btcm->btcm_rgb[i][1] = cm->g[i]; 618 btcm->btcm_rgb[i][2] = cm->b[i]; 619 } 620 621 /* 622 * Now blast them into the chip! 623 * XXX Should use retrace interrupt! 624 * Just set a "need load" bit and let the 625 * retrace interrupt handler do the work. 626 */ 627 bt->bt_addr = 0; 628 629 #ifdef _SUN3_ 630 /* Sun3/60 wants 32-bit access, packed. */ 631 if (sc->sc_video_on) { 632 /* Update H/W colormap. */ 633 for (i = 0; i < (256 * 3 / 4); i++) 634 bt->bt_cmap = btcm->btcm_int[i]; 635 } else { 636 /* Clear H/W colormap. */ 637 for (i = 0; i < (256 * 3 / 4); i++) 638 bt->bt_cmap = 0; 639 } 640 #else /* SUN3 */ 641 /* Sun3/80 wants 8-bits in the high byte. */ 642 if (sc->sc_video_on) { 643 /* Update H/W colormap. */ 644 for (i = 0; i < (256 * 3); i++) 645 bt->bt_cmap = btcm->btcm_char[i] << 24; 646 } else { 647 /* Clear H/W colormap. */ 648 for (i = 0; i < (256 * 3); i++) 649 bt->bt_cmap = 0; 650 } 651 #endif /* SUN3 */ 652 } 653