xref: /netbsd-src/sys/arch/sun2/dev/zs.c (revision ce2c90c7c172d95d2402a5b3d96d8f8e6d138a21) 
1 /*	$NetBSD: zs.c,v 1.13 2006/10/05 14:12:36 tsutsui Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include <sys/cdefs.h>
48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.13 2006/10/05 14:12:36 tsutsui Exp $");
49 
50 #include "opt_ddb.h"
51 #include "opt_kgdb.h"
52 
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/conf.h>
56 #include <sys/device.h>
57 #include <sys/file.h>
58 #include <sys/ioctl.h>
59 #include <sys/kernel.h>
60 #include <sys/proc.h>
61 #include <sys/tty.h>
62 #include <sys/time.h>
63 #include <sys/syslog.h>
64 
65 #include <machine/autoconf.h>
66 #include <machine/promlib.h>
67 #include <machine/cpu.h>
68 #include <machine/eeprom.h>
69 #include <machine/psl.h>
70 #include <machine/z8530var.h>
71 
72 #include <dev/cons.h>
73 #include <dev/ic/z8530reg.h>
74 #include <dev/sun/kbd_ms_ttyvar.h>
75 #include <ddb/db_output.h>
76 
77 #include <sun2/dev/cons.h>
78 
79 #include "kbd.h"	/* NKBD */
80 #include "ms.h"		/* NMS */
81 
82 /*
83  * Some warts needed by z8530tty.c -
84  * The default parity REALLY needs to be the same as the PROM uses,
85  * or you can not see messages done with printf during boot-up...
86  */
87 int zs_def_cflag = (CREAD | CS8 | HUPCL);
88 
89 /* ZS channel used as the console device (if any) */
90 void *zs_conschan_get, *zs_conschan_put;
91 
92 static u_char zs_init_reg[16] = {
93 	0,	/* 0: CMD (reset, etc.) */
94 	0,	/* 1: No interrupts yet. */
95 #ifdef  ZS_INIT_IVECT
96 	ZS_INIT_IVECT,	/* 2: IVECT */
97 #else
98 	0,	/* 2: IVECT */
99 #endif
100 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
101 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
102 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
103 	0,	/* 6: TXSYNC/SYNCLO */
104 	0,	/* 7: RXSYNC/SYNCHI */
105 	0,	/* 8: alias for data port */
106 #ifdef  ZS_INIT_IVECT
107 	ZSWR9_MASTER_IE,
108 #else
109 	ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
110 #endif
111 	0,	/*10: Misc. TX/RX control bits */
112 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
113 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
114 	0,			/*13: BAUDHI (default=9600) */
115 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
116 	ZSWR15_BREAK_IE,
117 };
118 
119 /* Console ops */
120 static int  zscngetc(dev_t);
121 static void zscnputc(dev_t, int);
122 static void zscnpollc(dev_t, int);
123 
124 struct consdev zs_consdev = {
125 	NULL,
126 	NULL,
127 	zscngetc,
128 	zscnputc,
129 	zscnpollc,
130 	NULL,
131 };
132 
133 
134 /****************************************************************
135  * Autoconfig
136  ****************************************************************/
137 
138 static int  zs_print(void *, const char *name);
139 
140 extern struct cfdriver zs_cd;
141 
142 /* Interrupt handlers. */
143 int zscheckintr(void *);
144 static int zshard(void *);
145 static void zssoft(void *);
146 
147 static int zs_get_speed(struct zs_chanstate *);
148 
149 /*
150  * Attach a found zs.
151  *
152  * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
153  * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
154  */
155 void
156 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
157 {
158 	struct zsc_attach_args zsc_args;
159 	struct zs_chanstate *cs;
160 	int s, channel, softpri = IPL_SOFTSERIAL;
161 
162 	if (zsd == NULL) {
163 		printf("configuration incomplete\n");
164 		return;
165 	}
166 
167 	printf(" softpri %d\n", softpri);
168 
169 	/*
170 	 * Initialize software state for each channel.
171 	 */
172 	for (channel = 0; channel < 2; channel++) {
173 		struct zschan *zc;
174 		struct device *child;
175 
176 		zsc_args.channel = channel;
177 		cs = &zsc->zsc_cs_store[channel];
178 		zsc->zsc_cs[channel] = cs;
179 
180 		simple_lock_init(&cs->cs_lock);
181 		cs->cs_channel = channel;
182 		cs->cs_private = NULL;
183 		cs->cs_ops = &zsops_null;
184 		cs->cs_brg_clk = PCLK / 16;
185 
186 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
187 
188 		zsc_args.consdev = NULL;
189 		zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
190 						    zsc->zsc_node,
191 						    channel);
192 
193 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
194 			zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
195 			zsc_args.consdev = &zs_consdev;
196 		}
197 
198 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
199 			zs_conschan_get = zc;
200 		}
201 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
202 			zs_conschan_put = zc;
203 		}
204 
205 		/* Children need to set cn_dev, etc */
206 		cs->cs_reg_csr  = &zc->zc_csr;
207 		cs->cs_reg_data = &zc->zc_data;
208 
209 		memcpy(cs->cs_creg, zs_init_reg, 16);
210 		memcpy(cs->cs_preg, zs_init_reg, 16);
211 
212 		/* XXX: Consult PROM properties for this?! */
213 		cs->cs_defspeed = zs_get_speed(cs);
214 		cs->cs_defcflag = zs_def_cflag;
215 
216 		/* Make these correspond to cs_defcflag (-crtscts) */
217 		cs->cs_rr0_dcd = ZSRR0_DCD;
218 		cs->cs_rr0_cts = 0;
219 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
220 		cs->cs_wr5_rts = 0;
221 
222 		/*
223 		 * Clear the master interrupt enable.
224 		 * The INTENA is common to both channels,
225 		 * so just do it on the A channel.
226 		 */
227 		if (channel == 0) {
228 			zs_write_reg(cs, 9, 0);
229 		}
230 
231 		/*
232 		 * Look for a child driver for this channel.
233 		 * The child attach will setup the hardware.
234 		 */
235 		if (!(child =
236 		      config_found(&zsc->zsc_dev, (void *)&zsc_args, zs_print))) {
237 			/* No sub-driver.  Just reset it. */
238 			u_char reset = (channel == 0) ?
239 				ZSWR9_A_RESET : ZSWR9_B_RESET;
240 			s = splzs();
241 			zs_write_reg(cs,  9, reset);
242 			splx(s);
243 		}
244 #if (NKBD > 0) || (NMS > 0)
245 		/*
246 		 * If this was a zstty it has a keyboard
247 		 * property on it we need to attach the
248 		 * sunkbd and sunms line disciplines.
249 		 */
250 		if (child
251 		    && device_is_a(child, "zstty")) {
252 			struct kbd_ms_tty_attach_args kma;
253 			struct zstty_softc {
254 				/* The following are the only fields we need here */
255 				struct	device zst_dev;
256 				struct  tty *zst_tty;
257 				struct	zs_chanstate *zst_cs;
258 			} *zst = (struct zstty_softc *)child;
259 			struct tty *tp;
260 
261 			kma.kmta_tp = tp = zst->zst_tty;
262 			if (tp != NULL) {
263 				kma.kmta_dev = tp->t_dev;
264 				kma.kmta_consdev = zsc_args.consdev;
265 
266 				/* Attach 'em if we got 'em. */
267 				switch(zs_peripheral_type(zsc->zsc_promunit,
268 						 	  zsc->zsc_node,
269 						  	  channel)) {
270 				case ZS_PERIPHERAL_SUNKBD:
271 #if (NKBD > 0)
272 					kma.kmta_name = "keyboard";
273 					config_found(child, (void *)&kma, NULL);
274 #endif
275 					break;
276 				case ZS_PERIPHERAL_SUNMS:
277 #if (NMS > 0)
278 					kma.kmta_name = "mouse";
279 					config_found(child, (void *)&kma, NULL);
280 #endif
281 					break;
282 				default:
283 					break;
284 				}
285 			}
286 		}
287 #endif
288 	}
289 
290 	/*
291 	 * Now safe to install interrupt handlers.
292 	 */
293 	bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, 0, zshard, zsc);
294 	if (!(zsc->zsc_softintr = softintr_establish(softpri, zssoft, zsc)))
295 		panic("zsattach: could not establish soft interrupt");
296 
297 	evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
298 	    zsc->zsc_dev.dv_xname, "intr");
299 
300 
301 	/*
302 	 * Set the master interrupt enable and interrupt vector.
303 	 * (common to both channels, do it on A)
304 	 */
305 	cs = zsc->zsc_cs[0];
306 	s = splhigh();
307 	/* interrupt vector */
308 	zs_write_reg(cs, 2, zs_init_reg[2]);
309 	/* master interrupt control (enable) */
310 	zs_write_reg(cs, 9, zs_init_reg[9]);
311 	splx(s);
312 
313 }
314 
315 static int
316 zs_print(void *aux, const char *name)
317 {
318 	struct zsc_attach_args *args = aux;
319 
320 	if (name != NULL)
321 		aprint_normal("%s: ", name);
322 
323 	if (args->channel != -1)
324 		aprint_normal(" channel %d", args->channel);
325 
326 	return (UNCONF);
327 }
328 
329 static int
330 zshard(void *arg)
331 {
332 	struct zsc_softc *zsc = (struct zsc_softc *)arg;
333 	int rr3, rval;
334 
335 	rval = 0;
336 	while ((rr3 = zsc_intr_hard(zsc))) {
337 		/* Count up the interrupts. */
338 		rval |= rr3;
339 		zsc->zsc_intrcnt.ev_count++;
340 	}
341 	if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
342 	     (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
343 	    zsc->zsc_softintr) {
344 		softintr_schedule(zsc->zsc_softintr);
345 	}
346 	return (rval);
347 }
348 
349 int
350 zscheckintr(void *arg)
351 {
352 	struct zsc_softc *zsc;
353 	int unit, rval;
354 
355 	rval = 0;
356 	for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
357 
358 		zsc = zs_cd.cd_devs[unit];
359 		if (zsc == NULL)
360 			continue;
361 		rval = (zshard((void *)zsc) || rval);
362 	}
363 	return (rval);
364 }
365 
366 
367 /*
368  * We need this only for TTY_DEBUG purposes.
369  */
370 static void
371 zssoft(void *arg)
372 {
373 	struct zsc_softc *zsc = (struct zsc_softc *)arg;
374 	int s;
375 
376 	/* Make sure we call the tty layer at spltty. */
377 	s = spltty();
378 	(void)zsc_intr_soft(zsc);
379 #ifdef TTY_DEBUG
380 	{
381 		struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
382 		struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
383 		if (zst0->zst_overflows || zst1->zst_overflows ) {
384 			struct trapframe *frame = (struct trapframe *)arg;
385 
386 			printf("zs silo overflow from %p\n",
387 			       (long)frame->tf_pc);
388 		}
389 	}
390 #endif
391 	splx(s);
392 }
393 
394 
395 /*
396  * Compute the current baud rate given a ZS channel.
397  */
398 static int
399 zs_get_speed(struct zs_chanstate *cs)
400 {
401 	int tconst;
402 
403 	tconst = zs_read_reg(cs, 12);
404 	tconst |= zs_read_reg(cs, 13) << 8;
405 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
406 }
407 
408 /*
409  * MD functions for setting the baud rate and control modes.
410  */
411 int
412 zs_set_speed(struct zs_chanstate *cs, int bps)
413 {
414 	int tconst, real_bps;
415 
416 	if (bps == 0)
417 		return (0);
418 
419 #ifdef	DIAGNOSTIC
420 	if (cs->cs_brg_clk == 0)
421 		panic("zs_set_speed");
422 #endif
423 
424 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
425 	if (tconst < 0)
426 		return (EINVAL);
427 
428 	/* Convert back to make sure we can do it. */
429 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
430 
431 	/* XXX - Allow some tolerance here? */
432 	if (real_bps != bps)
433 		return (EINVAL);
434 
435 	cs->cs_preg[12] = tconst;
436 	cs->cs_preg[13] = tconst >> 8;
437 
438 	/* Caller will stuff the pending registers. */
439 	return (0);
440 }
441 
442 int
443 zs_set_modes(struct zs_chanstate *cs, int cflag	/* bits per second */)
444 {
445 	int s;
446 
447 	/*
448 	 * Output hardware flow control on the chip is horrendous:
449 	 * if carrier detect drops, the receiver is disabled, and if
450 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
451 	 * Therefore, NEVER set the HFC bit, and instead use the
452 	 * status interrupt to detect CTS changes.
453 	 */
454 	s = splzs();
455 	cs->cs_rr0_pps = 0;
456 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
457 		cs->cs_rr0_dcd = 0;
458 		if ((cflag & MDMBUF) == 0)
459 			cs->cs_rr0_pps = ZSRR0_DCD;
460 	} else
461 		cs->cs_rr0_dcd = ZSRR0_DCD;
462 	if ((cflag & CRTSCTS) != 0) {
463 		cs->cs_wr5_dtr = ZSWR5_DTR;
464 		cs->cs_wr5_rts = ZSWR5_RTS;
465 		cs->cs_rr0_cts = ZSRR0_CTS;
466 	} else if ((cflag & CDTRCTS) != 0) {
467 		cs->cs_wr5_dtr = 0;
468 		cs->cs_wr5_rts = ZSWR5_DTR;
469 		cs->cs_rr0_cts = ZSRR0_CTS;
470 	} else if ((cflag & MDMBUF) != 0) {
471 		cs->cs_wr5_dtr = 0;
472 		cs->cs_wr5_rts = ZSWR5_DTR;
473 		cs->cs_rr0_cts = ZSRR0_DCD;
474 	} else {
475 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
476 		cs->cs_wr5_rts = 0;
477 		cs->cs_rr0_cts = 0;
478 	}
479 	splx(s);
480 
481 	/* Caller will stuff the pending registers. */
482 	return (0);
483 }
484 
485 
486 /*
487  * Read or write the chip with suitable delays.
488  */
489 
490 u_char
491 zs_read_reg(struct zs_chanstate *cs, u_char reg)
492 {
493 	u_char val;
494 
495 	*cs->cs_reg_csr = reg;
496 	ZS_DELAY();
497 	val = *cs->cs_reg_csr;
498 	ZS_DELAY();
499 	return (val);
500 }
501 
502 void
503 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
504 {
505 	*cs->cs_reg_csr = reg;
506 	ZS_DELAY();
507 	*cs->cs_reg_csr = val;
508 	ZS_DELAY();
509 }
510 
511 u_char
512 zs_read_csr(struct zs_chanstate *cs)
513 {
514 	u_char val;
515 
516 	val = *cs->cs_reg_csr;
517 	ZS_DELAY();
518 	return (val);
519 }
520 
521 void
522 zs_write_csr(struct zs_chanstate *cs, u_char val)
523 {
524 	*cs->cs_reg_csr = val;
525 	ZS_DELAY();
526 }
527 
528 u_char
529 zs_read_data(struct zs_chanstate *cs)
530 {
531 	u_char val;
532 
533 	val = *cs->cs_reg_data;
534 	ZS_DELAY();
535 	return (val);
536 }
537 
538 void
539 zs_write_data(struct zs_chanstate *cs, u_char val)
540 {
541 	*cs->cs_reg_data = val;
542 	ZS_DELAY();
543 }
544 
545 /****************************************************************
546  * Console support functions (Sun specific!)
547  * Note: this code is allowed to know about the layout of
548  * the chip registers, and uses that to keep things simple.
549  * XXX - I think I like the mvme167 code better. -gwr
550  ****************************************************************/
551 
552 extern void Debugger(void);
553 
554 /*
555  * Handle user request to enter kernel debugger.
556  */
557 void
558 zs_abort(struct zs_chanstate *cs)
559 {
560 	volatile struct zschan *zc = zs_conschan_get;
561 	int rr0;
562 
563 	/* Wait for end of break to avoid PROM abort. */
564 	/* XXX - Limit the wait? */
565 	do {
566 		rr0 = zc->zc_csr;
567 		ZS_DELAY();
568 	} while (rr0 & ZSRR0_BREAK);
569 
570 #if defined(KGDB)
571 	zskgdb(cs);
572 #elif defined(DDB)
573 	{
574 		extern int db_active;
575 
576 		if (!db_active)
577 			Debugger();
578 		else
579 			/* Debugger is probably hozed */
580 			callrom();
581 	}
582 #else
583 	printf("stopping on keyboard abort\n");
584 	callrom();
585 #endif
586 }
587 
588 
589 /*
590  * Polled input char.
591  */
592 int
593 zs_getc(void *arg)
594 {
595 	volatile struct zschan *zc = arg;
596 	int s, c, rr0;
597 
598 	s = splhigh();
599 	/* Wait for a character to arrive. */
600 	do {
601 		rr0 = zc->zc_csr;
602 		ZS_DELAY();
603 	} while ((rr0 & ZSRR0_RX_READY) == 0);
604 
605 	c = zc->zc_data;
606 	ZS_DELAY();
607 	splx(s);
608 
609 	/*
610 	 * This is used by the kd driver to read scan codes,
611 	 * so don't translate '\r' ==> '\n' here...
612 	 */
613 	return (c);
614 }
615 
616 /*
617  * Polled output char.
618  */
619 void
620 zs_putc(void *arg, int c)
621 {
622 	volatile struct zschan *zc = arg;
623 	int s, rr0;
624 
625 	s = splhigh();
626 
627 	/* Wait for transmitter to become ready. */
628 	do {
629 		rr0 = zc->zc_csr;
630 		ZS_DELAY();
631 	} while ((rr0 & ZSRR0_TX_READY) == 0);
632 
633 	/*
634 	 * Send the next character.
635 	 * Now you'd think that this could be followed by a ZS_DELAY()
636 	 * just like all the other chip accesses, but it turns out that
637 	 * the `transmit-ready' interrupt isn't de-asserted until
638 	 * some period of time after the register write completes
639 	 * (more than a couple instructions).  So to avoid stray
640 	 * interrupts we put in the 2us delay regardless of CPU model.
641 	 */
642 	zc->zc_data = c;
643 	delay(2);
644 
645 	splx(s);
646 }
647 
648 /*****************************************************************/
649 
650 
651 
652 
653 /*
654  * Polled console input putchar.
655  */
656 static int
657 zscngetc(dev_t dev)
658 {
659 	return (zs_getc(zs_conschan_get));
660 }
661 
662 /*
663  * Polled console output putchar.
664  */
665 static void
666 zscnputc(dev_t dev, int c)
667 {
668 	zs_putc(zs_conschan_put, c);
669 }
670 
671 int swallow_zsintrs;
672 
673 static void
674 zscnpollc(dev_t dev, int on)
675 {
676 	/*
677 	 * Need to tell zs driver to acknowledge all interrupts or we get
678 	 * annoying spurious interrupt messages.  This is because mucking
679 	 * with spl() levels during polling does not prevent interrupts from
680 	 * being generated.
681 	 */
682 
683 	if (on) swallow_zsintrs++;
684 	else swallow_zsintrs--;
685 }
686 
687