xref: /netbsd-src/sys/arch/sun2/dev/zs.c (revision 7fa608457b817eca6e0977b37f758ae064f3c99c) 
1 /*	$NetBSD: zs.c,v 1.15 2007/11/09 00:05:06 ad Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include <sys/cdefs.h>
48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.15 2007/11/09 00:05:06 ad Exp $");
49 
50 #include "opt_ddb.h"
51 #include "opt_kgdb.h"
52 
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/conf.h>
56 #include <sys/device.h>
57 #include <sys/file.h>
58 #include <sys/ioctl.h>
59 #include <sys/kernel.h>
60 #include <sys/proc.h>
61 #include <sys/tty.h>
62 #include <sys/time.h>
63 #include <sys/syslog.h>
64 
65 #include <machine/autoconf.h>
66 #include <machine/promlib.h>
67 #include <machine/cpu.h>
68 #include <machine/eeprom.h>
69 #include <machine/psl.h>
70 #include <machine/z8530var.h>
71 
72 #include <dev/cons.h>
73 #include <dev/ic/z8530reg.h>
74 #include <dev/sun/kbd_ms_ttyvar.h>
75 #include <ddb/db_output.h>
76 
77 #include <sun2/dev/cons.h>
78 
79 #include "kbd.h"	/* NKBD */
80 #include "ms.h"		/* NMS */
81 
82 /*
83  * Some warts needed by z8530tty.c -
84  * The default parity REALLY needs to be the same as the PROM uses,
85  * or you can not see messages done with printf during boot-up...
86  */
87 int zs_def_cflag = (CREAD | CS8 | HUPCL);
88 
89 /* ZS channel used as the console device (if any) */
90 void *zs_conschan_get, *zs_conschan_put;
91 
92 static u_char zs_init_reg[16] = {
93 	0,	/* 0: CMD (reset, etc.) */
94 	0,	/* 1: No interrupts yet. */
95 #ifdef  ZS_INIT_IVECT
96 	ZS_INIT_IVECT,	/* 2: IVECT */
97 #else
98 	0,	/* 2: IVECT */
99 #endif
100 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
101 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
102 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
103 	0,	/* 6: TXSYNC/SYNCLO */
104 	0,	/* 7: RXSYNC/SYNCHI */
105 	0,	/* 8: alias for data port */
106 #ifdef  ZS_INIT_IVECT
107 	ZSWR9_MASTER_IE,
108 #else
109 	ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
110 #endif
111 	0,	/*10: Misc. TX/RX control bits */
112 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
113 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
114 	0,			/*13: BAUDHI (default=9600) */
115 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
116 	ZSWR15_BREAK_IE,
117 };
118 
119 /* Console ops */
120 static int  zscngetc(dev_t);
121 static void zscnputc(dev_t, int);
122 static void zscnpollc(dev_t, int);
123 
124 struct consdev zs_consdev = {
125 	NULL,
126 	NULL,
127 	zscngetc,
128 	zscnputc,
129 	zscnpollc,
130 	NULL,
131 };
132 
133 
134 /****************************************************************
135  * Autoconfig
136  ****************************************************************/
137 
138 static int  zs_print(void *, const char *name);
139 
140 extern struct cfdriver zs_cd;
141 
142 /* Interrupt handlers. */
143 int zscheckintr(void *);
144 static int zshard(void *);
145 static void zssoft(void *);
146 
147 static int zs_get_speed(struct zs_chanstate *);
148 
149 /*
150  * Attach a found zs.
151  *
152  * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
153  * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
154  */
155 void
156 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
157 {
158 	struct zsc_attach_args zsc_args;
159 	struct zs_chanstate *cs;
160 	int s, channel, softpri = IPL_SOFTSERIAL;
161 
162 	if (zsd == NULL) {
163 		printf("configuration incomplete\n");
164 		return;
165 	}
166 
167 	/* we should use ipl2si(softpri) but it isn't exported */
168 	printf(" softpri %d\n", _IPL_SOFT_LEVEL3);
169 
170 	/*
171 	 * Initialize software state for each channel.
172 	 */
173 	for (channel = 0; channel < 2; channel++) {
174 		struct zschan *zc;
175 		struct device *child;
176 
177 		zsc_args.channel = channel;
178 		cs = &zsc->zsc_cs_store[channel];
179 		zsc->zsc_cs[channel] = cs;
180 
181 		zs_lock_init(cs);
182 		cs->cs_channel = channel;
183 		cs->cs_private = NULL;
184 		cs->cs_ops = &zsops_null;
185 		cs->cs_brg_clk = PCLK / 16;
186 
187 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
188 
189 		zsc_args.consdev = NULL;
190 		zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
191 						    zsc->zsc_node,
192 						    channel);
193 
194 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
195 			zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
196 			zsc_args.consdev = &zs_consdev;
197 		}
198 
199 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
200 			zs_conschan_get = zc;
201 		}
202 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
203 			zs_conschan_put = zc;
204 		}
205 
206 		/* Children need to set cn_dev, etc */
207 		cs->cs_reg_csr  = &zc->zc_csr;
208 		cs->cs_reg_data = &zc->zc_data;
209 
210 		memcpy(cs->cs_creg, zs_init_reg, 16);
211 		memcpy(cs->cs_preg, zs_init_reg, 16);
212 
213 		/* XXX: Consult PROM properties for this?! */
214 		cs->cs_defspeed = zs_get_speed(cs);
215 		cs->cs_defcflag = zs_def_cflag;
216 
217 		/* Make these correspond to cs_defcflag (-crtscts) */
218 		cs->cs_rr0_dcd = ZSRR0_DCD;
219 		cs->cs_rr0_cts = 0;
220 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
221 		cs->cs_wr5_rts = 0;
222 
223 		/*
224 		 * Clear the master interrupt enable.
225 		 * The INTENA is common to both channels,
226 		 * so just do it on the A channel.
227 		 */
228 		if (channel == 0) {
229 			zs_write_reg(cs, 9, 0);
230 		}
231 
232 		/*
233 		 * Look for a child driver for this channel.
234 		 * The child attach will setup the hardware.
235 		 */
236 		if (!(child =
237 		      config_found(&zsc->zsc_dev, (void *)&zsc_args, zs_print))) {
238 			/* No sub-driver.  Just reset it. */
239 			u_char reset = (channel == 0) ?
240 				ZSWR9_A_RESET : ZSWR9_B_RESET;
241 			s = splzs();
242 			zs_write_reg(cs,  9, reset);
243 			splx(s);
244 		}
245 #if (NKBD > 0) || (NMS > 0)
246 		/*
247 		 * If this was a zstty it has a keyboard
248 		 * property on it we need to attach the
249 		 * sunkbd and sunms line disciplines.
250 		 */
251 		if (child
252 		    && device_is_a(child, "zstty")) {
253 			struct kbd_ms_tty_attach_args kma;
254 			struct zstty_softc {
255 				/* The following are the only fields we need here */
256 				struct	device zst_dev;
257 				struct  tty *zst_tty;
258 				struct	zs_chanstate *zst_cs;
259 			} *zst = (struct zstty_softc *)child;
260 			struct tty *tp;
261 
262 			kma.kmta_tp = tp = zst->zst_tty;
263 			if (tp != NULL) {
264 				kma.kmta_dev = tp->t_dev;
265 				kma.kmta_consdev = zsc_args.consdev;
266 
267 				/* Attach 'em if we got 'em. */
268 				switch(zs_peripheral_type(zsc->zsc_promunit,
269 						 	  zsc->zsc_node,
270 						  	  channel)) {
271 				case ZS_PERIPHERAL_SUNKBD:
272 #if (NKBD > 0)
273 					kma.kmta_name = "keyboard";
274 					config_found(child, (void *)&kma, NULL);
275 #endif
276 					break;
277 				case ZS_PERIPHERAL_SUNMS:
278 #if (NMS > 0)
279 					kma.kmta_name = "mouse";
280 					config_found(child, (void *)&kma, NULL);
281 #endif
282 					break;
283 				default:
284 					break;
285 				}
286 			}
287 		}
288 #endif
289 	}
290 
291 	/*
292 	 * Now safe to install interrupt handlers.
293 	 */
294 	bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, 0, zshard, zsc);
295 	if (!(zsc->zsc_softintr = softintr_establish(softpri, zssoft, zsc)))
296 		panic("zsattach: could not establish soft interrupt");
297 
298 	evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
299 	    zsc->zsc_dev.dv_xname, "intr");
300 
301 
302 	/*
303 	 * Set the master interrupt enable and interrupt vector.
304 	 * (common to both channels, do it on A)
305 	 */
306 	cs = zsc->zsc_cs[0];
307 	s = splhigh();
308 	/* interrupt vector */
309 	zs_write_reg(cs, 2, zs_init_reg[2]);
310 	/* master interrupt control (enable) */
311 	zs_write_reg(cs, 9, zs_init_reg[9]);
312 	splx(s);
313 
314 }
315 
316 static int
317 zs_print(void *aux, const char *name)
318 {
319 	struct zsc_attach_args *args = aux;
320 
321 	if (name != NULL)
322 		aprint_normal("%s: ", name);
323 
324 	if (args->channel != -1)
325 		aprint_normal(" channel %d", args->channel);
326 
327 	return (UNCONF);
328 }
329 
330 static int
331 zshard(void *arg)
332 {
333 	struct zsc_softc *zsc = (struct zsc_softc *)arg;
334 	int rr3, rval;
335 
336 	rval = 0;
337 	while ((rr3 = zsc_intr_hard(zsc))) {
338 		/* Count up the interrupts. */
339 		rval |= rr3;
340 		zsc->zsc_intrcnt.ev_count++;
341 	}
342 	if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
343 	     (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
344 	    zsc->zsc_softintr) {
345 		softintr_schedule(zsc->zsc_softintr);
346 	}
347 	return (rval);
348 }
349 
350 int
351 zscheckintr(void *arg)
352 {
353 	struct zsc_softc *zsc;
354 	int unit, rval;
355 
356 	rval = 0;
357 	for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
358 
359 		zsc = zs_cd.cd_devs[unit];
360 		if (zsc == NULL)
361 			continue;
362 		rval = (zshard((void *)zsc) || rval);
363 	}
364 	return (rval);
365 }
366 
367 
368 /*
369  * We need this only for TTY_DEBUG purposes.
370  */
371 static void
372 zssoft(void *arg)
373 {
374 	struct zsc_softc *zsc = (struct zsc_softc *)arg;
375 	int s;
376 
377 	/* Make sure we call the tty layer at spltty. */
378 	s = spltty();
379 	(void)zsc_intr_soft(zsc);
380 #ifdef TTY_DEBUG
381 	{
382 		struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
383 		struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
384 		if (zst0->zst_overflows || zst1->zst_overflows ) {
385 			struct trapframe *frame = (struct trapframe *)arg;
386 
387 			printf("zs silo overflow from %p\n",
388 			       (long)frame->tf_pc);
389 		}
390 	}
391 #endif
392 	splx(s);
393 }
394 
395 
396 /*
397  * Compute the current baud rate given a ZS channel.
398  */
399 static int
400 zs_get_speed(struct zs_chanstate *cs)
401 {
402 	int tconst;
403 
404 	tconst = zs_read_reg(cs, 12);
405 	tconst |= zs_read_reg(cs, 13) << 8;
406 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
407 }
408 
409 /*
410  * MD functions for setting the baud rate and control modes.
411  */
412 int
413 zs_set_speed(struct zs_chanstate *cs, int bps)
414 {
415 	int tconst, real_bps;
416 
417 	if (bps == 0)
418 		return (0);
419 
420 #ifdef	DIAGNOSTIC
421 	if (cs->cs_brg_clk == 0)
422 		panic("zs_set_speed");
423 #endif
424 
425 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
426 	if (tconst < 0)
427 		return (EINVAL);
428 
429 	/* Convert back to make sure we can do it. */
430 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
431 
432 	/* XXX - Allow some tolerance here? */
433 	if (real_bps != bps)
434 		return (EINVAL);
435 
436 	cs->cs_preg[12] = tconst;
437 	cs->cs_preg[13] = tconst >> 8;
438 
439 	/* Caller will stuff the pending registers. */
440 	return (0);
441 }
442 
443 int
444 zs_set_modes(struct zs_chanstate *cs, int cflag	/* bits per second */)
445 {
446 	int s;
447 
448 	/*
449 	 * Output hardware flow control on the chip is horrendous:
450 	 * if carrier detect drops, the receiver is disabled, and if
451 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
452 	 * Therefore, NEVER set the HFC bit, and instead use the
453 	 * status interrupt to detect CTS changes.
454 	 */
455 	s = splzs();
456 	cs->cs_rr0_pps = 0;
457 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
458 		cs->cs_rr0_dcd = 0;
459 		if ((cflag & MDMBUF) == 0)
460 			cs->cs_rr0_pps = ZSRR0_DCD;
461 	} else
462 		cs->cs_rr0_dcd = ZSRR0_DCD;
463 	if ((cflag & CRTSCTS) != 0) {
464 		cs->cs_wr5_dtr = ZSWR5_DTR;
465 		cs->cs_wr5_rts = ZSWR5_RTS;
466 		cs->cs_rr0_cts = ZSRR0_CTS;
467 	} else if ((cflag & CDTRCTS) != 0) {
468 		cs->cs_wr5_dtr = 0;
469 		cs->cs_wr5_rts = ZSWR5_DTR;
470 		cs->cs_rr0_cts = ZSRR0_CTS;
471 	} else if ((cflag & MDMBUF) != 0) {
472 		cs->cs_wr5_dtr = 0;
473 		cs->cs_wr5_rts = ZSWR5_DTR;
474 		cs->cs_rr0_cts = ZSRR0_DCD;
475 	} else {
476 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
477 		cs->cs_wr5_rts = 0;
478 		cs->cs_rr0_cts = 0;
479 	}
480 	splx(s);
481 
482 	/* Caller will stuff the pending registers. */
483 	return (0);
484 }
485 
486 
487 /*
488  * Read or write the chip with suitable delays.
489  */
490 
491 u_char
492 zs_read_reg(struct zs_chanstate *cs, u_char reg)
493 {
494 	u_char val;
495 
496 	*cs->cs_reg_csr = reg;
497 	ZS_DELAY();
498 	val = *cs->cs_reg_csr;
499 	ZS_DELAY();
500 	return (val);
501 }
502 
503 void
504 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
505 {
506 	*cs->cs_reg_csr = reg;
507 	ZS_DELAY();
508 	*cs->cs_reg_csr = val;
509 	ZS_DELAY();
510 }
511 
512 u_char
513 zs_read_csr(struct zs_chanstate *cs)
514 {
515 	u_char val;
516 
517 	val = *cs->cs_reg_csr;
518 	ZS_DELAY();
519 	return (val);
520 }
521 
522 void
523 zs_write_csr(struct zs_chanstate *cs, u_char val)
524 {
525 	*cs->cs_reg_csr = val;
526 	ZS_DELAY();
527 }
528 
529 u_char
530 zs_read_data(struct zs_chanstate *cs)
531 {
532 	u_char val;
533 
534 	val = *cs->cs_reg_data;
535 	ZS_DELAY();
536 	return (val);
537 }
538 
539 void
540 zs_write_data(struct zs_chanstate *cs, u_char val)
541 {
542 	*cs->cs_reg_data = val;
543 	ZS_DELAY();
544 }
545 
546 /****************************************************************
547  * Console support functions (Sun specific!)
548  * Note: this code is allowed to know about the layout of
549  * the chip registers, and uses that to keep things simple.
550  * XXX - I think I like the mvme167 code better. -gwr
551  ****************************************************************/
552 
553 extern void Debugger(void);
554 
555 /*
556  * Handle user request to enter kernel debugger.
557  */
558 void
559 zs_abort(struct zs_chanstate *cs)
560 {
561 	volatile struct zschan *zc = zs_conschan_get;
562 	int rr0;
563 
564 	/* Wait for end of break to avoid PROM abort. */
565 	/* XXX - Limit the wait? */
566 	do {
567 		rr0 = zc->zc_csr;
568 		ZS_DELAY();
569 	} while (rr0 & ZSRR0_BREAK);
570 
571 #if defined(KGDB)
572 	zskgdb(cs);
573 #elif defined(DDB)
574 	{
575 		extern int db_active;
576 
577 		if (!db_active)
578 			Debugger();
579 		else
580 			/* Debugger is probably hozed */
581 			callrom();
582 	}
583 #else
584 	printf("stopping on keyboard abort\n");
585 	callrom();
586 #endif
587 }
588 
589 
590 /*
591  * Polled input char.
592  */
593 int
594 zs_getc(void *arg)
595 {
596 	volatile struct zschan *zc = arg;
597 	int s, c, rr0;
598 
599 	s = splhigh();
600 	/* Wait for a character to arrive. */
601 	do {
602 		rr0 = zc->zc_csr;
603 		ZS_DELAY();
604 	} while ((rr0 & ZSRR0_RX_READY) == 0);
605 
606 	c = zc->zc_data;
607 	ZS_DELAY();
608 	splx(s);
609 
610 	/*
611 	 * This is used by the kd driver to read scan codes,
612 	 * so don't translate '\r' ==> '\n' here...
613 	 */
614 	return (c);
615 }
616 
617 /*
618  * Polled output char.
619  */
620 void
621 zs_putc(void *arg, int c)
622 {
623 	volatile struct zschan *zc = arg;
624 	int s, rr0;
625 
626 	s = splhigh();
627 
628 	/* Wait for transmitter to become ready. */
629 	do {
630 		rr0 = zc->zc_csr;
631 		ZS_DELAY();
632 	} while ((rr0 & ZSRR0_TX_READY) == 0);
633 
634 	/*
635 	 * Send the next character.
636 	 * Now you'd think that this could be followed by a ZS_DELAY()
637 	 * just like all the other chip accesses, but it turns out that
638 	 * the `transmit-ready' interrupt isn't de-asserted until
639 	 * some period of time after the register write completes
640 	 * (more than a couple instructions).  So to avoid stray
641 	 * interrupts we put in the 2us delay regardless of CPU model.
642 	 */
643 	zc->zc_data = c;
644 	delay(2);
645 
646 	splx(s);
647 }
648 
649 /*****************************************************************/
650 
651 
652 
653 
654 /*
655  * Polled console input putchar.
656  */
657 static int
658 zscngetc(dev_t dev)
659 {
660 	return (zs_getc(zs_conschan_get));
661 }
662 
663 /*
664  * Polled console output putchar.
665  */
666 static void
667 zscnputc(dev_t dev, int c)
668 {
669 	zs_putc(zs_conschan_put, c);
670 }
671 
672 int swallow_zsintrs;
673 
674 static void
675 zscnpollc(dev_t dev, int on)
676 {
677 	/*
678 	 * Need to tell zs driver to acknowledge all interrupts or we get
679 	 * annoying spurious interrupt messages.  This is because mucking
680 	 * with spl() levels during polling does not prevent interrupts from
681 	 * being generated.
682 	 */
683 
684 	if (on) swallow_zsintrs++;
685 	else swallow_zsintrs--;
686 }
687 
688