xref: /netbsd-src/sys/arch/sparc64/include/param.h (revision b757af438b42b93f8c6571f026d8b8ef3eaf5fc9)
1 /*	$NetBSD: param.h,v 1.50 2012/03/10 07:54:17 nakayama Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. Neither the name of the University nor the names of its contributors
25  *    may be used to endorse or promote products derived from this software
26  *    without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38  * SUCH DAMAGE.
39  *
40  *	@(#)param.h	8.1 (Berkeley) 6/11/93
41  */
42 
43 /*
44  * Copyright (c) 1996-2002 Eduardo Horvath
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  *
52  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
53  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
56  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62  * SUCH DAMAGE.
63  *
64  */
65 
66 #if defined(_KERNEL_OPT)
67 #include "opt_sparc_arch.h"
68 #endif
69 
70 #ifdef __arch64__
71 #define	_MACHINE	sparc64
72 #define	MACHINE		"sparc64"
73 #define	_MACHINE_ARCH	sparc64
74 #define	MACHINE_ARCH	"sparc64"
75 #define	MID_MACHINE	MID_SPARC64
76 #else
77 #define	_MACHINE	sparc
78 #define	MACHINE		"sparc"
79 #define	_MACHINE_ARCH	sparc
80 #define	MACHINE_ARCH	"sparc"
81 #define	MID_MACHINE	MID_SPARC
82 #endif
83 
84 #ifdef _KERNEL				/* XXX */
85 #ifndef _LOCORE				/* XXX */
86 #include <machine/cpu.h>		/* XXX */
87 #endif					/* XXX */
88 #endif					/* XXX */
89 
90 #define ALIGNBYTES32		0x7
91 #define ALIGNBYTES64		0xf
92 #define ALIGN32(p)		(((u_long)(p) + ALIGNBYTES32) & ~ALIGNBYTES32)
93 
94 
95 /*
96  * The following variables are always defined and initialized (in locore)
97  * so independently compiled modules (e.g. LKMs) can be used irrespective
98  * of the `options SUN4?' combination a particular kernel was configured with.
99  * See also the definitions of NBPG, PGOFSET and PGSHIFT below.
100  */
101 #if (defined(_KERNEL) || defined(_STANDALONE)) && !defined(_LOCORE)
102 extern int nbpg, pgofset, pgshift;
103 #endif
104 
105 #define	DEV_BSIZE	512
106 #define	DEV_BSHIFT	9		/* log2(DEV_BSIZE) */
107 #define	BLKDEV_IOSIZE	2048
108 #define	MAXPHYS		(64 * 1024)
109 
110 #ifdef __arch64__
111 /* We get stack overflows w/8K stacks in 64-bit mode */
112 #define	SSIZE		2		/* initial stack size in pages */
113 #else
114 #define	SSIZE		2
115 #endif
116 #define	USPACE		(SSIZE*8192)
117 
118 
119 /*
120  * Here are all the magic kernel virtual addresses and how they're allocated.
121  *
122  * First, the PROM is usually a fixed-sized block from 0x00000000f0000000 to
123  * 0x00000000f0100000.  It also uses some space around 0x00000000fff00000 to
124  * map in device registers.  The rest is pretty much ours to play with.
125  *
126  * The kernel starts at KERNBASE.  Here's they layout.  We use macros to set
127  * the addresses so we can relocate everything easily.  We use 4MB locked TTEs
128  * to map in the kernel text and data segments.  Any extra pages are recycled,
129  * so they can potentially be double-mapped.  This shouldn't really be a
130  * problem since they're unused, but wild pointers can cause silent data
131  * corruption if they are in those segments.
132  *
133  * 0x0000000000000000:	64K NFO page zero
134  * 0x0000000000010000:	Userland or PROM
135  * KERNBASE:		4MB kernel text and read only data
136  *				This is mapped in the ITLB and
137  *				Read-Only in the DTLB
138  * KERNBASE+0x400000:	4MB kernel data and BSS -- not in ITLB
139  *				Contains context table, kernel pmap,
140  *				and other important structures.
141  * KERNBASE+0x800000:	Unmapped page -- redzone
142  * KERNBASE+0x802000:	Process 0 stack and u-area
143  * KERNBASE+0x806000:	2 pages for pmap_copy_page and /dev/mem
144  * KERNBASE+0x80a000:	Start of kernel VA segment
145  * KERNEND:		End of kernel VA segment
146  * KERNEND+0x02000:	Auxreg_va (unused?)
147  * KERNEND+0x04000:	TMPMAP_VA (unused?)
148  * KERNEND+0x06000:	message buffer.
149  * KERNEND+0x010000:	INTSTACK -- per-cpu 64K locked TTE
150  *			Contains interrupt stack (32KB), cpu_info structure
151  *			and panicstack (32KB)
152  * KERNEND+0x018000:	CPUINFO_VA -- cpu_info structure
153  * KERNEND+0x020000:	unmapped space (top of panicstack)
154  * KERNEND+0x022000:	IODEV_BASE -- begin mapping IO devices here.
155  * 0x00000000f0000000:	IODEV_END -- end of device mapping space.
156  *
157  */
158 #define	KERNBASE	0x001000000	/* start of kernel virtual space */
159 #define	KERNEND		0x0e0000000	/* end of kernel virtual space */
160 #define	VM_MAX_KERNEL_BUF	((KERNEND-KERNBASE)/4)
161 
162 #define	_MAXNBPG	8192	/* fixed VAs, independent of actual NBPG */
163 
164 #define	AUXREG_VA	(      KERNEND + _MAXNBPG) /* 1 page REDZONE */
165 #define	TMPMAP_VA	(    AUXREG_VA + _MAXNBPG)
166 #define	MSGBUF_VA	(    TMPMAP_VA + _MAXNBPG)
167 /*
168  * Here's the location of the interrupt stack and CPU structure.
169  */
170 #define	INTSTACK	(      KERNEND + 8*_MAXNBPG)
171 #define	EINTSTACK	(     INTSTACK + 4*_MAXNBPG)
172 #define	CPUINFO_VA	(    EINTSTACK              )
173 #define	PANICSTACK	(     INTSTACK + 8*_MAXNBPG)
174 #define	IODEV_BASE	(     INTSTACK + 9*_MAXNBPG)	/* 1 page redzone */
175 #define	IODEV_END	0x0f0000000UL			/* ~16 MB of iospace */
176 
177 /*
178  * Constants related to network buffer management.
179  * MCLBYTES must be no larger than NBPG (the software page size), and,
180  * on machines that exchange pages of input or output buffers with mbuf
181  * clusters (MAPPED_MBUFS), MCLBYTES must also be an integral multiple
182  * of the hardware page size.
183  */
184 #define	MSIZE		256		/* size of an mbuf */
185 
186 #ifndef MCLSHIFT
187 #define	MCLSHIFT	11		/* convert bytes to m_buf clusters */
188 					/* 2K cluster can hold Ether frame */
189 #endif	/* MCLSHIFT */
190 
191 #define	MCLBYTES	(1 << MCLSHIFT)	/* size of a m_buf cluster */
192 
193 #define MSGBUFSIZE	NBPG
194 
195 /*
196  * Minimum size of the kernel kmem_arena in PAGE_SIZE-sized
197  * logical pages.
198  * Maximum of 2.5GB on sparc64 (it must fit into KERNEND - KERNBASE, and also
199  * leave space in the kernel_map for other allocations).
200  */
201 #define	NKMEMPAGES_MIN_DEFAULT	((64 * 1024 * 1024) >> PAGE_SHIFT)
202 #undef	NKMEMPAGES_MAX_UNLIMITED
203 #define	NKMEMPAGES_MAX_DEFAULT	((2048UL * 1024 * 1024) >> PAGE_SHIFT)
204 
205 #ifdef _KERNEL
206 #ifndef _LOCORE
207 
208 extern void	delay(unsigned int);
209 #define	DELAY(n)	delay(n)
210 
211 #ifdef	__arch64__
212 /* If we're using a 64-bit kernel use 64-bit math */
213 #define mstohz(ms) ((ms + 0UL) * hz / 1000)
214 #endif
215 
216 extern int cputyp;
217 
218 #define CPU_ISSUN4U     (cputyp == CPU_SUN4U)
219 #define CPU_ISSUN4US    (cputyp == CPU_SUN4US)
220 #define CPU_ISSUN4V     (cputyp == CPU_SUN4V)
221 
222 #endif /* _LOCORE */
223 #endif /* _KERNEL */
224 
225 /*
226  * Values for the cputyp variable.
227  */
228 #define CPU_SUN4	0
229 #define CPU_SUN4C	1
230 #define CPU_SUN4M	2
231 #define CPU_SUN4U	3
232 #define CPU_SUN4US	4
233 #define CPU_SUN4V	5
234 
235 /*
236  * Shorthand CPU-type macros. Enumerate all eight cases.
237  * Let compiler optimize away code conditional on constants.
238  *
239  * On a sun4 machine, the page size is 8192, while on a sun4c and sun4m
240  * it is 4096. Therefore, in the (SUN4 && (SUN4C || SUN4M)) cases below,
241  * NBPG, PGOFSET and PGSHIFT are defined as variables which are initialized
242  * early in locore.s after the machine type has been detected.
243  *
244  * Note that whenever the macros defined below evaluate to expressions
245  * involving variables, the kernel will perform slightly worse due to the
246  * extra memory references they'll generate.
247  */
248 
249 #define CPU_ISSUN4M	(0)
250 #define CPU_ISSUN4C	(0)
251 #define CPU_ISSUN4	(0)
252 
253 
254 #define	PGSHIFT		13		/* log2(NBPG) */
255 #define	NBPG		(1<<PGSHIFT)	/* bytes/page */
256 #define	PGOFSET		(NBPG-1)	/* byte offset into page */
257