xref: /netbsd-src/sys/arch/sparc64/include/intr.h (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: intr.h,v 1.29 2010/05/24 09:49:17 martin Exp $ */
2 
3 /*-
4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Paul Kranenburg.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _SPARC64_INTR_H_
33 #define _SPARC64_INTR_H_
34 
35 #if defined(_KERNEL_OPT)
36 #include "opt_multiprocessor.h"
37 #endif
38 
39 #ifndef _LOCORE
40 #include <machine/cpuset.h>
41 #endif
42 #include <machine/psl.h>
43 
44 /* XXX - arbitrary numbers; no interpretation is defined yet */
45 #define	IPL_NONE	0		/* nothing */
46 #define	IPL_SOFTCLOCK	1		/* timeouts */
47 #define	IPL_SOFTBIO	1		/* block I/O */
48 #define	IPL_SOFTNET	1		/* protocol stack */
49 #define	IPL_SOFTSERIAL	4		/* serial */
50 #define	IPL_VM		PIL_VM		/* memory allocation */
51 #define	IPL_SCHED	PIL_SCHED	/* scheduler */
52 #define	IPL_HIGH	PIL_HIGH	/* everything */
53 #define	IPL_HALT	5		/* cpu stop-self */
54 #define	IPL_PAUSE	13		/* pause cpu */
55 #define	IPL_FDSOFT	PIL_FDSOFT	/* floppy */
56 
57 #ifndef _LOCORE
58 void fpusave_lwp(struct lwp *, bool);
59 #endif	/* _LOCORE */
60 
61 #if defined(MULTIPROCESSOR)
62 #ifndef _LOCORE
63 void	sparc64_ipi_init (void);
64 void	sparc64_ipi_halt_thiscpu (void *, void *);
65 void	sparc64_ipi_pause_thiscpu (void *);
66 void	sparc64_do_pause(void);
67 void	sparc64_ipi_drop_fpstate (void *, void *);
68 void	sparc64_ipi_save_fpstate (void *, void *);
69 void	sparc64_ipi_nop (void *, void *);
70 void	sparc64_ipi_ccall(void *, void *);
71 void	mp_halt_cpus (void);
72 void	mp_pause_cpus (void);
73 void	mp_resume_cpus (void);
74 int	mp_cpu_is_paused (sparc64_cpuset_t);
75 void	mp_resume_cpu(int);
76 #endif	/* _LOCORE */
77 #endif
78 
79 #define IPI_EVCNT_TLB_PTE	0
80 #define IPI_EVCNT_FPU_SYNCH	1
81 #define IPI_EVCNT_FPU_FLUSH	2
82 #define IPI_EVCNT_NUM		3
83 #define IPI_EVCNT_NAMES { "TLB pte IPI", "FPU synch IPI", "FPU flush IPI" }
84 
85 #endif /* _SPARC64_INTR_H_ */
86