1 /* $NetBSD: cpu.h,v 1.122 2016/06/25 13:52:04 palle Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 41 */ 42 43 #ifndef _CPU_H_ 44 #define _CPU_H_ 45 46 /* 47 * CTL_MACHDEP definitions. 48 */ 49 #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */ 50 #define CPU_BOOTED_DEVICE 2 /* string: device booted from */ 51 #define CPU_BOOT_ARGS 3 /* string: args booted with */ 52 #define CPU_ARCH 4 /* integer: cpu architecture version */ 53 #define CPU_VIS 5 /* 0 - no VIS, 1 - VIS 1.0, etc. */ 54 #define CPU_MAXID 6 /* number of valid machdep ids */ 55 56 #if defined(_KERNEL) || defined(_KMEMUSER) 57 /* 58 * Exported definitions unique to SPARC cpu support. 59 */ 60 61 #if defined(_KERNEL_OPT) 62 #include "opt_multiprocessor.h" 63 #include "opt_lockdebug.h" 64 #endif 65 66 #include <machine/psl.h> 67 #include <machine/reg.h> 68 #include <machine/pte.h> 69 #include <machine/intr.h> 70 #if defined(_KERNEL) 71 #include <machine/bus_defs.h> 72 #include <machine/cpuset.h> 73 #include <sparc64/sparc64/intreg.h> 74 #endif 75 #ifdef SUN4V 76 #include <machine/hypervisor.h> 77 #endif 78 79 #include <sys/cpu_data.h> 80 #include <sys/evcnt.h> 81 82 /* 83 * The cpu_info structure is part of a 64KB structure mapped both the kernel 84 * pmap and a single locked TTE a CPUINFO_VA for that particular processor. 85 * Each processor's cpu_info is accessible at CPUINFO_VA only for that 86 * processor. Other processors can access that through an additional mapping 87 * in the kernel pmap. 88 * 89 * The 64KB page contains: 90 * 91 * cpu_info 92 * interrupt stack (all remaining space) 93 * idle PCB 94 * idle stack (STACKSPACE - sizeof(PCB)) 95 * 32KB TSB 96 */ 97 98 struct cpu_info { 99 struct cpu_data ci_data; /* MI per-cpu data */ 100 101 102 /* 103 * SPARC cpu_info structures live at two VAs: one global 104 * VA (so each CPU can access any other CPU's cpu_info) 105 * and an alias VA CPUINFO_VA which is the same on each 106 * CPU and maps to that CPU's cpu_info. Since the alias 107 * CPUINFO_VA is how we locate our cpu_info, we have to 108 * self-reference the global VA so that we can return it 109 * in the curcpu() macro. 110 */ 111 struct cpu_info * volatile ci_self; 112 113 /* Most important fields first */ 114 struct lwp *ci_curlwp; 115 struct pcb *ci_cpcb; 116 struct cpu_info *ci_next; 117 118 struct lwp *ci_fplwp; 119 120 void *ci_eintstack; 121 122 int ci_mtx_count; 123 int ci_mtx_oldspl; 124 125 /* Spinning up the CPU */ 126 void (*ci_spinup)(void); 127 paddr_t ci_paddr; 128 129 int ci_cpuid; 130 131 /* CPU PROM information. */ 132 u_int ci_node; 133 134 /* %tick and cpu frequency information */ 135 u_long ci_tick_increment; 136 uint64_t ci_cpu_clockrate[2]; /* %tick */ 137 uint64_t ci_system_clockrate[2]; /* %stick */ 138 139 /* Interrupts */ 140 struct intrhand *ci_intrpending[16]; 141 struct intrhand *ci_tick_ih; 142 143 /* Event counters */ 144 struct evcnt ci_tick_evcnt; 145 146 /* This could be under MULTIPROCESSOR, but there's no good reason */ 147 struct evcnt ci_ipi_evcnt[IPI_EVCNT_NUM]; 148 149 int ci_flags; 150 int ci_want_ast; 151 int ci_want_resched; 152 int ci_idepth; 153 154 /* 155 * A context is simply a small number that differentiates multiple mappings 156 * of the same address. Contexts on the spitfire are 13 bits, but could 157 * be as large as 17 bits. 158 * 159 * Each context is either free or attached to a pmap. 160 * 161 * The context table is an array of pointers to psegs. Just dereference 162 * the right pointer and you get to the pmap segment tables. These are 163 * physical addresses, of course. 164 * 165 * ci_ctx_lock protects this CPUs context allocation/free. 166 * These are all allocated almost with in the same cacheline. 167 */ 168 kmutex_t ci_ctx_lock; 169 int ci_pmap_next_ctx; 170 int ci_numctx; 171 paddr_t *ci_ctxbusy; 172 LIST_HEAD(, pmap) ci_pmap_ctxlist; 173 174 /* 175 * The TSBs are per cpu too (since MMU context differs between 176 * cpus). These are just caches for the TLBs. 177 */ 178 pte_t *ci_tsb_dmmu; 179 pte_t *ci_tsb_immu; 180 181 /* TSB description (sun4v). */ 182 struct tsb_desc *ci_tsb_desc; 183 184 /* MMU Fault Status Area (sun4v). 185 * Will be initialized to the physical address of the bottom of 186 * the interrupt stack. 187 */ 188 paddr_t ci_mmfsa; 189 190 /* 191 * sun4v mondo control fields 192 */ 193 paddr_t ci_cpumq; /* cpu mondo queue address */ 194 paddr_t ci_devmq; /* device mondo queue address */ 195 paddr_t ci_cpuset; /* mondo recipient address */ 196 paddr_t ci_mondo; /* mondo message address */ 197 198 /* probe fault in PCI config space reads */ 199 bool ci_pci_probe; 200 bool ci_pci_fault; 201 202 volatile void *ci_ddb_regs; /* DDB regs */ 203 }; 204 205 #endif /* _KERNEL || _KMEMUSER */ 206 207 #ifdef _KERNEL 208 209 #define CPUF_PRIMARY 1 210 211 /* 212 * CPU boot arguments. Used by secondary CPUs at the bootstrap time. 213 */ 214 struct cpu_bootargs { 215 u_int cb_node; /* PROM CPU node */ 216 volatile int cb_flags; 217 218 vaddr_t cb_ktext; 219 paddr_t cb_ktextp; 220 vaddr_t cb_ektext; 221 222 vaddr_t cb_kdata; 223 paddr_t cb_kdatap; 224 vaddr_t cb_ekdata; 225 226 paddr_t cb_cpuinfo; 227 int cb_cputyp; 228 }; 229 230 extern struct cpu_bootargs *cpu_args; 231 232 #if defined(MULTIPROCESSOR) 233 extern int sparc_ncpus; 234 #else 235 #define sparc_ncpus 1 236 #endif 237 238 extern struct cpu_info *cpus; 239 extern struct pool_cache *fpstate_cache; 240 241 #define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) 242 #define cpu_number() (curcpu()->ci_index) 243 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 244 245 #define CPU_INFO_ITERATOR int __unused 246 #define CPU_INFO_FOREACH(cii, ci) ci = cpus; ci != NULL; ci = ci->ci_next 247 248 #define curlwp curcpu()->ci_curlwp 249 #define fplwp curcpu()->ci_fplwp 250 #define curpcb curcpu()->ci_cpcb 251 252 #define want_ast curcpu()->ci_want_ast 253 #define want_resched curcpu()->ci_want_resched 254 255 /* 256 * definitions of cpu-dependent requirements 257 * referenced in generic code 258 */ 259 #define cpu_wait(p) /* nothing */ 260 void cpu_proc_fork(struct proc *, struct proc *); 261 262 /* run on the cpu itself */ 263 void cpu_pmap_init(struct cpu_info *); 264 /* run upfront to prepare the cpu_info */ 265 void cpu_pmap_prepare(struct cpu_info *, bool); 266 267 /* Helper functions to retrieve cache info */ 268 int cpu_ecache_associativity(int node); 269 int cpu_ecache_size(int node); 270 271 #if defined(MULTIPROCESSOR) 272 extern vaddr_t cpu_spinup_trampoline; 273 274 extern char *mp_tramp_code; 275 extern u_long mp_tramp_code_len; 276 extern u_long mp_tramp_dtlb_slots, mp_tramp_itlb_slots; 277 extern u_long mp_tramp_func; 278 extern u_long mp_tramp_ci; 279 280 void cpu_hatch(void); 281 void cpu_boot_secondary_processors(void); 282 283 /* 284 * Call a function on other cpus: 285 * multicast - send to everyone in the sparc64_cpuset_t 286 * broadcast - send to to all cpus but ourselves 287 * send - send to just this cpu 288 * The called function do not follow the C ABI, so need to be coded in 289 * assembler. 290 */ 291 typedef void (* ipifunc_t)(void *, void *); 292 293 void sparc64_multicast_ipi(sparc64_cpuset_t, ipifunc_t, uint64_t, uint64_t); 294 void sparc64_broadcast_ipi(ipifunc_t, uint64_t, uint64_t); 295 extern void (*sparc64_send_ipi)(int, ipifunc_t, uint64_t, uint64_t); 296 297 /* 298 * Call an arbitrary C function on another cpu (or all others but ourself) 299 */ 300 typedef void (*ipi_c_call_func_t)(void*); 301 void sparc64_generic_xcall(struct cpu_info*, ipi_c_call_func_t, void*); 302 303 #endif 304 305 /* Provide %pc of a lwp */ 306 #define LWP_PC(l) ((l)->l_md.md_tf->tf_pc) 307 308 /* 309 * Arguments to hardclock, softclock and gatherstats encapsulate the 310 * previous machine state in an opaque clockframe. The ipl is here 311 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 312 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 313 */ 314 struct clockframe { 315 struct trapframe64 t; 316 }; 317 318 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0) 319 #define CLKF_PC(framep) ((framep)->t.tf_pc) 320 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */ 321 #define CLKF_INTR(framep) \ 322 ((!CLKF_USERMODE(framep))&& \ 323 (((framep)->t.tf_out[6] & 1 ) ? \ 324 (((vaddr_t)(framep)->t.tf_out[6] < \ 325 (vaddr_t)EINTSTACK-0x7ff) && \ 326 ((vaddr_t)(framep)->t.tf_out[6] > \ 327 (vaddr_t)INTSTACK-0x7ff)) : \ 328 (((vaddr_t)(framep)->t.tf_out[6] < \ 329 (vaddr_t)EINTSTACK) && \ 330 ((vaddr_t)(framep)->t.tf_out[6] > \ 331 (vaddr_t)INTSTACK)))) 332 333 /* 334 * Give a profiling tick to the current process when the user profiling 335 * buffer pages are invalid. On the sparc, request an ast to send us 336 * through trap(), marking the proc as needing a profiling tick. 337 */ 338 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, want_ast = 1) 339 340 /* 341 * Notify an LWP that it has a signal pending, process as soon as possible. 342 */ 343 void cpu_signotify(struct lwp *); 344 345 346 /* 347 * Interrupt handler chains. Interrupt handlers should return 0 for 348 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 349 * handler into the list. The handler is called with its (single) 350 * argument, or with a pointer to a clockframe if ih_arg is NULL. 351 */ 352 struct intrhand { 353 int (*ih_fun)(void *); 354 void *ih_arg; 355 /* if we have to take the biglock, we interpose a wrapper 356 * and need to save the original function and arg */ 357 int (*ih_realfun)(void *); 358 void *ih_realarg; 359 short ih_number; /* interrupt number */ 360 /* the H/W provides */ 361 char ih_pil; /* interrupt priority */ 362 struct intrhand *ih_next; /* global list */ 363 struct intrhand *ih_pending; /* interrupt queued */ 364 volatile uint64_t *ih_map; /* Interrupt map reg */ 365 volatile uint64_t *ih_clr; /* clear interrupt reg */ 366 void (*ih_ack)(struct intrhand *); /* ack interrupt function */ 367 bus_space_tag_t ih_bus; /* parent bus */ 368 struct evcnt ih_cnt; /* counter for vmstat */ 369 uint32_t ih_ivec; 370 char ih_name[32]; /* name for the above */ 371 }; 372 extern struct intrhand *intrhand[]; 373 extern struct intrhand *intrlev[MAXINTNUM]; 374 375 void intr_establish(int level, bool mpsafe, struct intrhand *); 376 void *sparc_softintr_establish(int, int (*)(void *), void *); 377 void sparc_softintr_schedule(void *); 378 void sparc_softintr_disestablish(void *); 379 struct intrhand *intrhand_alloc(void); 380 381 /* cpu.c */ 382 int cpu_myid(void); 383 384 /* disksubr.c */ 385 struct dkbad; 386 int isbad(struct dkbad *bt, int, int, int); 387 /* machdep.c */ 388 void * reserve_dumppages(void *); 389 /* clock.c */ 390 struct timeval; 391 int tickintr(void *); /* level 10/14 (tick) interrupt code */ 392 int stickintr(void *); /* system tick interrupt code */ 393 int stick2eintr(void *); /* system tick interrupt code */ 394 int clockintr(void *); /* level 10 (clock) interrupt code */ 395 int statintr(void *); /* level 14 (statclock) interrupt code */ 396 int schedintr(void *); /* level 10 (schedclock) interrupt code */ 397 void tickintr_establish(int, int (*)(void *)); 398 void stickintr_establish(int, int (*)(void *)); 399 void stick2eintr_establish(int, int (*)(void *)); 400 401 /* locore.s */ 402 struct fpstate64; 403 void savefpstate(struct fpstate64 *); 404 void loadfpstate(struct fpstate64 *); 405 void clearfpstate(void); 406 uint64_t probeget(paddr_t, int, int); 407 int probeset(paddr_t, int, int, uint64_t); 408 void setcputyp(int); 409 410 #define write_all_windows() __asm volatile("flushw" : : ) 411 #define write_user_windows() __asm volatile("flushw" : : ) 412 413 struct pcb; 414 void snapshot(struct pcb *); 415 struct frame *getfp(void); 416 void switchtoctx_us(int); 417 void switchtoctx_usiii(int); 418 void next_tick(long); 419 void next_stick(long); 420 /* trap.c */ 421 void cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t); 422 int rwindow_save(struct lwp *); 423 /* cons.c */ 424 int cnrom(void); 425 /* zs.c */ 426 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int)); 427 /* fb.c */ 428 void fb_unblank(void); 429 /* kgdb_stub.c */ 430 #ifdef KGDB 431 void kgdb_attach(int (*)(void *), void (*)(void *, int), void *); 432 void kgdb_connect(int); 433 void kgdb_panic(void); 434 #endif 435 /* emul.c */ 436 int fixalign(struct lwp *, struct trapframe64 *); 437 int emulinstr(vaddr_t, struct trapframe64 *); 438 439 #else /* _KERNEL */ 440 441 /* 442 * XXX: provide some definitions for crash(8), probably can share 443 */ 444 #if defined(_KMEMUSER) 445 #define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) 446 #define curlwp curcpu()->ci_curlwp 447 #endif 448 449 #endif /* _KERNEL */ 450 #endif /* _CPU_H_ */ 451