xref: /netbsd-src/sys/arch/sparc64/include/cpu.h (revision cef8759bd76c1b621f8eab8faa6f208faabc2e15)
1 /*	$NetBSD: cpu.h,v 1.130 2020/03/10 03:49:56 christos Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. Neither the name of the University nor the names of its contributors
25  *    may be used to endorse or promote products derived from this software
26  *    without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38  * SUCH DAMAGE.
39  *
40  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
41  */
42 
43 #ifndef _CPU_H_
44 #define _CPU_H_
45 
46 /*
47  * CTL_MACHDEP definitions.
48  */
49 #define	CPU_BOOTED_KERNEL	1	/* string: booted kernel name */
50 #define	CPU_BOOTED_DEVICE	2	/* string: device booted from */
51 #define	CPU_BOOT_ARGS		3	/* string: args booted with */
52 #define	CPU_ARCH		4	/* integer: cpu architecture version */
53 #define CPU_VIS			5	/* 0 - no VIS, 1 - VIS 1.0, etc. */
54 
55 /*
56  * This is exported via sysctl for cpuctl(8).
57  */
58 struct cacheinfo {
59 	int 	c_itotalsize;
60 	int 	c_ilinesize;
61 	int 	c_dtotalsize;
62 	int 	c_dlinesize;
63 	int 	c_etotalsize;
64 	int 	c_elinesize;
65 };
66 
67 #if defined(_KERNEL) || defined(_KMEMUSER)
68 /*
69  * Exported definitions unique to SPARC cpu support.
70  */
71 
72 #if defined(_KERNEL_OPT)
73 #include "opt_multiprocessor.h"
74 #include "opt_lockdebug.h"
75 #endif
76 
77 #include <machine/psl.h>
78 #include <machine/reg.h>
79 #include <machine/pte.h>
80 #include <machine/intr.h>
81 #if defined(_KERNEL)
82 #include <machine/bus_defs.h>
83 #include <machine/cpuset.h>
84 #include <sparc64/sparc64/intreg.h>
85 #endif
86 #ifdef SUN4V
87 #include <machine/hypervisor.h>
88 #endif
89 
90 #include <sys/cpu_data.h>
91 #include <sys/evcnt.h>
92 
93 /*
94  * The cpu_info structure is part of a 64KB structure mapped both the kernel
95  * pmap and a single locked TTE a CPUINFO_VA for that particular processor.
96  * Each processor's cpu_info is accessible at CPUINFO_VA only for that
97  * processor.  Other processors can access that through an additional mapping
98  * in the kernel pmap.
99  *
100  * The 64KB page contains:
101  *
102  * cpu_info
103  * interrupt stack (all remaining space)
104  * idle PCB
105  * idle stack (STACKSPACE - sizeof(PCB))
106  * 32KB TSB
107  */
108 
109 struct cpu_info {
110 	struct cpu_data		ci_data;	/* MI per-cpu data */
111 
112 
113 	/*
114 	 * SPARC cpu_info structures live at two VAs: one global
115 	 * VA (so each CPU can access any other CPU's cpu_info)
116 	 * and an alias VA CPUINFO_VA which is the same on each
117 	 * CPU and maps to that CPU's cpu_info.  Since the alias
118 	 * CPUINFO_VA is how we locate our cpu_info, we have to
119 	 * self-reference the global VA so that we can return it
120 	 * in the curcpu() macro.
121 	 */
122 	struct cpu_info * volatile ci_self;
123 
124 	/* Most important fields first */
125 	struct lwp		*ci_curlwp;
126 	struct lwp		*ci_onproc;	/* current user LWP / kthread */
127 	struct pcb		*ci_cpcb;
128 	struct cpu_info		*ci_next;
129 
130 	struct lwp		*ci_fplwp;
131 
132 	void			*ci_eintstack;
133 
134 	int			ci_mtx_count;
135 	int			ci_mtx_oldspl;
136 
137 	/* Spinning up the CPU */
138 	void			(*ci_spinup)(void);
139 	paddr_t			ci_paddr;
140 
141 	int			ci_cpuid;
142 
143 	uint64_t		ci_ver;
144 
145 	/* CPU PROM information. */
146 	u_int			ci_node;
147 	const char		*ci_name;
148 
149 	/* This is for sysctl. */
150 	struct cacheinfo	ci_cacheinfo;
151 
152 	/* %tick and cpu frequency information */
153 	u_long			ci_tick_increment;
154 	uint64_t		ci_cpu_clockrate[2];	/* %tick */
155 	uint64_t		ci_system_clockrate[2];	/* %stick */
156 
157 	/* Interrupts */
158 	struct intrhand		*ci_intrpending[16];
159 	struct intrhand		*ci_tick_ih;
160 
161 	/* Event counters */
162 	struct evcnt		ci_tick_evcnt;
163 
164 	/* This could be under MULTIPROCESSOR, but there's no good reason */
165 	struct evcnt		ci_ipi_evcnt[IPI_EVCNT_NUM];
166 
167 	int			ci_flags;
168 	int			ci_want_ast;
169 	int			ci_want_resched;
170 	int			ci_idepth;
171 
172 /*
173  * A context is simply a small number that differentiates multiple mappings
174  * of the same address.  Contexts on the spitfire are 13 bits, but could
175  * be as large as 17 bits.
176  *
177  * Each context is either free or attached to a pmap.
178  *
179  * The context table is an array of pointers to psegs.  Just dereference
180  * the right pointer and you get to the pmap segment tables.  These are
181  * physical addresses, of course.
182  *
183  * ci_ctx_lock protects this CPUs context allocation/free.
184  * These are all allocated almost with in the same cacheline.
185  */
186 	kmutex_t		ci_ctx_lock;
187 	int			ci_pmap_next_ctx;
188 	int			ci_numctx;
189 	paddr_t 		*ci_ctxbusy;
190 	LIST_HEAD(, pmap) 	ci_pmap_ctxlist;
191 
192 	/*
193 	 * The TSBs are per cpu too (since MMU context differs between
194 	 * cpus). These are just caches for the TLBs.
195 	 */
196 	pte_t			*ci_tsb_dmmu;
197 	pte_t			*ci_tsb_immu;
198 
199 	/* TSB description (sun4v). */
200 	struct tsb_desc         *ci_tsb_desc;
201 
202 	/* MMU Fault Status Area (sun4v).
203 	 * Will be initialized to the physical address of the bottom of
204 	 * the interrupt stack.
205 	 */
206 	paddr_t			ci_mmufsa;
207 
208 	/*
209 	 * sun4v mondo control fields
210 	 */
211 	paddr_t			ci_cpumq;  /* cpu mondo queue address */
212 	paddr_t			ci_devmq;  /* device mondo queue address */
213 	paddr_t			ci_cpuset; /* mondo recipient address */
214 	paddr_t			ci_mondo;  /* mondo message address */
215 
216 	/* probe fault in PCI config space reads */
217 	bool			ci_pci_probe;
218 	bool			ci_pci_fault;
219 
220 	volatile void		*ci_ddb_regs;	/* DDB regs */
221 };
222 
223 #endif /* _KERNEL || _KMEMUSER */
224 
225 #ifdef _KERNEL
226 
227 #define CPUF_PRIMARY	1
228 
229 /*
230  * CPU boot arguments. Used by secondary CPUs at the bootstrap time.
231  */
232 struct cpu_bootargs {
233 	u_int	cb_node;	/* PROM CPU node */
234 	volatile int cb_flags;
235 
236 	vaddr_t cb_ktext;
237 	paddr_t cb_ktextp;
238 	vaddr_t cb_ektext;
239 
240 	vaddr_t cb_kdata;
241 	paddr_t cb_kdatap;
242 	vaddr_t cb_ekdata;
243 
244 	paddr_t	cb_cpuinfo;
245 	int cb_cputyp;
246 };
247 
248 extern struct cpu_bootargs *cpu_args;
249 
250 #if defined(MULTIPROCESSOR)
251 extern int sparc_ncpus;
252 #else
253 #define sparc_ncpus 1
254 #endif
255 
256 extern struct cpu_info *cpus;
257 extern struct pool_cache *fpstate_cache;
258 
259 /* CURCPU_INT() a local (per CPU) view of our cpu_info */
260 #define	CURCPU_INT()	((struct cpu_info *)CPUINFO_VA)
261 /* in general we prefer the globaly visible pointer */
262 #define	curcpu()	(CURCPU_INT()->ci_self)
263 #define	cpu_number()	(curcpu()->ci_index)
264 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
265 
266 #define CPU_INFO_ITERATOR		int __unused
267 #define CPU_INFO_FOREACH(cii, ci)	ci = cpus; ci != NULL; ci = ci->ci_next
268 
269 /* these are only valid on the local cpu */
270 #define curlwp		CURCPU_INT()->ci_curlwp
271 #define fplwp		CURCPU_INT()->ci_fplwp
272 #define curpcb		CURCPU_INT()->ci_cpcb
273 #define want_ast	CURCPU_INT()->ci_want_ast
274 
275 /*
276  * definitions of cpu-dependent requirements
277  * referenced in generic code
278  */
279 #define	cpu_wait(p)	/* nothing */
280 void cpu_proc_fork(struct proc *, struct proc *);
281 
282 /* run on the cpu itself */
283 void	cpu_pmap_init(struct cpu_info *);
284 /* run upfront to prepare the cpu_info */
285 void	cpu_pmap_prepare(struct cpu_info *, bool);
286 
287 /* Helper functions to retrieve cache info */
288 int	cpu_ecache_associativity(int node);
289 int	cpu_ecache_size(int node);
290 
291 #if defined(MULTIPROCESSOR)
292 extern vaddr_t cpu_spinup_trampoline;
293 
294 extern  char   *mp_tramp_code;
295 extern  u_long  mp_tramp_code_len;
296 extern  u_long  mp_tramp_dtlb_slots, mp_tramp_itlb_slots;
297 extern  u_long  mp_tramp_func;
298 extern  u_long  mp_tramp_ci;
299 
300 void	cpu_hatch(void);
301 void	cpu_boot_secondary_processors(void);
302 
303 /*
304  * Call a function on other cpus:
305  *	multicast - send to everyone in the sparc64_cpuset_t
306  *	broadcast - send to to all cpus but ourselves
307  *	send - send to just this cpu
308  * The called function do not follow the C ABI, so need to be coded in
309  * assembler.
310  */
311 typedef void (* ipifunc_t)(void *, void *);
312 
313 void	sparc64_multicast_ipi(sparc64_cpuset_t, ipifunc_t, uint64_t, uint64_t);
314 void	sparc64_broadcast_ipi(ipifunc_t, uint64_t, uint64_t);
315 extern void (*sparc64_send_ipi)(int, ipifunc_t, uint64_t, uint64_t);
316 
317 /*
318  * Call an arbitrary C function on another cpu (or all others but ourself)
319  */
320 typedef void (*ipi_c_call_func_t)(void*);
321 void	sparc64_generic_xcall(struct cpu_info*, ipi_c_call_func_t, void*);
322 
323 #endif
324 
325 /* Provide %pc of a lwp */
326 #define	LWP_PC(l)	((l)->l_md.md_tf->tf_pc)
327 
328 /*
329  * Arguments to hardclock, softclock and gatherstats encapsulate the
330  * previous machine state in an opaque clockframe.  The ipl is here
331  * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
332  * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
333  */
334 struct clockframe {
335 	struct trapframe64 t;
336 };
337 
338 #define	CLKF_USERMODE(framep)	(((framep)->t.tf_tstate & TSTATE_PRIV) == 0)
339 #define	CLKF_PC(framep)		((framep)->t.tf_pc)
340 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */
341 #define	CLKF_INTR(framep)						\
342 	((!CLKF_USERMODE(framep))&&					\
343 		(((framep)->t.tf_out[6] & 1 ) ?				\
344 			(((vaddr_t)(framep)->t.tf_out[6] <		\
345 				(vaddr_t)EINTSTACK-0x7ff) &&		\
346 			((vaddr_t)(framep)->t.tf_out[6] >		\
347 				(vaddr_t)INTSTACK-0x7ff)) :		\
348 			(((vaddr_t)(framep)->t.tf_out[6] <		\
349 				(vaddr_t)EINTSTACK) &&			\
350 			((vaddr_t)(framep)->t.tf_out[6] >		\
351 				(vaddr_t)INTSTACK))))
352 
353 /*
354  * Give a profiling tick to the current process when the user profiling
355  * buffer pages are invalid.  On the sparc, request an ast to send us
356  * through trap(), marking the proc as needing a profiling tick.
357  */
358 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, want_ast = 1)
359 
360 /*
361  * Notify an LWP that it has a signal pending, process as soon as possible.
362  */
363 void cpu_signotify(struct lwp *);
364 
365 
366 /*
367  * Interrupt handler chains.  Interrupt handlers should return 0 for
368  * ``not me'' or 1 (``I took care of it'').  intr_establish() inserts a
369  * handler into the list.  The handler is called with its (single)
370  * argument, or with a pointer to a clockframe if ih_arg is NULL.
371  */
372 struct intrhand {
373 	int			(*ih_fun)(void *);
374 	void			*ih_arg;
375 	/* if we have to take the biglock, we interpose a wrapper
376 	 * and need to save the original function and arg */
377 	int			(*ih_realfun)(void *);
378 	void			*ih_realarg;
379 	short			ih_number;	/* interrupt number */
380 						/* the H/W provides */
381 	char			ih_pil;		/* interrupt priority */
382 	struct intrhand		*ih_next;	/* global list */
383 	struct intrhand		*ih_pending;	/* interrupt queued */
384 	volatile uint64_t	*ih_map;	/* Interrupt map reg */
385 	volatile uint64_t	*ih_clr;	/* clear interrupt reg */
386 	void			(*ih_ack)(struct intrhand *); /* ack interrupt function */
387 	bus_space_tag_t		ih_bus;		/* parent bus */
388 	struct evcnt		ih_cnt;		/* counter for vmstat */
389 	uint32_t		ih_ivec;
390 	char			ih_name[32];	/* name for the above */
391 };
392 extern struct intrhand *intrhand[];
393 extern struct intrhand *intrlev[MAXINTNUM];
394 
395 void	intr_establish(int level, bool mpsafe, struct intrhand *);
396 void	*sparc_softintr_establish(int, int (*)(void *), void *);
397 void	sparc_softintr_schedule(void *);
398 void	sparc_softintr_disestablish(void *);
399 struct intrhand *intrhand_alloc(void);
400 
401 /* cpu.c */
402 int	cpu_myid(void);
403 
404 /* disksubr.c */
405 struct dkbad;
406 int isbad(struct dkbad *bt, int, int, int);
407 /* machdep.c */
408 void *	reserve_dumppages(void *);
409 /* clock.c */
410 struct timeval;
411 int	tickintr(void *);	/* level 10/14 (tick) interrupt code */
412 int	stickintr(void *);	/* system tick interrupt code */
413 int	stick2eintr(void *);	/* system tick interrupt code */
414 int	clockintr(void *);	/* level 10 (clock) interrupt code */
415 int	statintr(void *);	/* level 14 (statclock) interrupt code */
416 int	schedintr(void *);	/* level 10 (schedclock) interrupt code */
417 void	tickintr_establish(int, int (*)(void *));
418 void	stickintr_establish(int, int (*)(void *));
419 void	stick2eintr_establish(int, int (*)(void *));
420 
421 /* locore.s */
422 struct fpstate64;
423 void	savefpstate(struct fpstate64 *);
424 void	loadfpstate(struct fpstate64 *);
425 void	clearfpstate(void);
426 uint64_t	probeget(paddr_t, int, int);
427 int	probeset(paddr_t, int, int, uint64_t);
428 void	setcputyp(int);
429 
430 #define	 write_all_windows() __asm volatile("flushw" : : )
431 #define	 write_user_windows() __asm volatile("flushw" : : )
432 
433 struct pcb;
434 void	snapshot(struct pcb *);
435 struct frame *getfp(void);
436 void	switchtoctx_us(int);
437 void	switchtoctx_usiii(int);
438 void	next_tick(long);
439 void	next_stick(long);
440 void	next_stick_init(void);
441 /* trap.c */
442 void	cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t);
443 int	rwindow_save(struct lwp *);
444 /* cons.c */
445 int	cnrom(void);
446 /* zs.c */
447 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int));
448 /* fb.c */
449 void	fb_unblank(void);
450 /* kgdb_stub.c */
451 #ifdef KGDB
452 void kgdb_attach(int (*)(void *), void (*)(void *, int), void *);
453 void kgdb_connect(int);
454 void kgdb_panic(void);
455 #endif
456 /* emul.c */
457 int	fixalign(struct lwp *, struct trapframe64 *);
458 int	emulinstr(vaddr_t, struct trapframe64 *);
459 
460 #endif /* _KERNEL */
461 #endif /* _CPU_H_ */
462