1 /* $NetBSD: cpu.h,v 1.132 2021/04/05 22:36:27 nakayama Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 41 */ 42 43 #ifndef _CPU_H_ 44 #define _CPU_H_ 45 46 /* 47 * CTL_MACHDEP definitions. 48 */ 49 #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */ 50 #define CPU_BOOTED_DEVICE 2 /* string: device booted from */ 51 #define CPU_BOOT_ARGS 3 /* string: args booted with */ 52 #define CPU_ARCH 4 /* integer: cpu architecture version */ 53 #define CPU_VIS 5 /* 0 - no VIS, 1 - VIS 1.0, etc. */ 54 55 /* 56 * This is exported via sysctl for cpuctl(8). 57 */ 58 struct cacheinfo { 59 int c_itotalsize; 60 int c_ilinesize; 61 int c_dtotalsize; 62 int c_dlinesize; 63 int c_etotalsize; 64 int c_elinesize; 65 }; 66 67 #if defined(_KERNEL) || defined(_KMEMUSER) 68 /* 69 * Exported definitions unique to SPARC cpu support. 70 */ 71 72 #if defined(_KERNEL_OPT) 73 #include "opt_multiprocessor.h" 74 #include "opt_lockdebug.h" 75 #endif 76 77 #include <machine/psl.h> 78 #include <machine/reg.h> 79 #include <machine/pte.h> 80 #include <machine/intr.h> 81 #if defined(_KERNEL) 82 #include <machine/bus_defs.h> 83 #include <machine/cpuset.h> 84 #include <sparc64/sparc64/intreg.h> 85 #endif 86 #ifdef SUN4V 87 #include <machine/hypervisor.h> 88 #endif 89 90 #include <sys/cpu_data.h> 91 #include <sys/evcnt.h> 92 93 /* 94 * The cpu_info structure is part of a 64KB structure mapped both the kernel 95 * pmap and a single locked TTE a CPUINFO_VA for that particular processor. 96 * Each processor's cpu_info is accessible at CPUINFO_VA only for that 97 * processor. Other processors can access that through an additional mapping 98 * in the kernel pmap. 99 * 100 * The 64KB page contains: 101 * 102 * cpu_info 103 * interrupt stack (all remaining space) 104 * idle PCB 105 * idle stack (STACKSPACE - sizeof(PCB)) 106 * 32KB TSB 107 */ 108 109 struct cpu_info { 110 struct cpu_data ci_data; /* MI per-cpu data */ 111 112 113 /* 114 * SPARC cpu_info structures live at two VAs: one global 115 * VA (so each CPU can access any other CPU's cpu_info) 116 * and an alias VA CPUINFO_VA which is the same on each 117 * CPU and maps to that CPU's cpu_info. Since the alias 118 * CPUINFO_VA is how we locate our cpu_info, we have to 119 * self-reference the global VA so that we can return it 120 * in the curcpu() macro. 121 */ 122 struct cpu_info * volatile ci_self; 123 124 /* Most important fields first */ 125 struct lwp *ci_curlwp; 126 struct lwp *ci_onproc; /* current user LWP / kthread */ 127 struct pcb *ci_cpcb; 128 struct cpu_info *ci_next; 129 130 struct lwp *ci_fplwp; 131 132 void *ci_eintstack; 133 134 int ci_mtx_count; 135 int ci_mtx_oldspl; 136 137 /* Spinning up the CPU */ 138 void (*ci_spinup)(void); 139 paddr_t ci_paddr; 140 141 int ci_cpuid; 142 143 uint64_t ci_ver; 144 145 /* CPU PROM information. */ 146 u_int ci_node; 147 const char *ci_name; 148 149 /* This is for sysctl. */ 150 struct cacheinfo ci_cacheinfo; 151 152 /* %tick and cpu frequency information */ 153 u_long ci_tick_increment; 154 uint64_t ci_cpu_clockrate[2]; /* %tick */ 155 uint64_t ci_system_clockrate[2]; /* %stick */ 156 157 /* Interrupts */ 158 struct intrhand *ci_intrpending[16]; 159 struct intrhand *ci_tick_ih; 160 161 /* Event counters */ 162 struct evcnt ci_tick_evcnt; 163 164 /* This could be under MULTIPROCESSOR, but there's no good reason */ 165 struct evcnt ci_ipi_evcnt[IPI_EVCNT_NUM]; 166 167 int ci_flags; 168 int ci_want_ast; 169 int ci_want_resched; 170 int ci_idepth; 171 172 /* 173 * A context is simply a small number that differentiates multiple mappings 174 * of the same address. Contexts on the spitfire are 13 bits, but could 175 * be as large as 17 bits. 176 * 177 * Each context is either free or attached to a pmap. 178 * 179 * The context table is an array of pointers to psegs. Just dereference 180 * the right pointer and you get to the pmap segment tables. These are 181 * physical addresses, of course. 182 * 183 * ci_ctx_lock protects this CPUs context allocation/free. 184 * These are all allocated almost with in the same cacheline. 185 */ 186 kmutex_t ci_ctx_lock; 187 int ci_pmap_next_ctx; 188 int ci_numctx; 189 paddr_t *ci_ctxbusy; 190 LIST_HEAD(, pmap) ci_pmap_ctxlist; 191 192 /* 193 * The TSBs are per cpu too (since MMU context differs between 194 * cpus). These are just caches for the TLBs. 195 */ 196 pte_t *ci_tsb_dmmu; 197 pte_t *ci_tsb_immu; 198 199 /* TSB description (sun4v). */ 200 struct tsb_desc *ci_tsb_desc; 201 202 /* MMU Fault Status Area (sun4v). 203 * Will be initialized to the physical address of the bottom of 204 * the interrupt stack. 205 */ 206 paddr_t ci_mmufsa; 207 208 /* 209 * sun4v mondo control fields 210 */ 211 paddr_t ci_cpumq; /* cpu mondo queue address */ 212 paddr_t ci_devmq; /* device mondo queue address */ 213 paddr_t ci_cpuset; /* mondo recipient address */ 214 paddr_t ci_mondo; /* mondo message address */ 215 216 /* probe fault in PCI config space reads */ 217 bool ci_pci_probe; 218 bool ci_pci_fault; 219 220 volatile void *ci_ddb_regs; /* DDB regs */ 221 222 void (*ci_idlespin)(void); 223 }; 224 225 #endif /* _KERNEL || _KMEMUSER */ 226 227 #ifdef _KERNEL 228 229 #define CPUF_PRIMARY 1 230 231 /* 232 * CPU boot arguments. Used by secondary CPUs at the bootstrap time. 233 */ 234 struct cpu_bootargs { 235 u_int cb_node; /* PROM CPU node */ 236 volatile int cb_flags; 237 238 vaddr_t cb_ktext; 239 paddr_t cb_ktextp; 240 vaddr_t cb_ektext; 241 242 vaddr_t cb_kdata; 243 paddr_t cb_kdatap; 244 vaddr_t cb_ekdata; 245 246 paddr_t cb_cpuinfo; 247 int cb_cputyp; 248 }; 249 250 extern struct cpu_bootargs *cpu_args; 251 252 #if defined(MULTIPROCESSOR) 253 extern int sparc_ncpus; 254 #else 255 #define sparc_ncpus 1 256 #endif 257 258 extern struct cpu_info *cpus; 259 extern struct pool_cache *fpstate_cache; 260 261 /* CURCPU_INT() a local (per CPU) view of our cpu_info */ 262 #define CURCPU_INT() ((struct cpu_info *)CPUINFO_VA) 263 /* in general we prefer the globaly visible pointer */ 264 #define curcpu() (CURCPU_INT()->ci_self) 265 #define cpu_number() (curcpu()->ci_index) 266 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 267 268 #define CPU_INFO_ITERATOR int __unused 269 #define CPU_INFO_FOREACH(cii, ci) ci = cpus; ci != NULL; ci = ci->ci_next 270 271 /* these are only valid on the local cpu */ 272 #define curlwp CURCPU_INT()->ci_curlwp 273 #define fplwp CURCPU_INT()->ci_fplwp 274 #define curpcb CURCPU_INT()->ci_cpcb 275 #define want_ast CURCPU_INT()->ci_want_ast 276 277 /* 278 * definitions of cpu-dependent requirements 279 * referenced in generic code 280 */ 281 #define cpu_wait(p) /* nothing */ 282 void cpu_proc_fork(struct proc *, struct proc *); 283 284 /* run on the cpu itself */ 285 void cpu_pmap_init(struct cpu_info *); 286 /* run upfront to prepare the cpu_info */ 287 void cpu_pmap_prepare(struct cpu_info *, bool); 288 289 /* Helper functions to retrieve cache info */ 290 int cpu_ecache_associativity(int node); 291 int cpu_ecache_size(int node); 292 293 #if defined(MULTIPROCESSOR) 294 extern vaddr_t cpu_spinup_trampoline; 295 296 extern char *mp_tramp_code; 297 extern u_long mp_tramp_code_len; 298 extern u_long mp_tramp_dtlb_slots, mp_tramp_itlb_slots; 299 extern u_long mp_tramp_func; 300 extern u_long mp_tramp_ci; 301 302 void cpu_hatch(void); 303 void cpu_boot_secondary_processors(void); 304 305 /* 306 * Call a function on other cpus: 307 * multicast - send to everyone in the sparc64_cpuset_t 308 * broadcast - send to to all cpus but ourselves 309 * send - send to just this cpu 310 * The called function do not follow the C ABI, so need to be coded in 311 * assembler. 312 */ 313 typedef void (* ipifunc_t)(void *, void *); 314 315 void sparc64_multicast_ipi(sparc64_cpuset_t, ipifunc_t, uint64_t, uint64_t); 316 void sparc64_broadcast_ipi(ipifunc_t, uint64_t, uint64_t); 317 extern void (*sparc64_send_ipi)(int, ipifunc_t, uint64_t, uint64_t); 318 319 /* 320 * Call an arbitrary C function on another cpu (or all others but ourself) 321 */ 322 typedef void (*ipi_c_call_func_t)(void*); 323 void sparc64_generic_xcall(struct cpu_info*, ipi_c_call_func_t, void*); 324 325 #endif 326 327 /* Provide %pc of a lwp */ 328 #define LWP_PC(l) ((l)->l_md.md_tf->tf_pc) 329 330 /* 331 * Arguments to hardclock, softclock and gatherstats encapsulate the 332 * previous machine state in an opaque clockframe. The ipl is here 333 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 334 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 335 */ 336 struct clockframe { 337 struct trapframe64 t; 338 }; 339 340 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0) 341 #define CLKF_PC(framep) ((framep)->t.tf_pc) 342 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */ 343 #define CLKF_INTR(framep) \ 344 ((!CLKF_USERMODE(framep))&& \ 345 (((framep)->t.tf_out[6] & 1 ) ? \ 346 (((vaddr_t)(framep)->t.tf_out[6] < \ 347 (vaddr_t)EINTSTACK-0x7ff) && \ 348 ((vaddr_t)(framep)->t.tf_out[6] > \ 349 (vaddr_t)INTSTACK-0x7ff)) : \ 350 (((vaddr_t)(framep)->t.tf_out[6] < \ 351 (vaddr_t)EINTSTACK) && \ 352 ((vaddr_t)(framep)->t.tf_out[6] > \ 353 (vaddr_t)INTSTACK)))) 354 355 /* 356 * Give a profiling tick to the current process when the user profiling 357 * buffer pages are invalid. On the sparc, request an ast to send us 358 * through trap(), marking the proc as needing a profiling tick. 359 */ 360 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, want_ast = 1) 361 362 /* 363 * Notify an LWP that it has a signal pending, process as soon as possible. 364 */ 365 void cpu_signotify(struct lwp *); 366 367 368 /* 369 * Interrupt handler chains. Interrupt handlers should return 0 for 370 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 371 * handler into the list. The handler is called with its (single) 372 * argument, or with a pointer to a clockframe if ih_arg is NULL. 373 */ 374 struct intrhand { 375 int (*ih_fun)(void *); 376 void *ih_arg; 377 /* if we have to take the biglock, we interpose a wrapper 378 * and need to save the original function and arg */ 379 int (*ih_realfun)(void *); 380 void *ih_realarg; 381 short ih_number; /* interrupt number */ 382 /* the H/W provides */ 383 char ih_pil; /* interrupt priority */ 384 struct intrhand *ih_next; /* global list */ 385 struct intrhand *ih_pending; /* interrupt queued */ 386 volatile uint64_t *ih_map; /* Interrupt map reg */ 387 volatile uint64_t *ih_clr; /* clear interrupt reg */ 388 void (*ih_ack)(struct intrhand *); /* ack interrupt function */ 389 bus_space_tag_t ih_bus; /* parent bus */ 390 struct evcnt ih_cnt; /* counter for vmstat */ 391 uint32_t ih_ivec; 392 char ih_name[32]; /* name for the above */ 393 }; 394 extern struct intrhand *intrhand[]; 395 extern struct intrhand *intrlev[MAXINTNUM]; 396 397 void intr_establish(int level, bool mpsafe, struct intrhand *); 398 void *sparc_softintr_establish(int, int (*)(void *), void *); 399 void sparc_softintr_schedule(void *); 400 void sparc_softintr_disestablish(void *); 401 struct intrhand *intrhand_alloc(void); 402 403 /* cpu.c */ 404 int cpu_myid(void); 405 406 /* disksubr.c */ 407 struct dkbad; 408 int isbad(struct dkbad *bt, int, int, int); 409 /* machdep.c */ 410 void * reserve_dumppages(void *); 411 /* clock.c */ 412 struct timeval; 413 int tickintr(void *); /* level 10/14 (tick) interrupt code */ 414 int stickintr(void *); /* system tick interrupt code */ 415 int stick2eintr(void *); /* system tick interrupt code */ 416 int clockintr(void *); /* level 10 (clock) interrupt code */ 417 int statintr(void *); /* level 14 (statclock) interrupt code */ 418 int schedintr(void *); /* level 10 (schedclock) interrupt code */ 419 void tickintr_establish(int, int (*)(void *)); 420 void stickintr_establish(int, int (*)(void *)); 421 void stick2eintr_establish(int, int (*)(void *)); 422 423 /* locore.s */ 424 struct fpstate64; 425 void savefpstate(struct fpstate64 *); 426 void loadfpstate(struct fpstate64 *); 427 void clearfpstate(void); 428 uint64_t probeget(paddr_t, int, int); 429 int probeset(paddr_t, int, int, uint64_t); 430 void setcputyp(int); 431 432 #define write_all_windows() __asm volatile("flushw" : : ) 433 #define write_user_windows() __asm volatile("flushw" : : ) 434 435 struct pcb; 436 void snapshot(struct pcb *); 437 struct frame *getfp(void); 438 void switchtoctx_us(int); 439 void switchtoctx_usiii(int); 440 void next_tick(long); 441 void next_stick(long); 442 void next_stick_init(void); 443 /* trap.c */ 444 void cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t); 445 int rwindow_save(struct lwp *); 446 /* cons.c */ 447 int cnrom(void); 448 /* zs.c */ 449 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int)); 450 /* fb.c */ 451 void fb_unblank(void); 452 /* kgdb_stub.c */ 453 #ifdef KGDB 454 void kgdb_attach(int (*)(void *), void (*)(void *, int), void *); 455 void kgdb_connect(int); 456 void kgdb_panic(void); 457 #endif 458 /* emul.c */ 459 int fixalign(struct lwp *, struct trapframe64 *); 460 int emulinstr(vaddr_t, struct trapframe64 *); 461 462 #endif /* _KERNEL */ 463 #endif /* _CPU_H_ */ 464