1 /* $NetBSD: cpu.h,v 1.110 2014/02/21 18:00:09 palle Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 41 */ 42 43 #ifndef _CPU_H_ 44 #define _CPU_H_ 45 46 /* 47 * CTL_MACHDEP definitions. 48 */ 49 #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */ 50 #define CPU_BOOTED_DEVICE 2 /* string: device booted from */ 51 #define CPU_BOOT_ARGS 3 /* string: args booted with */ 52 #define CPU_ARCH 4 /* integer: cpu architecture version */ 53 #define CPU_VIS 5 /* 0 - no VIS, 1 - VIS 1.0, etc. */ 54 #define CPU_MAXID 6 /* number of valid machdep ids */ 55 56 #if defined(_KERNEL) || defined(_KMEMUSER) 57 /* 58 * Exported definitions unique to SPARC cpu support. 59 */ 60 61 #if defined(_KERNEL_OPT) 62 #include "opt_multiprocessor.h" 63 #include "opt_lockdebug.h" 64 #endif 65 66 #include <machine/psl.h> 67 #include <machine/reg.h> 68 #include <machine/pte.h> 69 #include <machine/intr.h> 70 #if defined(_KERNEL) 71 #include <machine/cpuset.h> 72 #include <sparc64/sparc64/intreg.h> 73 #endif 74 75 #include <sys/cpu_data.h> 76 #include <sys/evcnt.h> 77 78 /* 79 * The cpu_info structure is part of a 64KB structure mapped both the kernel 80 * pmap and a single locked TTE a CPUINFO_VA for that particular processor. 81 * Each processor's cpu_info is accessible at CPUINFO_VA only for that 82 * processor. Other processors can access that through an additional mapping 83 * in the kernel pmap. 84 * 85 * The 64KB page contains: 86 * 87 * cpu_info 88 * interrupt stack (all remaining space) 89 * idle PCB 90 * idle stack (STACKSPACE - sizeof(PCB)) 91 * 32KB TSB 92 */ 93 94 struct cpu_info { 95 struct cpu_data ci_data; /* MI per-cpu data */ 96 97 98 /* 99 * SPARC cpu_info structures live at two VAs: one global 100 * VA (so each CPU can access any other CPU's cpu_info) 101 * and an alias VA CPUINFO_VA which is the same on each 102 * CPU and maps to that CPU's cpu_info. Since the alias 103 * CPUINFO_VA is how we locate our cpu_info, we have to 104 * self-reference the global VA so that we can return it 105 * in the curcpu() macro. 106 */ 107 struct cpu_info * volatile ci_self; 108 109 /* Most important fields first */ 110 struct lwp *ci_curlwp; 111 struct pcb *ci_cpcb; 112 struct cpu_info *ci_next; 113 114 struct lwp *ci_fplwp; 115 116 void *ci_eintstack; 117 118 int ci_mtx_count; 119 int ci_mtx_oldspl; 120 121 /* Spinning up the CPU */ 122 void (*ci_spinup)(void); 123 paddr_t ci_paddr; 124 125 int ci_cpuid; 126 127 /* CPU PROM information. */ 128 u_int ci_node; 129 130 /* %tick and cpu frequency information */ 131 u_long ci_tick_increment; 132 uint64_t ci_cpu_clockrate[2]; /* %tick */ 133 uint64_t ci_system_clockrate[2]; /* %stick */ 134 135 /* Interrupts */ 136 struct intrhand *ci_intrpending[16]; 137 struct intrhand *ci_tick_ih; 138 139 /* Event counters */ 140 struct evcnt ci_tick_evcnt; 141 142 /* This could be under MULTIPROCESSOR, but there's no good reason */ 143 struct evcnt ci_ipi_evcnt[IPI_EVCNT_NUM]; 144 145 int ci_flags; 146 int ci_want_ast; 147 int ci_want_resched; 148 int ci_idepth; 149 150 /* 151 * A context is simply a small number that differentiates multiple mappings 152 * of the same address. Contexts on the spitfire are 13 bits, but could 153 * be as large as 17 bits. 154 * 155 * Each context is either free or attached to a pmap. 156 * 157 * The context table is an array of pointers to psegs. Just dereference 158 * the right pointer and you get to the pmap segment tables. These are 159 * physical addresses, of course. 160 * 161 * ci_ctx_lock protects this CPUs context allocation/free. 162 * These are all allocated almost with in the same cacheline. 163 */ 164 kmutex_t ci_ctx_lock; 165 int ci_pmap_next_ctx; 166 int ci_numctx; 167 paddr_t *ci_ctxbusy; 168 LIST_HEAD(, pmap) ci_pmap_ctxlist; 169 170 /* 171 * The TSBs are per cpu too (since MMU context differs between 172 * cpus). These are just caches for the TLBs. 173 */ 174 pte_t *ci_tsb_dmmu; 175 pte_t *ci_tsb_immu; 176 177 /* MMU Fault Status Area (sun4v). 178 * Will be initialized to the physical address of the bottom of 179 * the interrupt stack. 180 */ 181 paddr_t ci_mmfsa; 182 183 /* probe fault in PCI config space reads */ 184 bool ci_pci_probe; 185 bool ci_pci_fault; 186 187 volatile void *ci_ddb_regs; /* DDB regs */ 188 }; 189 190 #endif /* _KERNEL || _KMEMUSER */ 191 192 #ifdef _KERNEL 193 194 #define CPUF_PRIMARY 1 195 196 /* 197 * CPU boot arguments. Used by secondary CPUs at the bootstrap time. 198 */ 199 struct cpu_bootargs { 200 u_int cb_node; /* PROM CPU node */ 201 volatile int cb_flags; 202 203 vaddr_t cb_ktext; 204 paddr_t cb_ktextp; 205 vaddr_t cb_ektext; 206 207 vaddr_t cb_kdata; 208 paddr_t cb_kdatap; 209 vaddr_t cb_ekdata; 210 211 paddr_t cb_cpuinfo; 212 }; 213 214 extern struct cpu_bootargs *cpu_args; 215 216 #if defined(MULTIPROCESSOR) 217 extern int sparc_ncpus; 218 #else 219 #define sparc_ncpus 1 220 #endif 221 222 extern struct cpu_info *cpus; 223 extern struct pool_cache *fpstate_cache; 224 225 #define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) 226 #define cpu_number() (curcpu()->ci_index) 227 #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) 228 229 #define CPU_INFO_ITERATOR int __unused 230 #define CPU_INFO_FOREACH(cii, ci) ci = cpus; ci != NULL; ci = ci->ci_next 231 232 #define curlwp curcpu()->ci_curlwp 233 #define fplwp curcpu()->ci_fplwp 234 #define curpcb curcpu()->ci_cpcb 235 236 #define want_ast curcpu()->ci_want_ast 237 #define want_resched curcpu()->ci_want_resched 238 239 /* 240 * definitions of cpu-dependent requirements 241 * referenced in generic code 242 */ 243 #define cpu_wait(p) /* nothing */ 244 void cpu_proc_fork(struct proc *, struct proc *); 245 246 /* run on the cpu itself */ 247 void cpu_pmap_init(struct cpu_info *); 248 /* run upfront to prepare the cpu_info */ 249 void cpu_pmap_prepare(struct cpu_info *, bool); 250 251 #if defined(MULTIPROCESSOR) 252 extern vaddr_t cpu_spinup_trampoline; 253 254 extern char *mp_tramp_code; 255 extern u_long mp_tramp_code_len; 256 extern u_long mp_tramp_tlb_slots; 257 extern u_long mp_tramp_func; 258 extern u_long mp_tramp_ci; 259 260 void cpu_hatch(void); 261 void cpu_boot_secondary_processors(void); 262 263 /* 264 * Call a function on other cpus: 265 * multicast - send to everyone in the sparc64_cpuset_t 266 * broadcast - send to to all cpus but ourselves 267 * send - send to just this cpu 268 * The called function do not follow the C ABI, so need to be coded in 269 * assembler. 270 */ 271 typedef void (* ipifunc_t)(void *, void *); 272 273 void sparc64_multicast_ipi(sparc64_cpuset_t, ipifunc_t, uint64_t, uint64_t); 274 void sparc64_broadcast_ipi(ipifunc_t, uint64_t, uint64_t); 275 void sparc64_send_ipi(int, ipifunc_t, uint64_t, uint64_t); 276 277 /* 278 * Call an arbitrary C function on another cpu (or all others but ourself) 279 */ 280 typedef void (*ipi_c_call_func_t)(void*); 281 void sparc64_generic_xcall(struct cpu_info*, ipi_c_call_func_t, void*); 282 283 #endif 284 285 /* Provide %pc of a lwp */ 286 #define LWP_PC(l) ((l)->l_md.md_tf->tf_pc) 287 288 /* 289 * Arguments to hardclock, softclock and gatherstats encapsulate the 290 * previous machine state in an opaque clockframe. The ipl is here 291 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 292 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 293 */ 294 struct clockframe { 295 struct trapframe64 t; 296 }; 297 298 #define CLKF_USERMODE(framep) (((framep)->t.tf_tstate & TSTATE_PRIV) == 0) 299 #define CLKF_PC(framep) ((framep)->t.tf_pc) 300 /* Since some files in sys/kern do not know BIAS, I'm using 0x7ff here */ 301 #define CLKF_INTR(framep) \ 302 ((!CLKF_USERMODE(framep))&& \ 303 (((framep)->t.tf_out[6] & 1 ) ? \ 304 (((vaddr_t)(framep)->t.tf_out[6] < \ 305 (vaddr_t)EINTSTACK-0x7ff) && \ 306 ((vaddr_t)(framep)->t.tf_out[6] > \ 307 (vaddr_t)INTSTACK-0x7ff)) : \ 308 (((vaddr_t)(framep)->t.tf_out[6] < \ 309 (vaddr_t)EINTSTACK) && \ 310 ((vaddr_t)(framep)->t.tf_out[6] > \ 311 (vaddr_t)INTSTACK)))) 312 313 /* 314 * Give a profiling tick to the current process when the user profiling 315 * buffer pages are invalid. On the sparc, request an ast to send us 316 * through trap(), marking the proc as needing a profiling tick. 317 */ 318 #define cpu_need_proftick(l) ((l)->l_pflag |= LP_OWEUPC, want_ast = 1) 319 320 /* 321 * Notify an LWP that it has a signal pending, process as soon as possible. 322 */ 323 void cpu_signotify(struct lwp *); 324 325 /* 326 * Interrupt handler chains. Interrupt handlers should return 0 for 327 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 328 * handler into the list. The handler is called with its (single) 329 * argument, or with a pointer to a clockframe if ih_arg is NULL. 330 */ 331 struct intrhand { 332 int (*ih_fun)(void *); 333 void *ih_arg; 334 /* if we have to take the biglock, we interpose a wrapper 335 * and need to save the original function and arg */ 336 int (*ih_realfun)(void *); 337 void *ih_realarg; 338 short ih_number; /* interrupt number */ 339 /* the H/W provides */ 340 char ih_pil; /* interrupt priority */ 341 struct intrhand *ih_next; /* global list */ 342 struct intrhand *ih_pending; /* interrupt queued */ 343 volatile uint64_t *ih_map; /* Interrupt map reg */ 344 volatile uint64_t *ih_clr; /* clear interrupt reg */ 345 struct evcnt ih_cnt; /* counter for vmstat */ 346 uint32_t ih_ivec; 347 char ih_name[32]; /* name for the above */ 348 }; 349 extern struct intrhand *intrhand[]; 350 extern struct intrhand *intrlev[MAXINTNUM]; 351 352 void intr_establish(int level, bool mpsafe, struct intrhand *); 353 void *sparc_softintr_establish(int, int (*)(void *), void *); 354 void sparc_softintr_schedule(void *); 355 void sparc_softintr_disestablish(void *); 356 357 /* cpu.c */ 358 int cpu_myid(void); 359 360 /* disksubr.c */ 361 struct dkbad; 362 int isbad(struct dkbad *bt, int, int, int); 363 /* machdep.c */ 364 void * reserve_dumppages(void *); 365 /* clock.c */ 366 struct timeval; 367 int tickintr(void *); /* level 10/14 (tick) interrupt code */ 368 int stickintr(void *); /* system tick interrupt code */ 369 int stick2eintr(void *); /* system tick interrupt code */ 370 int clockintr(void *); /* level 10 (clock) interrupt code */ 371 int statintr(void *); /* level 14 (statclock) interrupt code */ 372 int schedintr(void *); /* level 10 (schedclock) interrupt code */ 373 void tickintr_establish(int, int (*)(void *)); 374 void stickintr_establish(int, int (*)(void *)); 375 void stick2eintr_establish(int, int (*)(void *)); 376 377 /* locore.s */ 378 struct fpstate64; 379 void savefpstate(struct fpstate64 *); 380 void loadfpstate(struct fpstate64 *); 381 void clearfpstate(void); 382 uint64_t probeget(paddr_t, int, int); 383 int probeset(paddr_t, int, int, uint64_t); 384 void setcputyp(int); 385 386 #define write_all_windows() __asm volatile("flushw" : : ) 387 #define write_user_windows() __asm volatile("flushw" : : ) 388 389 struct pcb; 390 void snapshot(struct pcb *); 391 struct frame *getfp(void); 392 void switchtoctx_us(int); 393 void switchtoctx_usiii(int); 394 void next_tick(long); 395 void next_stick(long); 396 /* trap.c */ 397 void cpu_vmspace_exec(struct lwp *, vaddr_t, vaddr_t); 398 int rwindow_save(struct lwp *); 399 /* cons.c */ 400 int cnrom(void); 401 /* zs.c */ 402 void zsconsole(struct tty *, int, int, void (**)(struct tty *, int)); 403 /* fb.c */ 404 void fb_unblank(void); 405 /* kgdb_stub.c */ 406 #ifdef KGDB 407 void kgdb_attach(int (*)(void *), void (*)(void *, int), void *); 408 void kgdb_connect(int); 409 void kgdb_panic(void); 410 #endif 411 /* emul.c */ 412 int fixalign(struct lwp *, struct trapframe64 *); 413 int emulinstr(vaddr_t, struct trapframe64 *); 414 415 #else /* _KERNEL */ 416 417 /* 418 * XXX: provide some definitions for crash(8), probably can share 419 */ 420 #if defined(_KMEMUSER) 421 #define curcpu() (((struct cpu_info *)CPUINFO_VA)->ci_self) 422 #define curlwp curcpu()->ci_curlwp 423 #endif 424 425 #endif /* _KERNEL */ 426 #endif /* _CPU_H_ */ 427