1 /* $NetBSD: zs.c,v 1.56 2005/12/11 12:19:10 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Gordon W. Ross. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Zilog Z8530 Dual UART driver (machine-dependent part) 41 * 42 * Runs two serial lines per chip using slave drivers. 43 * Plain tty/async lines use the zs_async slave. 44 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves. 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.56 2005/12/11 12:19:10 christos Exp $"); 49 50 #include "opt_ddb.h" 51 #include "opt_kgdb.h" 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/conf.h> 56 #include <sys/device.h> 57 #include <sys/file.h> 58 #include <sys/ioctl.h> 59 #include <sys/kernel.h> 60 #include <sys/proc.h> 61 #include <sys/tty.h> 62 #include <sys/time.h> 63 #include <sys/syslog.h> 64 65 #include <machine/autoconf.h> 66 #include <machine/openfirm.h> 67 #include <machine/cpu.h> 68 #include <machine/eeprom.h> 69 #include <machine/psl.h> 70 #include <machine/z8530var.h> 71 72 #include <dev/cons.h> 73 #include <dev/ic/z8530reg.h> 74 #include <dev/sun/kbd_ms_ttyvar.h> 75 #include <ddb/db_output.h> 76 77 #include <sparc64/dev/cons.h> 78 79 #include "kbd.h" /* NKBD */ 80 #include "ms.h" /* NMS */ 81 #include "zs.h" /* NZS */ 82 83 /* Make life easier for the initialized arrays here. */ 84 #if NZS < 3 85 #undef NZS 86 #define NZS 3 87 #endif 88 89 /* 90 * Some warts needed by z8530tty.c - 91 * The default parity REALLY needs to be the same as the PROM uses, 92 * or you can not see messages done with printf during boot-up... 93 */ 94 int zs_def_cflag = (CREAD | CS8 | HUPCL); 95 96 /* 97 * The Sun provides a 4.9152 MHz clock to the ZS chips. 98 */ 99 #define PCLK (9600 * 512) /* PCLK pin input clock rate */ 100 101 #define ZS_DELAY() 102 103 /* The layout of this is hardware-dependent (padding, order). */ 104 struct zschan { 105 volatile u_char zc_csr; /* ctrl,status, and indirect access */ 106 u_char zc_xxx0; 107 volatile u_char zc_data; /* data */ 108 u_char zc_xxx1; 109 }; 110 struct zsdevice { 111 /* Yes, they are backwards. */ 112 struct zschan zs_chan_b; 113 struct zschan zs_chan_a; 114 }; 115 116 /* ZS channel used as the console device (if any) */ 117 void *zs_conschan_get, *zs_conschan_put; 118 119 /* Saved PROM mappings */ 120 static struct zsdevice *zsaddr[NZS]; 121 122 static u_char zs_init_reg[16] = { 123 0, /* 0: CMD (reset, etc.) */ 124 0, /* 1: No interrupts yet. */ 125 0, /* 2: IVECT */ 126 ZSWR3_RX_8 | ZSWR3_RX_ENABLE, 127 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP, 128 ZSWR5_TX_8 | ZSWR5_TX_ENABLE, 129 0, /* 6: TXSYNC/SYNCLO */ 130 0, /* 7: RXSYNC/SYNCHI */ 131 0, /* 8: alias for data port */ 132 ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR, 133 0, /*10: Misc. TX/RX control bits */ 134 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 135 ((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */ 136 0, /*13: BAUDHI (default=9600) */ 137 ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK, 138 ZSWR15_BREAK_IE, 139 }; 140 141 /* Console ops */ 142 static int zscngetc __P((dev_t)); 143 static void zscnputc __P((dev_t, int)); 144 static void zscnpollc __P((dev_t, int)); 145 146 struct consdev zs_consdev = { 147 NULL, 148 NULL, 149 zscngetc, 150 zscnputc, 151 zscnpollc, 152 NULL, 153 }; 154 155 156 /**************************************************************** 157 * Autoconfig 158 ****************************************************************/ 159 160 /* Definition of the driver for autoconfig. */ 161 static int zs_match_sbus __P((struct device *, struct cfdata *, void *)); 162 static void zs_attach_sbus __P((struct device *, struct device *, void *)); 163 164 static void zs_attach __P((struct zsc_softc *, struct zsdevice *, int)); 165 static int zs_print __P((void *, const char *name)); 166 167 CFATTACH_DECL(zs, sizeof(struct zsc_softc), 168 zs_match_sbus, zs_attach_sbus, NULL, NULL); 169 170 extern struct cfdriver zs_cd; 171 172 /* Interrupt handlers. */ 173 int zscheckintr __P((void *)); 174 static int zshard __P((void *)); 175 static void zssoft __P((void *)); 176 177 static int zs_get_speed __P((struct zs_chanstate *)); 178 179 /* Console device support */ 180 static int zs_console_flags __P((int, int, int)); 181 182 /* Power management hooks */ 183 int zs_enable __P((struct zs_chanstate *)); 184 void zs_disable __P((struct zs_chanstate *)); 185 186 /* from dev/ic/z8530tty.c */ 187 struct tty *zstty_get_tty_from_dev(struct device *); 188 189 /* 190 * Is the zs chip present? 191 */ 192 static int 193 zs_match_sbus(parent, cf, aux) 194 struct device *parent; 195 struct cfdata *cf; 196 void *aux; 197 { 198 struct sbus_attach_args *sa = aux; 199 200 if (strcmp(cf->cf_name, sa->sa_name) != 0) 201 return (0); 202 203 return (1); 204 } 205 206 static void 207 zs_attach_sbus(parent, self, aux) 208 struct device *parent; 209 struct device *self; 210 void *aux; 211 { 212 struct zsc_softc *zsc = (void *) self; 213 struct sbus_attach_args *sa = aux; 214 bus_space_handle_t bh; 215 int zs_unit = zsc->zsc_dev.dv_unit; 216 217 if (sa->sa_nintr == 0) { 218 printf(" no interrupt lines\n"); 219 return; 220 } 221 222 /* Use the mapping setup by the Sun PROM if possible. */ 223 if (zsaddr[zs_unit] == NULL) { 224 /* Only map registers once. */ 225 if (sa->sa_npromvaddrs) { 226 /* 227 * We're converting from a 32-bit pointer to a 64-bit 228 * pointer. Since the 32-bit entity is negative, but 229 * the kernel is still mapped into the lower 4GB 230 * range, this needs to be zero-extended. 231 * 232 * XXXXX If we map the kernel and devices into the 233 * high 4GB range, this needs to be changed to 234 * sign-extend the address. 235 */ 236 sparc_promaddr_to_handle(sa->sa_bustag, 237 sa->sa_promvaddrs[0], &bh); 238 239 } else { 240 241 if (sbus_bus_map(sa->sa_bustag, sa->sa_slot, 242 sa->sa_offset, 243 sa->sa_size, 244 BUS_SPACE_MAP_LINEAR, 245 &bh) != 0) { 246 printf("%s @ sbus: cannot map registers\n", 247 self->dv_xname); 248 return; 249 } 250 } 251 zsaddr[zs_unit] = (struct zsdevice *) 252 bus_space_vaddr(sa->sa_bustag, bh); 253 } 254 zsc->zsc_bustag = sa->sa_bustag; 255 zsc->zsc_dmatag = sa->sa_dmatag; 256 zsc->zsc_promunit = prom_getpropint(sa->sa_node, "slave", -2); 257 zsc->zsc_node = sa->sa_node; 258 zs_attach(zsc, zsaddr[zs_unit], sa->sa_pri); 259 } 260 261 /* 262 * Attach a found zs. 263 * 264 * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR 265 * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE? 266 */ 267 static void 268 zs_attach(zsc, zsd, pri) 269 struct zsc_softc *zsc; 270 struct zsdevice *zsd; 271 int pri; 272 { 273 struct zsc_attach_args zsc_args; 274 struct zs_chanstate *cs; 275 int s, channel, softpri = PIL_TTY; 276 277 if (zsd == NULL) { 278 printf("configuration incomplete\n"); 279 return; 280 } 281 282 printf(" softpri %d\n", softpri); 283 284 /* 285 * Initialize software state for each channel. 286 */ 287 for (channel = 0; channel < 2; channel++) { 288 struct zschan *zc; 289 struct device *child; 290 291 zsc_args.channel = channel; 292 cs = &zsc->zsc_cs_store[channel]; 293 zsc->zsc_cs[channel] = cs; 294 295 simple_lock_init(&cs->cs_lock); 296 cs->cs_channel = channel; 297 cs->cs_private = NULL; 298 cs->cs_ops = &zsops_null; 299 cs->cs_brg_clk = PCLK / 16; 300 301 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b; 302 303 zsc_args.consdev = NULL; 304 zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit, 305 zsc->zsc_node, 306 channel); 307 308 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) { 309 zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV; 310 zsc_args.consdev = &zs_consdev; 311 } 312 313 if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) { 314 zs_conschan_get = zc; 315 } 316 if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) { 317 zs_conschan_put = zc; 318 } 319 320 /* Children need to set cn_dev, etc */ 321 cs->cs_reg_csr = &zc->zc_csr; 322 cs->cs_reg_data = &zc->zc_data; 323 324 memcpy(cs->cs_creg, zs_init_reg, 16); 325 memcpy(cs->cs_preg, zs_init_reg, 16); 326 327 /* XXX: Consult PROM properties for this?! */ 328 cs->cs_defspeed = zs_get_speed(cs); 329 cs->cs_defcflag = zs_def_cflag; 330 331 /* Make these correspond to cs_defcflag (-crtscts) */ 332 cs->cs_rr0_dcd = ZSRR0_DCD; 333 cs->cs_rr0_cts = 0; 334 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 335 cs->cs_wr5_rts = 0; 336 337 /* 338 * Clear the master interrupt enable. 339 * The INTENA is common to both channels, 340 * so just do it on the A channel. 341 */ 342 if (channel == 0) { 343 zs_write_reg(cs, 9, 0); 344 } 345 346 /* 347 * Look for a child driver for this channel. 348 * The child attach will setup the hardware. 349 */ 350 child = config_found(&zsc->zsc_dev, (void *)&zsc_args, 351 zs_print); 352 if (child == NULL) { 353 /* No sub-driver. Just reset it. */ 354 u_char reset = (channel == 0) ? 355 ZSWR9_A_RESET : ZSWR9_B_RESET; 356 s = splzs(); 357 zs_write_reg(cs, 9, reset); 358 splx(s); 359 } 360 #if (NKBD > 0) || (NMS > 0) 361 /* 362 * If this was a zstty it has a keyboard 363 * property on it we need to attach the 364 * sunkbd and sunms line disciplines. 365 */ 366 if (child 367 && (!strcmp(child->dv_cfdata->cf_name, "zstty")) 368 && (prom_getproplen(zsc->zsc_node, "keyboard") == 0)) { 369 struct kbd_ms_tty_attach_args kma; 370 struct tty *tp; 371 372 kma.kmta_tp = tp = zstty_get_tty_from_dev(child); 373 kma.kmta_dev = tp->t_dev; 374 kma.kmta_consdev = zsc_args.consdev; 375 376 /* Attach 'em if we got 'em. */ 377 #if (NKBD > 0) 378 if (channel == 0) { 379 kma.kmta_name = "keyboard"; 380 config_found(child, (void *)&kma, NULL); 381 } 382 #endif 383 #if (NMS > 0) 384 if (channel == 1) { 385 kma.kmta_name = "mouse"; 386 config_found(child, (void *)&kma, NULL); 387 } 388 #endif 389 } 390 #endif 391 } 392 393 /* 394 * Now safe to install interrupt handlers. Note the arguments 395 * to the interrupt handlers aren't used. Note, we only do this 396 * once since both SCCs interrupt at the same level and vector. 397 */ 398 bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, zshard, zsc); 399 if (!(zsc->zsc_softintr = softintr_establish(softpri, zssoft, zsc))) 400 panic("zsattach: could not establish soft interrupt"); 401 402 evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL, 403 zsc->zsc_dev.dv_xname, "intr"); 404 405 406 /* 407 * Set the master interrupt enable and interrupt vector. 408 * (common to both channels, do it on A) 409 */ 410 cs = zsc->zsc_cs[0]; 411 s = splhigh(); 412 /* interrupt vector */ 413 zs_write_reg(cs, 2, zs_init_reg[2]); 414 /* master interrupt control (enable) */ 415 zs_write_reg(cs, 9, zs_init_reg[9]); 416 splx(s); 417 418 } 419 420 static int 421 zs_print(aux, name) 422 void *aux; 423 const char *name; 424 { 425 struct zsc_attach_args *args = aux; 426 427 if (name != NULL) 428 aprint_normal("%s: ", name); 429 430 if (args->channel != -1) 431 aprint_normal(" channel %d", args->channel); 432 433 return (UNCONF); 434 } 435 436 /* Deprecate this? */ 437 static volatile int zssoftpending; 438 439 static int 440 zshard(arg) 441 void *arg; 442 { 443 struct zsc_softc *zsc = (struct zsc_softc *)arg; 444 int rr3, rval; 445 446 rval = 0; 447 while ((rr3 = zsc_intr_hard(zsc))) { 448 /* Count up the interrupts. */ 449 rval |= rr3; 450 zsc->zsc_intrcnt.ev_count++; 451 } 452 if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) || 453 (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) && 454 zsc->zsc_softintr) { 455 zssoftpending = PIL_TTY; 456 softintr_schedule(zsc->zsc_softintr); 457 } 458 return (rval); 459 } 460 461 int 462 zscheckintr(arg) 463 void *arg; 464 { 465 struct zsc_softc *zsc; 466 int unit, rval; 467 468 rval = 0; 469 for (unit = 0; unit < zs_cd.cd_ndevs; unit++) { 470 471 zsc = zs_cd.cd_devs[unit]; 472 if (zsc == NULL) 473 continue; 474 rval = (zshard((void *)zsc) || rval); 475 } 476 return (rval); 477 } 478 479 480 /* 481 * We need this only for TTY_DEBUG purposes. 482 */ 483 static void 484 zssoft(arg) 485 void *arg; 486 { 487 struct zsc_softc *zsc = (struct zsc_softc *)arg; 488 int s; 489 490 /* Make sure we call the tty layer at spltty. */ 491 s = spltty(); 492 zssoftpending = 0; 493 (void)zsc_intr_soft(zsc); 494 #ifdef TTY_DEBUG 495 { 496 struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private; 497 struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private; 498 if (zst0->zst_overflows || zst1->zst_overflows ) { 499 struct trapframe *frame = (struct trapframe *)arg; 500 501 printf("zs silo overflow from %p\n", 502 (long)frame->tf_pc); 503 } 504 } 505 #endif 506 splx(s); 507 } 508 509 510 /* 511 * Compute the current baud rate given a ZS channel. 512 */ 513 static int 514 zs_get_speed(cs) 515 struct zs_chanstate *cs; 516 { 517 int tconst; 518 519 tconst = zs_read_reg(cs, 12); 520 tconst |= zs_read_reg(cs, 13) << 8; 521 return (TCONST_TO_BPS(cs->cs_brg_clk, tconst)); 522 } 523 524 /* 525 * MD functions for setting the baud rate and control modes. 526 */ 527 int 528 zs_set_speed(cs, bps) 529 struct zs_chanstate *cs; 530 int bps; /* bits per second */ 531 { 532 int tconst, real_bps; 533 534 if (bps == 0) 535 return (0); 536 537 #ifdef DIAGNOSTIC 538 if (cs->cs_brg_clk == 0) 539 panic("zs_set_speed"); 540 #endif 541 542 tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps); 543 if (tconst < 0) 544 return (EINVAL); 545 546 /* Convert back to make sure we can do it. */ 547 real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst); 548 549 /* XXX - Allow some tolerance here? */ 550 if (real_bps != bps) 551 return (EINVAL); 552 553 cs->cs_preg[12] = tconst; 554 cs->cs_preg[13] = tconst >> 8; 555 556 /* Caller will stuff the pending registers. */ 557 return (0); 558 } 559 560 int 561 zs_set_modes(cs, cflag) 562 struct zs_chanstate *cs; 563 int cflag; /* bits per second */ 564 { 565 int s; 566 567 /* 568 * Output hardware flow control on the chip is horrendous: 569 * if carrier detect drops, the receiver is disabled, and if 570 * CTS drops, the transmitter is stoped IN MID CHARACTER! 571 * Therefore, NEVER set the HFC bit, and instead use the 572 * status interrupt to detect CTS changes. 573 */ 574 s = splzs(); 575 cs->cs_rr0_pps = 0; 576 if ((cflag & (CLOCAL | MDMBUF)) != 0) { 577 cs->cs_rr0_dcd = 0; 578 if ((cflag & MDMBUF) == 0) 579 cs->cs_rr0_pps = ZSRR0_DCD; 580 } else 581 cs->cs_rr0_dcd = ZSRR0_DCD; 582 if ((cflag & CRTSCTS) != 0) { 583 cs->cs_wr5_dtr = ZSWR5_DTR; 584 cs->cs_wr5_rts = ZSWR5_RTS; 585 cs->cs_rr0_cts = ZSRR0_CTS; 586 } else if ((cflag & CDTRCTS) != 0) { 587 cs->cs_wr5_dtr = 0; 588 cs->cs_wr5_rts = ZSWR5_DTR; 589 cs->cs_rr0_cts = ZSRR0_CTS; 590 } else if ((cflag & MDMBUF) != 0) { 591 cs->cs_wr5_dtr = 0; 592 cs->cs_wr5_rts = ZSWR5_DTR; 593 cs->cs_rr0_cts = ZSRR0_DCD; 594 } else { 595 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS; 596 cs->cs_wr5_rts = 0; 597 cs->cs_rr0_cts = 0; 598 } 599 splx(s); 600 601 /* Caller will stuff the pending registers. */ 602 return (0); 603 } 604 605 606 /* 607 * Read or write the chip with suitable delays. 608 */ 609 610 u_char 611 zs_read_reg(cs, reg) 612 struct zs_chanstate *cs; 613 u_char reg; 614 { 615 u_char val; 616 617 *cs->cs_reg_csr = reg; 618 ZS_DELAY(); 619 val = *cs->cs_reg_csr; 620 ZS_DELAY(); 621 return (val); 622 } 623 624 void 625 zs_write_reg(cs, reg, val) 626 struct zs_chanstate *cs; 627 u_char reg, val; 628 { 629 *cs->cs_reg_csr = reg; 630 ZS_DELAY(); 631 *cs->cs_reg_csr = val; 632 ZS_DELAY(); 633 } 634 635 u_char 636 zs_read_csr(cs) 637 struct zs_chanstate *cs; 638 { 639 u_char val; 640 641 val = *cs->cs_reg_csr; 642 ZS_DELAY(); 643 return (val); 644 } 645 646 void zs_write_csr(cs, val) 647 struct zs_chanstate *cs; 648 u_char val; 649 { 650 *cs->cs_reg_csr = val; 651 ZS_DELAY(); 652 } 653 654 u_char zs_read_data(cs) 655 struct zs_chanstate *cs; 656 { 657 u_char val; 658 659 val = *cs->cs_reg_data; 660 ZS_DELAY(); 661 return (val); 662 } 663 664 void zs_write_data(cs, val) 665 struct zs_chanstate *cs; 666 u_char val; 667 { 668 *cs->cs_reg_data = val; 669 ZS_DELAY(); 670 } 671 672 /**************************************************************** 673 * Console support functions (Sun specific!) 674 * Note: this code is allowed to know about the layout of 675 * the chip registers, and uses that to keep things simple. 676 * XXX - I think I like the mvme167 code better. -gwr 677 ****************************************************************/ 678 679 extern void Debugger __P((void)); 680 681 /* 682 * Handle user request to enter kernel debugger. 683 */ 684 void 685 zs_abort(cs) 686 struct zs_chanstate *cs; 687 { 688 volatile struct zschan *zc = zs_conschan_get; 689 int rr0; 690 691 /* Wait for end of break to avoid PROM abort. */ 692 /* XXX - Limit the wait? */ 693 do { 694 rr0 = zc->zc_csr; 695 ZS_DELAY(); 696 } while (rr0 & ZSRR0_BREAK); 697 698 #if defined(KGDB) 699 zskgdb(cs); 700 #elif defined(DDB) 701 { 702 extern int db_active; 703 704 if (!db_active) 705 Debugger(); 706 else 707 /* Debugger is probably hozed */ 708 callrom(); 709 } 710 #else 711 printf("stopping on keyboard abort\n"); 712 callrom(); 713 #endif 714 } 715 716 717 /* 718 * Polled input char. 719 */ 720 int 721 zs_getc(arg) 722 void *arg; 723 { 724 volatile struct zschan *zc = arg; 725 int s, c, rr0; 726 727 s = splhigh(); 728 /* Wait for a character to arrive. */ 729 do { 730 rr0 = zc->zc_csr; 731 ZS_DELAY(); 732 } while ((rr0 & ZSRR0_RX_READY) == 0); 733 734 c = zc->zc_data; 735 ZS_DELAY(); 736 splx(s); 737 738 /* 739 * This is used by the kd driver to read scan codes, 740 * so don't translate '\r' ==> '\n' here... 741 */ 742 return (c); 743 } 744 745 /* 746 * Polled output char. 747 */ 748 void 749 zs_putc(arg, c) 750 void *arg; 751 int c; 752 { 753 volatile struct zschan *zc = arg; 754 int s, rr0; 755 756 s = splhigh(); 757 758 /* Wait for transmitter to become ready. */ 759 do { 760 rr0 = zc->zc_csr; 761 ZS_DELAY(); 762 } while ((rr0 & ZSRR0_TX_READY) == 0); 763 764 /* 765 * Send the next character. 766 * Now you'd think that this could be followed by a ZS_DELAY() 767 * just like all the other chip accesses, but it turns out that 768 * the `transmit-ready' interrupt isn't de-asserted until 769 * some period of time after the register write completes 770 * (more than a couple instructions). So to avoid stray 771 * interrupts we put in the 2us delay regardless of CPU model. 772 */ 773 zc->zc_data = c; 774 delay(2); 775 776 splx(s); 777 } 778 779 /*****************************************************************/ 780 781 782 783 784 /* 785 * Polled console input putchar. 786 */ 787 static int 788 zscngetc(dev) 789 dev_t dev; 790 { 791 return (zs_getc(zs_conschan_get)); 792 } 793 794 /* 795 * Polled console output putchar. 796 */ 797 static void 798 zscnputc(dev, c) 799 dev_t dev; 800 int c; 801 { 802 zs_putc(zs_conschan_put, c); 803 } 804 805 int swallow_zsintrs; 806 807 static void 808 zscnpollc(dev, on) 809 dev_t dev; 810 int on; 811 { 812 /* 813 * Need to tell zs driver to acknowledge all interrupts or we get 814 * annoying spurious interrupt messages. This is because mucking 815 * with spl() levels during polling does not prevent interrupts from 816 * being generated. 817 */ 818 819 if (on) swallow_zsintrs++; 820 else swallow_zsintrs--; 821 } 822 823 int 824 zs_console_flags(promunit, node, channel) 825 int promunit; 826 int node; 827 int channel; 828 { 829 int cookie, flags = 0; 830 char buf[255]; 831 832 /* 833 * We'll just do the OBP grovelling down here since that's 834 * the only type of firmware we support. 835 */ 836 837 /* Default to channel 0 if there are no explicit prom args */ 838 cookie = 0; 839 if (node == prom_instance_to_package(prom_stdin())) { 840 if (prom_getoption("input-device", buf, sizeof buf) != 0 && 841 strcmp("ttyb", buf) == 0) 842 cookie = 1; 843 844 if (channel == cookie) 845 flags |= ZS_HWFLAG_CONSOLE_INPUT; 846 } 847 848 if (node == prom_instance_to_package(prom_stdout())) { 849 if (prom_getoption("output-device", buf, sizeof buf) != 0 && 850 strcmp("ttyb", buf) == 0) 851 cookie = 1; 852 853 if (channel == cookie) 854 flags |= ZS_HWFLAG_CONSOLE_OUTPUT; 855 } 856 857 return (flags); 858 } 859 860