xref: /netbsd-src/sys/arch/sparc64/dev/zs.c (revision 7fa608457b817eca6e0977b37f758ae064f3c99c)
1 /*	$NetBSD: zs.c,v 1.63 2007/11/09 00:05:06 ad Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Zilog Z8530 Dual UART driver (machine-dependent part)
41  *
42  * Runs two serial lines per chip using slave drivers.
43  * Plain tty/async lines use the zs_async slave.
44  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
45  */
46 
47 #include <sys/cdefs.h>
48 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.63 2007/11/09 00:05:06 ad Exp $");
49 
50 #include "opt_ddb.h"
51 #include "opt_kgdb.h"
52 
53 #include <sys/param.h>
54 #include <sys/systm.h>
55 #include <sys/conf.h>
56 #include <sys/device.h>
57 #include <sys/file.h>
58 #include <sys/ioctl.h>
59 #include <sys/kernel.h>
60 #include <sys/proc.h>
61 #include <sys/tty.h>
62 #include <sys/time.h>
63 #include <sys/syslog.h>
64 
65 #include <machine/autoconf.h>
66 #include <machine/openfirm.h>
67 #include <machine/cpu.h>
68 #include <machine/eeprom.h>
69 #include <machine/psl.h>
70 #include <machine/z8530var.h>
71 
72 #include <dev/cons.h>
73 #include <dev/ic/z8530reg.h>
74 #include <dev/sun/kbd_ms_ttyvar.h>
75 #include <ddb/db_output.h>
76 
77 #include <sparc64/dev/cons.h>
78 
79 #include "kbd.h"	/* NKBD */
80 #include "ms.h"		/* NMS */
81 #include "zs.h" 	/* NZS */
82 
83 /* Make life easier for the initialized arrays here. */
84 #if NZS < 3
85 #undef  NZS
86 #define NZS 3
87 #endif
88 
89 /*
90  * Some warts needed by z8530tty.c -
91  * The default parity REALLY needs to be the same as the PROM uses,
92  * or you can not see messages done with printf during boot-up...
93  */
94 int zs_def_cflag = (CREAD | CS8 | HUPCL);
95 
96 /*
97  * The Sun provides a 4.9152 MHz clock to the ZS chips.
98  */
99 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
100 
101 #define	ZS_DELAY()
102 
103 /* The layout of this is hardware-dependent (padding, order). */
104 struct zschan {
105 	volatile u_char	zc_csr;		/* ctrl,status, and indirect access */
106 	u_char		zc_xxx0;
107 	volatile u_char	zc_data;	/* data */
108 	u_char		zc_xxx1;
109 };
110 struct zsdevice {
111 	/* Yes, they are backwards. */
112 	struct	zschan zs_chan_b;
113 	struct	zschan zs_chan_a;
114 };
115 
116 /* ZS channel used as the console device (if any) */
117 void *zs_conschan_get, *zs_conschan_put;
118 
119 /* Saved PROM mappings */
120 static struct zsdevice *zsaddr[NZS];
121 
122 static u_char zs_init_reg[16] = {
123 	0,	/* 0: CMD (reset, etc.) */
124 	0,	/* 1: No interrupts yet. */
125 	0,	/* 2: IVECT */
126 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
127 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
128 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
129 	0,	/* 6: TXSYNC/SYNCLO */
130 	0,	/* 7: RXSYNC/SYNCHI */
131 	0,	/* 8: alias for data port */
132 	ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
133 	0,	/*10: Misc. TX/RX control bits */
134 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
135 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
136 	0,			/*13: BAUDHI (default=9600) */
137 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
138 	ZSWR15_BREAK_IE,
139 };
140 
141 /* Console ops */
142 static int  zscngetc(dev_t);
143 static void zscnputc(dev_t, int);
144 static void zscnpollc(dev_t, int);
145 
146 struct consdev zs_consdev = {
147 	.cn_getc = zscngetc,
148 	.cn_putc = zscnputc,
149 	.cn_pollc = zscnpollc,
150 };
151 
152 
153 /****************************************************************
154  * Autoconfig
155  ****************************************************************/
156 
157 /* Definition of the driver for autoconfig. */
158 static int  zs_match_sbus(struct device *, struct cfdata *, void *);
159 static void zs_attach_sbus(struct device *, struct device *, void *);
160 
161 static void zs_attach(struct zsc_softc *, struct zsdevice *, int);
162 static int  zs_print(void *, const char *);
163 
164 CFATTACH_DECL(zs, sizeof(struct zsc_softc),
165     zs_match_sbus, zs_attach_sbus, NULL, NULL);
166 
167 extern struct cfdriver zs_cd;
168 
169 /* Interrupt handlers. */
170 int zscheckintr(void *);
171 static int zshard(void *);
172 static void zssoft(void *);
173 
174 static int zs_get_speed(struct zs_chanstate *);
175 
176 /* Console device support */
177 static int zs_console_flags(int, int, int);
178 
179 /* Power management hooks */
180 int  zs_enable(struct zs_chanstate *);
181 void zs_disable(struct zs_chanstate *);
182 
183 /* from dev/ic/z8530tty.c */
184 struct tty *zstty_get_tty_from_dev(struct device *);
185 
186 /*
187  * Is the zs chip present?
188  */
189 static int
190 zs_match_sbus(struct device *parent, struct cfdata *cf, void *aux)
191 {
192 	struct sbus_attach_args *sa = aux;
193 
194 	if (strcmp(cf->cf_name, sa->sa_name) != 0)
195 		return (0);
196 
197 	return (1);
198 }
199 
200 static void
201 zs_attach_sbus(struct device *parent, struct device *self, void *aux)
202 {
203 	struct zsc_softc *zsc = (void *) self;
204 	struct sbus_attach_args *sa = aux;
205 	bus_space_handle_t bh;
206 	int zs_unit = device_unit(&zsc->zsc_dev);
207 
208 	if (sa->sa_nintr == 0) {
209 		printf(" no interrupt lines\n");
210 		return;
211 	}
212 
213 	/* Use the mapping setup by the Sun PROM if possible. */
214 	if (zsaddr[zs_unit] == NULL) {
215 		/* Only map registers once. */
216 		if (sa->sa_npromvaddrs) {
217 			/*
218 			 * We're converting from a 32-bit pointer to a 64-bit
219 			 * pointer.  Since the 32-bit entity is negative, but
220 			 * the kernel is still mapped into the lower 4GB
221 			 * range, this needs to be zero-extended.
222 			 *
223 			 * XXXXX If we map the kernel and devices into the
224 			 * high 4GB range, this needs to be changed to
225 			 * sign-extend the address.
226 			 */
227 			sparc_promaddr_to_handle(sa->sa_bustag,
228 				sa->sa_promvaddrs[0], &bh);
229 
230 		} else {
231 
232 			if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
233 					 sa->sa_offset,
234 					 sa->sa_size,
235 					 BUS_SPACE_MAP_LINEAR,
236 					 &bh) != 0) {
237 				printf("%s @ sbus: cannot map registers\n",
238 				       self->dv_xname);
239 				return;
240 			}
241 		}
242 		zsaddr[zs_unit] = (struct zsdevice *)
243 			bus_space_vaddr(sa->sa_bustag, bh);
244 	}
245 	zsc->zsc_bustag = sa->sa_bustag;
246 	zsc->zsc_dmatag = sa->sa_dmatag;
247 	zsc->zsc_promunit = prom_getpropint(sa->sa_node, "slave", -2);
248 	zsc->zsc_node = sa->sa_node;
249 	zs_attach(zsc, zsaddr[zs_unit], sa->sa_pri);
250 }
251 
252 /*
253  * Attach a found zs.
254  *
255  * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
256  * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
257  */
258 static void
259 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
260 {
261 	struct zsc_attach_args zsc_args;
262 	struct zs_chanstate *cs;
263 	int s, channel, softpri = PIL_TTY;
264 
265 	if (zsd == NULL) {
266 		printf("configuration incomplete\n");
267 		return;
268 	}
269 
270 	printf(" softpri %d\n", softpri);
271 
272 	/*
273 	 * Initialize software state for each channel.
274 	 */
275 	for (channel = 0; channel < 2; channel++) {
276 		struct zschan *zc;
277 		struct device *child;
278 
279 		zsc_args.channel = channel;
280 		cs = &zsc->zsc_cs_store[channel];
281 		zsc->zsc_cs[channel] = cs;
282 
283 		zs_lock_init(cs);
284 		cs->cs_channel = channel;
285 		cs->cs_private = NULL;
286 		cs->cs_ops = &zsops_null;
287 		cs->cs_brg_clk = PCLK / 16;
288 
289 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
290 
291 		zsc_args.consdev = NULL;
292 		zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
293 						    zsc->zsc_node,
294 						    channel);
295 
296 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
297 			zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
298 			zsc_args.consdev = &zs_consdev;
299 		}
300 
301 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
302 			zs_conschan_get = zc;
303 		}
304 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
305 			zs_conschan_put = zc;
306 		}
307 
308 		/* Children need to set cn_dev, etc */
309 		cs->cs_reg_csr  = &zc->zc_csr;
310 		cs->cs_reg_data = &zc->zc_data;
311 
312 		memcpy(cs->cs_creg, zs_init_reg, 16);
313 		memcpy(cs->cs_preg, zs_init_reg, 16);
314 
315 		/* XXX: Consult PROM properties for this?! */
316 		cs->cs_defspeed = zs_get_speed(cs);
317 		cs->cs_defcflag = zs_def_cflag;
318 
319 		/* Make these correspond to cs_defcflag (-crtscts) */
320 		cs->cs_rr0_dcd = ZSRR0_DCD;
321 		cs->cs_rr0_cts = 0;
322 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
323 		cs->cs_wr5_rts = 0;
324 
325 		/*
326 		 * Clear the master interrupt enable.
327 		 * The INTENA is common to both channels,
328 		 * so just do it on the A channel.
329 		 */
330 		if (channel == 0) {
331 			zs_write_reg(cs, 9, 0);
332 		}
333 
334 		/*
335 		 * Look for a child driver for this channel.
336 		 * The child attach will setup the hardware.
337 		 */
338 		child = config_found(&zsc->zsc_dev, (void *)&zsc_args,
339 		    zs_print);
340 		if (child == NULL) {
341 			/* No sub-driver.  Just reset it. */
342 			u_char reset = (channel == 0) ?
343 				ZSWR9_A_RESET : ZSWR9_B_RESET;
344 			s = splzs();
345 			zs_write_reg(cs,  9, reset);
346 			splx(s);
347 		}
348 #if (NKBD > 0) || (NMS > 0)
349 		/*
350 		 * If this was a zstty it has a keyboard
351 		 * property on it we need to attach the
352 		 * sunkbd and sunms line disciplines.
353 		 */
354 		if (child
355 		    && (device_is_a(child, "zstty"))
356 		    && (prom_getproplen(zsc->zsc_node, "keyboard") == 0)) {
357 			struct kbd_ms_tty_attach_args kma;
358 			struct tty *tp;
359 
360 			kma.kmta_tp = tp = zstty_get_tty_from_dev(child);
361 			kma.kmta_dev = tp->t_dev;
362 			kma.kmta_consdev = zsc_args.consdev;
363 
364 			/* Attach 'em if we got 'em. */
365 #if (NKBD > 0)
366 			if (channel == 0) {
367 				kma.kmta_name = "keyboard";
368 				config_found(child, (void *)&kma, NULL);
369 			}
370 #endif
371 #if (NMS > 0)
372 			if (channel == 1) {
373 				kma.kmta_name = "mouse";
374 				config_found(child, (void *)&kma, NULL);
375 			}
376 #endif
377 		}
378 #endif
379 	}
380 
381 	/*
382 	 * Now safe to install interrupt handlers.  Note the arguments
383 	 * to the interrupt handlers aren't used.  Note, we only do this
384 	 * once since both SCCs interrupt at the same level and vector.
385 	 */
386 	bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, zshard, zsc);
387 	if (!(zsc->zsc_softintr = softintr_establish(softpri, zssoft, zsc)))
388 		panic("zsattach: could not establish soft interrupt");
389 
390 	evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
391 	    zsc->zsc_dev.dv_xname, "intr");
392 
393 
394 	/*
395 	 * Set the master interrupt enable and interrupt vector.
396 	 * (common to both channels, do it on A)
397 	 */
398 	cs = zsc->zsc_cs[0];
399 	s = splhigh();
400 	/* interrupt vector */
401 	zs_write_reg(cs, 2, zs_init_reg[2]);
402 	/* master interrupt control (enable) */
403 	zs_write_reg(cs, 9, zs_init_reg[9]);
404 	splx(s);
405 
406 }
407 
408 static int
409 zs_print(void *aux, const char *name)
410 {
411 	struct zsc_attach_args *args = aux;
412 
413 	if (name != NULL)
414 		aprint_normal("%s: ", name);
415 
416 	if (args->channel != -1)
417 		aprint_normal(" channel %d", args->channel);
418 
419 	return (UNCONF);
420 }
421 
422 /* Deprecate this? */
423 static volatile int zssoftpending;
424 
425 static int
426 zshard(void *arg)
427 {
428 	struct zsc_softc *zsc = (struct zsc_softc *)arg;
429 	int rr3, rval;
430 
431 	rval = 0;
432 	while ((rr3 = zsc_intr_hard(zsc))) {
433 		/* Count up the interrupts. */
434 		rval |= rr3;
435 		zsc->zsc_intrcnt.ev_count++;
436 	}
437 	if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
438 	     (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
439 	    zsc->zsc_softintr) {
440 		zssoftpending = PIL_TTY;
441 		softintr_schedule(zsc->zsc_softintr);
442 	}
443 	return (rval);
444 }
445 
446 int
447 zscheckintr(void *arg)
448 {
449 	struct zsc_softc *zsc;
450 	int unit, rval;
451 
452 	rval = 0;
453 	for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
454 
455 		zsc = zs_cd.cd_devs[unit];
456 		if (zsc == NULL)
457 			continue;
458 		rval = (zshard((void *)zsc) || rval);
459 	}
460 	return (rval);
461 }
462 
463 
464 /*
465  * We need this only for TTY_DEBUG purposes.
466  */
467 static void
468 zssoft(void *arg)
469 {
470 	struct zsc_softc *zsc = (struct zsc_softc *)arg;
471 	int s;
472 
473 	/* Make sure we call the tty layer at spltty. */
474 	s = spltty();
475 	zssoftpending = 0;
476 	(void)zsc_intr_soft(zsc);
477 #ifdef TTY_DEBUG
478 	{
479 		struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
480 		struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
481 		if (zst0->zst_overflows || zst1->zst_overflows ) {
482 			struct trapframe *frame = (struct trapframe *)arg;
483 
484 			printf("zs silo overflow from %p\n",
485 			       (long)frame->tf_pc);
486 		}
487 	}
488 #endif
489 	splx(s);
490 }
491 
492 
493 /*
494  * Compute the current baud rate given a ZS channel.
495  */
496 static int
497 zs_get_speed(struct zs_chanstate *cs)
498 {
499 	int tconst;
500 
501 	tconst = zs_read_reg(cs, 12);
502 	tconst |= zs_read_reg(cs, 13) << 8;
503 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
504 }
505 
506 /*
507  * MD functions for setting the baud rate and control modes.
508  */
509 int
510 zs_set_speed(struct zs_chanstate *cs, int bps /* bits per second */)
511 {
512 	int tconst, real_bps;
513 
514 	if (bps == 0)
515 		return (0);
516 
517 #ifdef	DIAGNOSTIC
518 	if (cs->cs_brg_clk == 0)
519 		panic("zs_set_speed");
520 #endif
521 
522 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
523 	if (tconst < 0)
524 		return (EINVAL);
525 
526 	/* Convert back to make sure we can do it. */
527 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
528 
529 	/* XXX - Allow some tolerance here? */
530 	if (real_bps != bps)
531 		return (EINVAL);
532 
533 	cs->cs_preg[12] = tconst;
534 	cs->cs_preg[13] = tconst >> 8;
535 
536 	/* Caller will stuff the pending registers. */
537 	return (0);
538 }
539 
540 int
541 zs_set_modes(struct zs_chanstate *cs, int cflag)
542 {
543 	int s;
544 
545 	/*
546 	 * Output hardware flow control on the chip is horrendous:
547 	 * if carrier detect drops, the receiver is disabled, and if
548 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
549 	 * Therefore, NEVER set the HFC bit, and instead use the
550 	 * status interrupt to detect CTS changes.
551 	 */
552 	s = splzs();
553 	cs->cs_rr0_pps = 0;
554 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
555 		cs->cs_rr0_dcd = 0;
556 		if ((cflag & MDMBUF) == 0)
557 			cs->cs_rr0_pps = ZSRR0_DCD;
558 	} else
559 		cs->cs_rr0_dcd = ZSRR0_DCD;
560 	if ((cflag & CRTSCTS) != 0) {
561 		cs->cs_wr5_dtr = ZSWR5_DTR;
562 		cs->cs_wr5_rts = ZSWR5_RTS;
563 		cs->cs_rr0_cts = ZSRR0_CTS;
564 	} else if ((cflag & CDTRCTS) != 0) {
565 		cs->cs_wr5_dtr = 0;
566 		cs->cs_wr5_rts = ZSWR5_DTR;
567 		cs->cs_rr0_cts = ZSRR0_CTS;
568 	} else if ((cflag & MDMBUF) != 0) {
569 		cs->cs_wr5_dtr = 0;
570 		cs->cs_wr5_rts = ZSWR5_DTR;
571 		cs->cs_rr0_cts = ZSRR0_DCD;
572 	} else {
573 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
574 		cs->cs_wr5_rts = 0;
575 		cs->cs_rr0_cts = 0;
576 	}
577 	splx(s);
578 
579 	/* Caller will stuff the pending registers. */
580 	return (0);
581 }
582 
583 
584 /*
585  * Read or write the chip with suitable delays.
586  */
587 
588 u_char
589 zs_read_reg(struct zs_chanstate *cs, u_char reg)
590 {
591 	u_char val;
592 
593 	*cs->cs_reg_csr = reg;
594 	ZS_DELAY();
595 	val = *cs->cs_reg_csr;
596 	ZS_DELAY();
597 	return (val);
598 }
599 
600 void
601 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
602 {
603 	*cs->cs_reg_csr = reg;
604 	ZS_DELAY();
605 	*cs->cs_reg_csr = val;
606 	ZS_DELAY();
607 }
608 
609 u_char
610 zs_read_csr(struct zs_chanstate *cs)
611 {
612 	u_char val;
613 
614 	val = *cs->cs_reg_csr;
615 	ZS_DELAY();
616 	return (val);
617 }
618 
619 void
620 zs_write_csr(struct zs_chanstate *cs, u_char val)
621 {
622 	*cs->cs_reg_csr = val;
623 	ZS_DELAY();
624 }
625 
626 u_char
627 zs_read_data(struct zs_chanstate *cs)
628 {
629 	u_char val;
630 
631 	val = *cs->cs_reg_data;
632 	ZS_DELAY();
633 	return (val);
634 }
635 
636 void
637 zs_write_data(struct zs_chanstate *cs, u_char val)
638 {
639 	*cs->cs_reg_data = val;
640 	ZS_DELAY();
641 }
642 
643 /****************************************************************
644  * Console support functions (Sun specific!)
645  * Note: this code is allowed to know about the layout of
646  * the chip registers, and uses that to keep things simple.
647  * XXX - I think I like the mvme167 code better. -gwr
648  ****************************************************************/
649 
650 extern void Debugger(void);
651 
652 /*
653  * Handle user request to enter kernel debugger.
654  */
655 void
656 zs_abort(struct zs_chanstate *cs)
657 {
658 	volatile struct zschan *zc = zs_conschan_get;
659 	int rr0;
660 
661 	/* Wait for end of break to avoid PROM abort. */
662 	/* XXX - Limit the wait? */
663 	do {
664 		rr0 = zc->zc_csr;
665 		ZS_DELAY();
666 	} while (rr0 & ZSRR0_BREAK);
667 
668 #if defined(KGDB)
669 	zskgdb(cs);
670 #elif defined(DDB)
671 	{
672 		extern int db_active;
673 
674 		if (!db_active)
675 			Debugger();
676 		else
677 			/* Debugger is probably hozed */
678 			callrom();
679 	}
680 #else
681 	printf("stopping on keyboard abort\n");
682 	callrom();
683 #endif
684 }
685 
686 
687 /*
688  * Polled input char.
689  */
690 int
691 zs_getc(void *arg)
692 {
693 	volatile struct zschan *zc = arg;
694 	int s, c, rr0;
695 
696 	s = splhigh();
697 	/* Wait for a character to arrive. */
698 	do {
699 		rr0 = zc->zc_csr;
700 		ZS_DELAY();
701 	} while ((rr0 & ZSRR0_RX_READY) == 0);
702 
703 	c = zc->zc_data;
704 	ZS_DELAY();
705 	splx(s);
706 
707 	/*
708 	 * This is used by the kd driver to read scan codes,
709 	 * so don't translate '\r' ==> '\n' here...
710 	 */
711 	return (c);
712 }
713 
714 /*
715  * Polled output char.
716  */
717 void
718 zs_putc(void *arg, int c)
719 {
720 	volatile struct zschan *zc = arg;
721 	int s, rr0;
722 
723 	s = splhigh();
724 
725 	/* Wait for transmitter to become ready. */
726 	do {
727 		rr0 = zc->zc_csr;
728 		ZS_DELAY();
729 	} while ((rr0 & ZSRR0_TX_READY) == 0);
730 
731 	/*
732 	 * Send the next character.
733 	 * Now you'd think that this could be followed by a ZS_DELAY()
734 	 * just like all the other chip accesses, but it turns out that
735 	 * the `transmit-ready' interrupt isn't de-asserted until
736 	 * some period of time after the register write completes
737 	 * (more than a couple instructions).  So to avoid stray
738 	 * interrupts we put in the 2us delay regardless of CPU model.
739 	 */
740 	zc->zc_data = c;
741 	delay(2);
742 
743 	splx(s);
744 }
745 
746 /*****************************************************************/
747 
748 
749 
750 
751 /*
752  * Polled console input putchar.
753  */
754 static int
755 zscngetc(dev_t dev)
756 {
757 	return (zs_getc(zs_conschan_get));
758 }
759 
760 /*
761  * Polled console output putchar.
762  */
763 static void
764 zscnputc(dev_t dev, int c)
765 {
766 	zs_putc(zs_conschan_put, c);
767 }
768 
769 int swallow_zsintrs;
770 
771 static void
772 zscnpollc(dev_t dev, int on)
773 {
774 	/*
775 	 * Need to tell zs driver to acknowledge all interrupts or we get
776 	 * annoying spurious interrupt messages.  This is because mucking
777 	 * with spl() levels during polling does not prevent interrupts from
778 	 * being generated.
779 	 */
780 
781 	if (on) swallow_zsintrs++;
782 	else swallow_zsintrs--;
783 }
784 
785 int
786 zs_console_flags(int promunit, int node, int channel)
787 {
788 	int cookie, flags = 0;
789 	char buf[255];
790 
791 	/*
792 	 * We'll just do the OBP grovelling down here since that's
793 	 * the only type of firmware we support.
794 	 */
795 
796 	/* Default to channel 0 if there are no explicit prom args */
797 	cookie = 0;
798 	if (node == prom_instance_to_package(prom_stdin())) {
799 		if (prom_getoption("input-device", buf, sizeof buf) == 0 &&
800 		    strcmp("ttyb", buf) == 0)
801 			cookie = 1;
802 
803 		if (channel == cookie)
804 			flags |= ZS_HWFLAG_CONSOLE_INPUT;
805 	}
806 
807 	if (node == prom_instance_to_package(prom_stdout())) {
808 		if (prom_getoption("output-device", buf, sizeof buf) == 0 &&
809 		    strcmp("ttyb", buf) == 0)
810 			cookie = 1;
811 
812 		if (channel == cookie)
813 			flags |= ZS_HWFLAG_CONSOLE_OUTPUT;
814 	}
815 
816 	return (flags);
817 }
818 
819