xref: /netbsd-src/sys/arch/sparc64/dev/zs.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: zs.c,v 1.74 2012/10/27 17:18:12 chs Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Zilog Z8530 Dual UART driver (machine-dependent part)
34  *
35  * Runs two serial lines per chip using slave drivers.
36  * Plain tty/async lines use the zs_async slave.
37  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.74 2012/10/27 17:18:12 chs Exp $");
42 
43 #include "opt_ddb.h"
44 #include "opt_kgdb.h"
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/conf.h>
49 #include <sys/device.h>
50 #include <sys/file.h>
51 #include <sys/ioctl.h>
52 #include <sys/kernel.h>
53 #include <sys/proc.h>
54 #include <sys/tty.h>
55 #include <sys/time.h>
56 #include <sys/syslog.h>
57 #include <sys/intr.h>
58 
59 #include <machine/autoconf.h>
60 #include <machine/openfirm.h>
61 #include <machine/cpu.h>
62 #include <machine/eeprom.h>
63 #include <machine/psl.h>
64 #include <machine/z8530var.h>
65 
66 #include <dev/cons.h>
67 #include <dev/ic/z8530reg.h>
68 #include <dev/sun/kbd_ms_ttyvar.h>
69 #include <ddb/db_output.h>
70 
71 #include <dev/sbus/sbusvar.h>
72 #include <sparc64/dev/fhcvar.h>
73 #include <sparc64/dev/cons.h>
74 
75 #include "ioconf.h"
76 #include "kbd.h"	/* NKBD */
77 #include "ms.h"		/* NMS */
78 #include "zs.h" 	/* NZS */
79 
80 /* Make life easier for the initialized arrays here. */
81 #if NZS < 3
82 #undef  NZS
83 #define NZS 3
84 #endif
85 
86 /*
87  * Some warts needed by z8530tty.c -
88  * The default parity REALLY needs to be the same as the PROM uses,
89  * or you can not see messages done with printf during boot-up...
90  */
91 int zs_def_cflag = (CREAD | CS8 | HUPCL);
92 
93 /*
94  * The Sun provides a 4.9152 MHz clock to the ZS chips.
95  */
96 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
97 
98 #define	ZS_DELAY()
99 
100 /* The layout of this is hardware-dependent (padding, order). */
101 struct zschan {
102 	volatile uint8_t zc_csr;	/* ctrl,status, and indirect access */
103 	uint8_t		zc_xxx0;
104 	volatile uint8_t zc_data;	/* data */
105 	uint8_t		zc_xxx1;
106 };
107 struct zsdevice {
108 	/* Yes, they are backwards. */
109 	struct	zschan zs_chan_b;
110 	struct	zschan zs_chan_a;
111 };
112 
113 /* ZS channel used as the console device (if any) */
114 void *zs_conschan_get, *zs_conschan_put;
115 
116 /* Saved PROM mappings */
117 static struct zsdevice *zsaddr[NZS];
118 
119 static uint8_t zs_init_reg[16] = {
120 	0,	/* 0: CMD (reset, etc.) */
121 	0,	/* 1: No interrupts yet. */
122 	0,	/* 2: IVECT */
123 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
124 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
125 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
126 	0,	/* 6: TXSYNC/SYNCLO */
127 	0,	/* 7: RXSYNC/SYNCHI */
128 	0,	/* 8: alias for data port */
129 	ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
130 	0,	/*10: Misc. TX/RX control bits */
131 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
132 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
133 	0,			/*13: BAUDHI (default=9600) */
134 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
135 	ZSWR15_BREAK_IE,
136 };
137 
138 /* Console ops */
139 static int  zscngetc(dev_t);
140 static void zscnputc(dev_t, int);
141 static void zscnpollc(dev_t, int);
142 
143 struct consdev zs_consdev = {
144 	.cn_getc = zscngetc,
145 	.cn_putc = zscnputc,
146 	.cn_pollc = zscnpollc,
147 };
148 
149 
150 /****************************************************************
151  * Autoconfig
152  ****************************************************************/
153 
154 /* Definition of the driver for autoconfig. */
155 static int  zs_match_sbus(device_t, cfdata_t, void *);
156 static void zs_attach_sbus(device_t, device_t, void *);
157 
158 static int  zs_match_fhc(device_t, cfdata_t, void *);
159 static void zs_attach_fhc(device_t, device_t, void *);
160 
161 static void zs_attach(struct zsc_softc *, struct zsdevice *, int);
162 static int  zs_print(void *, const char *);
163 
164 CFATTACH_DECL_NEW(zs, sizeof(struct zsc_softc),
165     zs_match_sbus, zs_attach_sbus, NULL, NULL);
166 
167 CFATTACH_DECL_NEW(zs_fhc, sizeof(struct zsc_softc),
168     zs_match_fhc, zs_attach_fhc, NULL, NULL);
169 
170 /* Interrupt handlers. */
171 int zscheckintr(void *);
172 static int zshard(void *);
173 static void zssoft(void *);
174 
175 static int zs_get_speed(struct zs_chanstate *);
176 
177 /* Console device support */
178 static int zs_console_flags(int, int, int);
179 
180 /* Power management hooks */
181 int  zs_enable(struct zs_chanstate *);
182 void zs_disable(struct zs_chanstate *);
183 
184 /* from dev/ic/z8530tty.c */
185 struct tty *zstty_get_tty_from_dev(device_t);
186 
187 /*
188  * Is the zs chip present?
189  */
190 static int
191 zs_match_sbus(device_t parent, cfdata_t cf, void *aux)
192 {
193 	struct sbus_attach_args *sa = aux;
194 
195 	if (strcmp(cf->cf_name, sa->sa_name) != 0)
196 		return (0);
197 
198 	return (1);
199 }
200 
201 static int
202 zs_match_fhc(device_t parent, cfdata_t cf, void *aux)
203 {
204 	struct fhc_attach_args *fa = aux;
205 
206 	if (strcmp(cf->cf_name, fa->fa_name) != 0)
207 		return (0);
208 
209 	return (1);
210 }
211 
212 static void
213 zs_attach_sbus(device_t parent, device_t self, void *aux)
214 {
215 	struct zsc_softc *zsc = device_private(self);
216 	struct sbus_attach_args *sa = aux;
217 	bus_space_handle_t bh;
218 	int zs_unit;
219 
220 	zsc->zsc_dev = self;
221 	zs_unit = device_unit(self);
222 
223 	if (sa->sa_nintr == 0) {
224 		aprint_error(": no interrupt lines\n");
225 		return;
226 	}
227 
228 	/* Use the mapping setup by the Sun PROM if possible. */
229 	if (zsaddr[zs_unit] == NULL) {
230 		/* Only map registers once. */
231 		if (sa->sa_npromvaddrs) {
232 			/*
233 			 * We're converting from a 32-bit pointer to a 64-bit
234 			 * pointer.  Since the 32-bit entity is negative, but
235 			 * the kernel is still mapped into the lower 4GB
236 			 * range, this needs to be zero-extended.
237 			 *
238 			 * XXXXX If we map the kernel and devices into the
239 			 * high 4GB range, this needs to be changed to
240 			 * sign-extend the address.
241 			 */
242 			sparc_promaddr_to_handle(sa->sa_bustag,
243 				sa->sa_promvaddrs[0], &bh);
244 
245 		} else {
246 
247 			if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
248 					 sa->sa_offset,
249 					 sa->sa_size,
250 					 BUS_SPACE_MAP_LINEAR,
251 					 &bh) != 0) {
252 				aprint_error(": cannot map registers\n");
253 				return;
254 			}
255 		}
256 		zsaddr[zs_unit] = bus_space_vaddr(sa->sa_bustag, bh);
257 	}
258 	zsc->zsc_bustag = sa->sa_bustag;
259 	zsc->zsc_dmatag = sa->sa_dmatag;
260 	zsc->zsc_promunit = prom_getpropint(sa->sa_node, "slave", -2);
261 	zsc->zsc_node = sa->sa_node;
262 	zs_attach(zsc, zsaddr[zs_unit], sa->sa_pri);
263 }
264 
265 static void
266 zs_attach_fhc(device_t parent, device_t self, void *aux)
267 {
268 	struct zsc_softc *zsc = device_private(self);
269 	struct fhc_attach_args *fa = aux;
270 	bus_space_handle_t bh;
271 	int zs_unit;
272 
273 	zsc->zsc_dev = self;
274 	zs_unit = device_unit(self);
275 
276 	if (fa->fa_nreg < 1 && fa->fa_npromvaddrs < 1) {
277 		printf(": no registers\n");
278 		return;
279 	}
280 
281 	if (fa->fa_nintr == 0) {
282 		aprint_error(": no interrupt lines\n");
283 		return;
284 	}
285 
286 	/* Use the mapping setup by the Sun PROM if possible. */
287 	if (zsaddr[zs_unit] == NULL) {
288 		/* Only map registers once. */
289 		if (fa->fa_npromvaddrs) {
290 			/*
291 			 * We're converting from a 32-bit pointer to a 64-bit
292 			 * pointer.  Since the 32-bit entity is negative, but
293 			 * the kernel is still mapped into the lower 4GB
294 			 * range, this needs to be zero-extended.
295 			 *
296 			 * XXXXX If we map the kernel and devices into the
297 			 * high 4GB range, this needs to be changed to
298 			 * sign-extend the address.
299 			 */
300 			sparc_promaddr_to_handle(fa->fa_bustag,
301 				fa->fa_promvaddrs[0], &bh);
302 
303 		} else {
304 
305 			if (fhc_bus_map(fa->fa_bustag,
306 					fa->fa_reg[0].fbr_slot,
307 					fa->fa_reg[0].fbr_offset,
308 					fa->fa_reg[0].fbr_size,
309 					BUS_SPACE_MAP_LINEAR,
310 					&bh) != 0) {
311 				aprint_error(": cannot map registers\n");
312 				return;
313 			}
314 		}
315 		zsaddr[zs_unit] = bus_space_vaddr(fa->fa_bustag, bh);
316 	}
317 	zsc->zsc_bustag = fa->fa_bustag;
318 	zsc->zsc_dmatag = NULL;
319 	zsc->zsc_promunit = prom_getpropint(fa->fa_node, "slave", -2);
320 	zsc->zsc_node = fa->fa_node;
321 	aprint_normal("\n");
322 	zs_attach(zsc, zsaddr[zs_unit], fa->fa_intr[0]);
323 }
324 
325 /*
326  * Attach a found zs.
327  *
328  * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
329  * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
330  */
331 static void
332 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
333 {
334 	struct zsc_attach_args zsc_args;
335 	struct zs_chanstate *cs;
336 	int channel;
337 
338 	if (zsd == NULL) {
339 		aprint_error(": configuration incomplete\n");
340 		return;
341 	}
342 
343 	/*
344 	 * Initialize software state for each channel.
345 	 */
346 	for (channel = 0; channel < 2; channel++) {
347 		struct zschan *zc;
348 		device_t child;
349 
350 		zsc_args.channel = channel;
351 		cs = &zsc->zsc_cs_store[channel];
352 		zsc->zsc_cs[channel] = cs;
353 
354 		zs_lock_init(cs);
355 		cs->cs_channel = channel;
356 		cs->cs_private = NULL;
357 		cs->cs_ops = &zsops_null;
358 		cs->cs_brg_clk = PCLK / 16;
359 
360 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
361 
362 		zsc_args.consdev = NULL;
363 		zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
364 						    zsc->zsc_node,
365 						    channel);
366 
367 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
368 			zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
369 			zsc_args.consdev = &zs_consdev;
370 		}
371 
372 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
373 			zs_conschan_get = zc;
374 		}
375 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
376 			zs_conschan_put = zc;
377 		}
378 
379 		/* Children need to set cn_dev, etc */
380 		cs->cs_reg_csr  = &zc->zc_csr;
381 		cs->cs_reg_data = &zc->zc_data;
382 
383 		memcpy(cs->cs_creg, zs_init_reg, 16);
384 		memcpy(cs->cs_preg, zs_init_reg, 16);
385 
386 		/* XXX: Consult PROM properties for this?! */
387 		cs->cs_defspeed = zs_get_speed(cs);
388 		cs->cs_defcflag = zs_def_cflag;
389 
390 		/* Make these correspond to cs_defcflag (-crtscts) */
391 		cs->cs_rr0_dcd = ZSRR0_DCD;
392 		cs->cs_rr0_cts = 0;
393 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
394 		cs->cs_wr5_rts = 0;
395 
396 		/*
397 		 * Clear the master interrupt enable.
398 		 * The INTENA is common to both channels,
399 		 * so just do it on the A channel.
400 		 */
401 		if (channel == 0) {
402 			zs_write_reg(cs, 9, 0);
403 		}
404 
405 		/*
406 		 * Look for a child driver for this channel.
407 		 * The child attach will setup the hardware.
408 		 */
409 		child = config_found(zsc->zsc_dev, (void *)&zsc_args,
410 		    zs_print);
411 		if (child == NULL) {
412 			/* No sub-driver.  Just reset it. */
413 			uint8_t reset = (channel == 0) ?
414 				ZSWR9_A_RESET : ZSWR9_B_RESET;
415 			zs_lock_chan(cs);
416 			zs_write_reg(cs,  9, reset);
417 			zs_unlock_chan(cs);
418 		}
419 #if (NKBD > 0) || (NMS > 0)
420 		/*
421 		 * If this was a zstty it has a keyboard
422 		 * property on it we need to attach the
423 		 * sunkbd and sunms line disciplines.
424 		 */
425 		if (child
426 		    && (device_is_a(child, "zstty"))
427 		    && (prom_getproplen(zsc->zsc_node, "keyboard") == 0)) {
428 			struct kbd_ms_tty_attach_args kma;
429 			struct tty *tp;
430 
431 			kma.kmta_tp = tp = zstty_get_tty_from_dev(child);
432 			kma.kmta_dev = tp->t_dev;
433 			kma.kmta_consdev = zsc_args.consdev;
434 
435 			/* Attach 'em if we got 'em. */
436 #if (NKBD > 0)
437 			if (channel == 0) {
438 				kma.kmta_name = "keyboard";
439 				config_found(child, (void *)&kma, NULL);
440 			}
441 #endif
442 #if (NMS > 0)
443 			if (channel == 1) {
444 				kma.kmta_name = "mouse";
445 				config_found(child, (void *)&kma, NULL);
446 			}
447 #endif
448 		}
449 #endif
450 	}
451 
452 	/*
453 	 * Now safe to install interrupt handlers.  Note the arguments
454 	 * to the interrupt handlers aren't used.  Note, we only do this
455 	 * once since both SCCs interrupt at the same level and vector.
456 	 */
457 	bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, zshard, zsc);
458 	if (!(zsc->zsc_softintr = softint_establish(SOFTINT_SERIAL, zssoft, zsc)))
459 		panic("zsattach: could not establish soft interrupt");
460 
461 	evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
462 	    device_xname(zsc->zsc_dev), "intr");
463 
464 
465 	/*
466 	 * Set the master interrupt enable and interrupt vector.
467 	 * (common to both channels, do it on A)
468 	 */
469 	cs = zsc->zsc_cs[0];
470 	zs_lock_chan(cs);
471 	/* interrupt vector */
472 	zs_write_reg(cs, 2, zs_init_reg[2]);
473 	/* master interrupt control (enable) */
474 	zs_write_reg(cs, 9, zs_init_reg[9]);
475 	zs_unlock_chan(cs);
476 }
477 
478 static int
479 zs_print(void *aux, const char *name)
480 {
481 	struct zsc_attach_args *args = aux;
482 
483 	if (name != NULL)
484 		aprint_normal("%s: ", name);
485 
486 	if (args->channel != -1)
487 		aprint_normal(" channel %d", args->channel);
488 
489 	return (UNCONF);
490 }
491 
492 static int
493 zshard(void *arg)
494 {
495 	struct zsc_softc *zsc = arg;
496 	int rr3, rval;
497 
498 	rval = 0;
499 	while ((rr3 = zsc_intr_hard(zsc))) {
500 		/* Count up the interrupts. */
501 		rval |= rr3;
502 		zsc->zsc_intrcnt.ev_count++;
503 	}
504 	if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
505 	     (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
506 	    zsc->zsc_softintr) {
507 		softint_schedule(zsc->zsc_softintr);
508 	}
509 	return (rval);
510 }
511 
512 int
513 zscheckintr(void *arg)
514 {
515 	struct zsc_softc *zsc;
516 	int unit, rval;
517 
518 	rval = 0;
519 	for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
520 
521 		zsc = device_lookup_private(&zs_cd, unit);
522 		if (zsc == NULL)
523 			continue;
524 		rval = (zshard((void *)zsc) || rval);
525 	}
526 	return (rval);
527 }
528 
529 
530 /*
531  * We need this only for TTY_DEBUG purposes.
532  */
533 static void
534 zssoft(void *arg)
535 {
536 	struct zsc_softc *zsc = arg;
537 
538 #if 0 /* not yet */
539 	/* Make sure we call the tty layer with tty_lock held. */
540 	mutex_spin_enter(&tty_lock);
541 #endif
542 	(void)zsc_intr_soft(zsc);
543 #ifdef TTY_DEBUG
544 	{
545 		struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
546 		struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
547 		if (zst0->zst_overflows || zst1->zst_overflows ) {
548 			struct trapframe *frame = (struct trapframe *)arg;
549 
550 			printf("zs silo overflow from %p\n",
551 			       (long)frame->tf_pc);
552 		}
553 	}
554 #endif
555 #if 0 /* not yet */
556 	mutex_spin_exit(&tty_lock);
557 #endif
558 }
559 
560 
561 /*
562  * Compute the current baud rate given a ZS channel.
563  */
564 static int
565 zs_get_speed(struct zs_chanstate *cs)
566 {
567 	int tconst;
568 
569 	tconst = zs_read_reg(cs, 12);
570 	tconst |= zs_read_reg(cs, 13) << 8;
571 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
572 }
573 
574 /*
575  * MD functions for setting the baud rate and control modes.
576  */
577 int
578 zs_set_speed(struct zs_chanstate *cs, int bps /* bits per second */)
579 {
580 	int tconst, real_bps;
581 
582 	if (bps == 0)
583 		return (0);
584 
585 #ifdef	DIAGNOSTIC
586 	if (cs->cs_brg_clk == 0)
587 		panic("zs_set_speed");
588 #endif
589 
590 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
591 	if (tconst < 0)
592 		return (EINVAL);
593 
594 	/* Convert back to make sure we can do it. */
595 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
596 
597 	/* XXX - Allow some tolerance here? */
598 	if (real_bps != bps)
599 		return (EINVAL);
600 
601 	cs->cs_preg[12] = tconst;
602 	cs->cs_preg[13] = tconst >> 8;
603 
604 	/* Caller will stuff the pending registers. */
605 	return (0);
606 }
607 
608 int
609 zs_set_modes(struct zs_chanstate *cs, int cflag)
610 {
611 
612 	/*
613 	 * Output hardware flow control on the chip is horrendous:
614 	 * if carrier detect drops, the receiver is disabled, and if
615 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
616 	 * Therefore, NEVER set the HFC bit, and instead use the
617 	 * status interrupt to detect CTS changes.
618 	 */
619 	zs_lock_chan(cs);
620 	cs->cs_rr0_pps = 0;
621 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
622 		cs->cs_rr0_dcd = 0;
623 		if ((cflag & MDMBUF) == 0)
624 			cs->cs_rr0_pps = ZSRR0_DCD;
625 	} else
626 		cs->cs_rr0_dcd = ZSRR0_DCD;
627 	if ((cflag & CRTSCTS) != 0) {
628 		cs->cs_wr5_dtr = ZSWR5_DTR;
629 		cs->cs_wr5_rts = ZSWR5_RTS;
630 		cs->cs_rr0_cts = ZSRR0_CTS;
631 	} else if ((cflag & CDTRCTS) != 0) {
632 		cs->cs_wr5_dtr = 0;
633 		cs->cs_wr5_rts = ZSWR5_DTR;
634 		cs->cs_rr0_cts = ZSRR0_CTS;
635 	} else if ((cflag & MDMBUF) != 0) {
636 		cs->cs_wr5_dtr = 0;
637 		cs->cs_wr5_rts = ZSWR5_DTR;
638 		cs->cs_rr0_cts = ZSRR0_DCD;
639 	} else {
640 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
641 		cs->cs_wr5_rts = 0;
642 		cs->cs_rr0_cts = 0;
643 	}
644 	zs_unlock_chan(cs);
645 
646 	/* Caller will stuff the pending registers. */
647 	return (0);
648 }
649 
650 
651 /*
652  * Read or write the chip with suitable delays.
653  */
654 
655 u_char
656 zs_read_reg(struct zs_chanstate *cs, u_char reg)
657 {
658 	u_char val;
659 
660 	*cs->cs_reg_csr = reg;
661 	ZS_DELAY();
662 	val = *cs->cs_reg_csr;
663 	ZS_DELAY();
664 	return (val);
665 }
666 
667 void
668 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
669 {
670 	*cs->cs_reg_csr = reg;
671 	ZS_DELAY();
672 	*cs->cs_reg_csr = val;
673 	ZS_DELAY();
674 }
675 
676 u_char
677 zs_read_csr(struct zs_chanstate *cs)
678 {
679 	u_char val;
680 
681 	val = *cs->cs_reg_csr;
682 	ZS_DELAY();
683 	return (val);
684 }
685 
686 void
687 zs_write_csr(struct zs_chanstate *cs, u_char val)
688 {
689 	*cs->cs_reg_csr = val;
690 	ZS_DELAY();
691 }
692 
693 u_char
694 zs_read_data(struct zs_chanstate *cs)
695 {
696 	u_char val;
697 
698 	val = *cs->cs_reg_data;
699 	ZS_DELAY();
700 	return (val);
701 }
702 
703 void
704 zs_write_data(struct zs_chanstate *cs, u_char val)
705 {
706 	*cs->cs_reg_data = val;
707 	ZS_DELAY();
708 }
709 
710 /****************************************************************
711  * Console support functions (Sun specific!)
712  * Note: this code is allowed to know about the layout of
713  * the chip registers, and uses that to keep things simple.
714  * XXX - I think I like the mvme167 code better. -gwr
715  ****************************************************************/
716 
717 extern void Debugger(void);
718 
719 /*
720  * Handle user request to enter kernel debugger.
721  */
722 void
723 zs_abort(struct zs_chanstate *cs)
724 {
725 	volatile struct zschan *zc = zs_conschan_get;
726 	int rr0;
727 
728 	/* Wait for end of break to avoid PROM abort. */
729 	/* XXX - Limit the wait? */
730 	do {
731 		rr0 = zc->zc_csr;
732 		ZS_DELAY();
733 	} while (rr0 & ZSRR0_BREAK);
734 
735 #if defined(KGDB)
736 	zskgdb(cs);
737 #elif defined(DDB)
738 	{
739 		extern int db_active;
740 
741 		if (!db_active)
742 			Debugger();
743 		else
744 			/* Debugger is probably hozed */
745 			callrom();
746 	}
747 #else
748 	printf("stopping on keyboard abort\n");
749 	callrom();
750 #endif
751 }
752 
753 
754 /*
755  * Polled input char.
756  */
757 int
758 zs_getc(void *arg)
759 {
760 	volatile struct zschan *zc = arg;
761 	int s, c, rr0;
762 
763 	s = splhigh();
764 	/* Wait for a character to arrive. */
765 	do {
766 		rr0 = zc->zc_csr;
767 		ZS_DELAY();
768 	} while ((rr0 & ZSRR0_RX_READY) == 0);
769 
770 	c = zc->zc_data;
771 	ZS_DELAY();
772 	splx(s);
773 
774 	/*
775 	 * This is used by the kd driver to read scan codes,
776 	 * so don't translate '\r' ==> '\n' here...
777 	 */
778 	return (c);
779 }
780 
781 /*
782  * Polled output char.
783  */
784 void
785 zs_putc(void *arg, int c)
786 {
787 	volatile struct zschan *zc = arg;
788 	int s, rr0;
789 
790 	s = splhigh();
791 
792 	/* Wait for transmitter to become ready. */
793 	do {
794 		rr0 = zc->zc_csr;
795 		ZS_DELAY();
796 	} while ((rr0 & ZSRR0_TX_READY) == 0);
797 
798 	/*
799 	 * Send the next character.
800 	 * Now you'd think that this could be followed by a ZS_DELAY()
801 	 * just like all the other chip accesses, but it turns out that
802 	 * the `transmit-ready' interrupt isn't de-asserted until
803 	 * some period of time after the register write completes
804 	 * (more than a couple instructions).  So to avoid stray
805 	 * interrupts we put in the 2us delay regardless of CPU model.
806 	 */
807 	zc->zc_data = c;
808 	delay(2);
809 
810 	splx(s);
811 }
812 
813 /*****************************************************************/
814 
815 
816 
817 
818 /*
819  * Polled console input putchar.
820  */
821 static int
822 zscngetc(dev_t dev)
823 {
824 	return (zs_getc(zs_conschan_get));
825 }
826 
827 /*
828  * Polled console output putchar.
829  */
830 static void
831 zscnputc(dev_t dev, int c)
832 {
833 	zs_putc(zs_conschan_put, c);
834 }
835 
836 int swallow_zsintrs;
837 
838 static void
839 zscnpollc(dev_t dev, int on)
840 {
841 	/*
842 	 * Need to tell zs driver to acknowledge all interrupts or we get
843 	 * annoying spurious interrupt messages.  This is because mucking
844 	 * with spl() levels during polling does not prevent interrupts from
845 	 * being generated.
846 	 */
847 
848 	if (on) swallow_zsintrs++;
849 	else swallow_zsintrs--;
850 }
851 
852 int
853 zs_console_flags(int promunit, int node, int channel)
854 {
855 	int cookie, flags = 0;
856 	char buf[255];
857 
858 	/*
859 	 * We'll just do the OBP grovelling down here since that's
860 	 * the only type of firmware we support.
861 	 */
862 
863 	/* Default to channel 0 if there are no explicit prom args */
864 	cookie = 0;
865 	if (node == prom_instance_to_package(prom_stdin())) {
866 		if (prom_getoption("input-device", buf, sizeof buf) == 0 &&
867 		    strcmp("ttyb", buf) == 0)
868 			cookie = 1;
869 
870 		if (channel == cookie)
871 			flags |= ZS_HWFLAG_CONSOLE_INPUT;
872 	}
873 
874 	if (node == prom_instance_to_package(prom_stdout())) {
875 		if (prom_getoption("output-device", buf, sizeof buf) == 0 &&
876 		    strcmp("ttyb", buf) == 0)
877 			cookie = 1;
878 
879 		if (channel == cookie)
880 			flags |= ZS_HWFLAG_CONSOLE_OUTPUT;
881 	}
882 
883 	return (flags);
884 }
885 
886