xref: /netbsd-src/sys/arch/sparc64/dev/zs.c (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30) 
1 /*	$NetBSD: zs.c,v 1.67 2008/06/13 13:10:49 cegger Exp $	*/
2 
3 /*-
4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Gordon W. Ross.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Zilog Z8530 Dual UART driver (machine-dependent part)
34  *
35  * Runs two serial lines per chip using slave drivers.
36  * Plain tty/async lines use the zs_async slave.
37  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
38  */
39 
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.67 2008/06/13 13:10:49 cegger Exp $");
42 
43 #include "opt_ddb.h"
44 #include "opt_kgdb.h"
45 
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/conf.h>
49 #include <sys/device.h>
50 #include <sys/file.h>
51 #include <sys/ioctl.h>
52 #include <sys/kernel.h>
53 #include <sys/proc.h>
54 #include <sys/tty.h>
55 #include <sys/time.h>
56 #include <sys/syslog.h>
57 #include <sys/intr.h>
58 
59 #include <machine/autoconf.h>
60 #include <machine/openfirm.h>
61 #include <machine/cpu.h>
62 #include <machine/eeprom.h>
63 #include <machine/psl.h>
64 #include <machine/z8530var.h>
65 
66 #include <dev/cons.h>
67 #include <dev/ic/z8530reg.h>
68 #include <dev/sun/kbd_ms_ttyvar.h>
69 #include <ddb/db_output.h>
70 
71 #include <sparc64/dev/cons.h>
72 
73 #include "ioconf.h"
74 #include "kbd.h"	/* NKBD */
75 #include "ms.h"		/* NMS */
76 #include "zs.h" 	/* NZS */
77 
78 /* Make life easier for the initialized arrays here. */
79 #if NZS < 3
80 #undef  NZS
81 #define NZS 3
82 #endif
83 
84 /*
85  * Some warts needed by z8530tty.c -
86  * The default parity REALLY needs to be the same as the PROM uses,
87  * or you can not see messages done with printf during boot-up...
88  */
89 int zs_def_cflag = (CREAD | CS8 | HUPCL);
90 
91 /*
92  * The Sun provides a 4.9152 MHz clock to the ZS chips.
93  */
94 #define PCLK	(9600 * 512)	/* PCLK pin input clock rate */
95 
96 #define	ZS_DELAY()
97 
98 /* The layout of this is hardware-dependent (padding, order). */
99 struct zschan {
100 	volatile uint8_t zc_csr;	/* ctrl,status, and indirect access */
101 	uint8_t		zc_xxx0;
102 	volatile uint8_t zc_data;	/* data */
103 	uint8_t		zc_xxx1;
104 };
105 struct zsdevice {
106 	/* Yes, they are backwards. */
107 	struct	zschan zs_chan_b;
108 	struct	zschan zs_chan_a;
109 };
110 
111 /* ZS channel used as the console device (if any) */
112 void *zs_conschan_get, *zs_conschan_put;
113 
114 /* Saved PROM mappings */
115 static struct zsdevice *zsaddr[NZS];
116 
117 static uint8_t zs_init_reg[16] = {
118 	0,	/* 0: CMD (reset, etc.) */
119 	0,	/* 1: No interrupts yet. */
120 	0,	/* 2: IVECT */
121 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
122 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
123 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
124 	0,	/* 6: TXSYNC/SYNCLO */
125 	0,	/* 7: RXSYNC/SYNCHI */
126 	0,	/* 8: alias for data port */
127 	ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
128 	0,	/*10: Misc. TX/RX control bits */
129 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
130 	((PCLK/32)/9600)-2,	/*12: BAUDLO (default=9600) */
131 	0,			/*13: BAUDHI (default=9600) */
132 	ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
133 	ZSWR15_BREAK_IE,
134 };
135 
136 /* Console ops */
137 static int  zscngetc(dev_t);
138 static void zscnputc(dev_t, int);
139 static void zscnpollc(dev_t, int);
140 
141 struct consdev zs_consdev = {
142 	.cn_getc = zscngetc,
143 	.cn_putc = zscnputc,
144 	.cn_pollc = zscnpollc,
145 };
146 
147 
148 /****************************************************************
149  * Autoconfig
150  ****************************************************************/
151 
152 /* Definition of the driver for autoconfig. */
153 static int  zs_match_sbus(device_t, cfdata_t, void *);
154 static void zs_attach_sbus(device_t, device_t, void *);
155 
156 static void zs_attach(struct zsc_softc *, struct zsdevice *, int);
157 static int  zs_print(void *, const char *);
158 
159 CFATTACH_DECL_NEW(zs, sizeof(struct zsc_softc),
160     zs_match_sbus, zs_attach_sbus, NULL, NULL);
161 
162 /* Interrupt handlers. */
163 int zscheckintr(void *);
164 static int zshard(void *);
165 static void zssoft(void *);
166 
167 static int zs_get_speed(struct zs_chanstate *);
168 
169 /* Console device support */
170 static int zs_console_flags(int, int, int);
171 
172 /* Power management hooks */
173 int  zs_enable(struct zs_chanstate *);
174 void zs_disable(struct zs_chanstate *);
175 
176 /* from dev/ic/z8530tty.c */
177 struct tty *zstty_get_tty_from_dev(struct device *);
178 
179 /*
180  * Is the zs chip present?
181  */
182 static int
183 zs_match_sbus(device_t parent, cfdata_t cf, void *aux)
184 {
185 	struct sbus_attach_args *sa = aux;
186 
187 	if (strcmp(cf->cf_name, sa->sa_name) != 0)
188 		return (0);
189 
190 	return (1);
191 }
192 
193 static void
194 zs_attach_sbus(device_t parent, device_t self, void *aux)
195 {
196 	struct zsc_softc *zsc = device_private(self);
197 	struct sbus_attach_args *sa = aux;
198 	bus_space_handle_t bh;
199 	int zs_unit;
200 
201 	zsc->zsc_dev = self;
202 	zs_unit = device_unit(self);
203 
204 	if (sa->sa_nintr == 0) {
205 		aprint_error(": no interrupt lines\n");
206 		return;
207 	}
208 
209 	/* Use the mapping setup by the Sun PROM if possible. */
210 	if (zsaddr[zs_unit] == NULL) {
211 		/* Only map registers once. */
212 		if (sa->sa_npromvaddrs) {
213 			/*
214 			 * We're converting from a 32-bit pointer to a 64-bit
215 			 * pointer.  Since the 32-bit entity is negative, but
216 			 * the kernel is still mapped into the lower 4GB
217 			 * range, this needs to be zero-extended.
218 			 *
219 			 * XXXXX If we map the kernel and devices into the
220 			 * high 4GB range, this needs to be changed to
221 			 * sign-extend the address.
222 			 */
223 			sparc_promaddr_to_handle(sa->sa_bustag,
224 				sa->sa_promvaddrs[0], &bh);
225 
226 		} else {
227 
228 			if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
229 					 sa->sa_offset,
230 					 sa->sa_size,
231 					 BUS_SPACE_MAP_LINEAR,
232 					 &bh) != 0) {
233 				aprint_error(": cannot map registers\n");
234 				return;
235 			}
236 		}
237 		zsaddr[zs_unit] = bus_space_vaddr(sa->sa_bustag, bh);
238 	}
239 	zsc->zsc_bustag = sa->sa_bustag;
240 	zsc->zsc_dmatag = sa->sa_dmatag;
241 	zsc->zsc_promunit = prom_getpropint(sa->sa_node, "slave", -2);
242 	zsc->zsc_node = sa->sa_node;
243 	zs_attach(zsc, zsaddr[zs_unit], sa->sa_pri);
244 }
245 
246 /*
247  * Attach a found zs.
248  *
249  * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
250  * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
251  */
252 static void
253 zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
254 {
255 	struct zsc_attach_args zsc_args;
256 	struct zs_chanstate *cs;
257 	int s, channel;
258 
259 	if (zsd == NULL) {
260 		aprint_error(": configuration incomplete\n");
261 		return;
262 	}
263 
264 	/*
265 	 * Initialize software state for each channel.
266 	 */
267 	for (channel = 0; channel < 2; channel++) {
268 		struct zschan *zc;
269 		struct device *child;
270 
271 		zsc_args.channel = channel;
272 		cs = &zsc->zsc_cs_store[channel];
273 		zsc->zsc_cs[channel] = cs;
274 
275 		zs_lock_init(cs);
276 		cs->cs_channel = channel;
277 		cs->cs_private = NULL;
278 		cs->cs_ops = &zsops_null;
279 		cs->cs_brg_clk = PCLK / 16;
280 
281 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
282 
283 		zsc_args.consdev = NULL;
284 		zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
285 						    zsc->zsc_node,
286 						    channel);
287 
288 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
289 			zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
290 			zsc_args.consdev = &zs_consdev;
291 		}
292 
293 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
294 			zs_conschan_get = zc;
295 		}
296 		if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
297 			zs_conschan_put = zc;
298 		}
299 
300 		/* Children need to set cn_dev, etc */
301 		cs->cs_reg_csr  = &zc->zc_csr;
302 		cs->cs_reg_data = &zc->zc_data;
303 
304 		memcpy(cs->cs_creg, zs_init_reg, 16);
305 		memcpy(cs->cs_preg, zs_init_reg, 16);
306 
307 		/* XXX: Consult PROM properties for this?! */
308 		cs->cs_defspeed = zs_get_speed(cs);
309 		cs->cs_defcflag = zs_def_cflag;
310 
311 		/* Make these correspond to cs_defcflag (-crtscts) */
312 		cs->cs_rr0_dcd = ZSRR0_DCD;
313 		cs->cs_rr0_cts = 0;
314 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
315 		cs->cs_wr5_rts = 0;
316 
317 		/*
318 		 * Clear the master interrupt enable.
319 		 * The INTENA is common to both channels,
320 		 * so just do it on the A channel.
321 		 */
322 		if (channel == 0) {
323 			zs_write_reg(cs, 9, 0);
324 		}
325 
326 		/*
327 		 * Look for a child driver for this channel.
328 		 * The child attach will setup the hardware.
329 		 */
330 		child = config_found(zsc->zsc_dev, (void *)&zsc_args,
331 		    zs_print);
332 		if (child == NULL) {
333 			/* No sub-driver.  Just reset it. */
334 			uint8_t reset = (channel == 0) ?
335 				ZSWR9_A_RESET : ZSWR9_B_RESET;
336 			s = splzs();
337 			zs_write_reg(cs,  9, reset);
338 			splx(s);
339 		}
340 #if (NKBD > 0) || (NMS > 0)
341 		/*
342 		 * If this was a zstty it has a keyboard
343 		 * property on it we need to attach the
344 		 * sunkbd and sunms line disciplines.
345 		 */
346 		if (child
347 		    && (device_is_a(child, "zstty"))
348 		    && (prom_getproplen(zsc->zsc_node, "keyboard") == 0)) {
349 			struct kbd_ms_tty_attach_args kma;
350 			struct tty *tp;
351 
352 			kma.kmta_tp = tp = zstty_get_tty_from_dev(child);
353 			kma.kmta_dev = tp->t_dev;
354 			kma.kmta_consdev = zsc_args.consdev;
355 
356 			/* Attach 'em if we got 'em. */
357 #if (NKBD > 0)
358 			if (channel == 0) {
359 				kma.kmta_name = "keyboard";
360 				config_found(child, (void *)&kma, NULL);
361 			}
362 #endif
363 #if (NMS > 0)
364 			if (channel == 1) {
365 				kma.kmta_name = "mouse";
366 				config_found(child, (void *)&kma, NULL);
367 			}
368 #endif
369 		}
370 #endif
371 	}
372 
373 	/*
374 	 * Now safe to install interrupt handlers.  Note the arguments
375 	 * to the interrupt handlers aren't used.  Note, we only do this
376 	 * once since both SCCs interrupt at the same level and vector.
377 	 */
378 	bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, zshard, zsc);
379 	if (!(zsc->zsc_softintr = softint_establish(SOFTINT_SERIAL, zssoft, zsc)))
380 		panic("zsattach: could not establish soft interrupt");
381 
382 	evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
383 	    device_xname(zsc->zsc_dev), "intr");
384 
385 
386 	/*
387 	 * Set the master interrupt enable and interrupt vector.
388 	 * (common to both channels, do it on A)
389 	 */
390 	cs = zsc->zsc_cs[0];
391 	s = splhigh();
392 	/* interrupt vector */
393 	zs_write_reg(cs, 2, zs_init_reg[2]);
394 	/* master interrupt control (enable) */
395 	zs_write_reg(cs, 9, zs_init_reg[9]);
396 	splx(s);
397 
398 }
399 
400 static int
401 zs_print(void *aux, const char *name)
402 {
403 	struct zsc_attach_args *args = aux;
404 
405 	if (name != NULL)
406 		aprint_normal("%s: ", name);
407 
408 	if (args->channel != -1)
409 		aprint_normal(" channel %d", args->channel);
410 
411 	return (UNCONF);
412 }
413 
414 /* Deprecate this? */
415 static volatile int zssoftpending;
416 
417 static int
418 zshard(void *arg)
419 {
420 	struct zsc_softc *zsc = arg;
421 	int rr3, rval;
422 
423 	rval = 0;
424 	while ((rr3 = zsc_intr_hard(zsc))) {
425 		/* Count up the interrupts. */
426 		rval |= rr3;
427 		zsc->zsc_intrcnt.ev_count++;
428 	}
429 	if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
430 	     (zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
431 	    zsc->zsc_softintr) {
432 		zssoftpending = PIL_TTY;
433 		softint_schedule(zsc->zsc_softintr);
434 	}
435 	return (rval);
436 }
437 
438 int
439 zscheckintr(void *arg)
440 {
441 	struct zsc_softc *zsc;
442 	int unit, rval;
443 
444 	rval = 0;
445 	for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
446 
447 		zsc = device_lookup_private(&zs_cd, unit);
448 		if (zsc == NULL)
449 			continue;
450 		rval = (zshard((void *)zsc) || rval);
451 	}
452 	return (rval);
453 }
454 
455 
456 /*
457  * We need this only for TTY_DEBUG purposes.
458  */
459 static void
460 zssoft(void *arg)
461 {
462 	struct zsc_softc *zsc = arg;
463 	int s;
464 
465 	/* Make sure we call the tty layer at spltty. */
466 	s = spltty();
467 	zssoftpending = 0;
468 	(void)zsc_intr_soft(zsc);
469 #ifdef TTY_DEBUG
470 	{
471 		struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
472 		struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
473 		if (zst0->zst_overflows || zst1->zst_overflows ) {
474 			struct trapframe *frame = (struct trapframe *)arg;
475 
476 			printf("zs silo overflow from %p\n",
477 			       (long)frame->tf_pc);
478 		}
479 	}
480 #endif
481 	splx(s);
482 }
483 
484 
485 /*
486  * Compute the current baud rate given a ZS channel.
487  */
488 static int
489 zs_get_speed(struct zs_chanstate *cs)
490 {
491 	int tconst;
492 
493 	tconst = zs_read_reg(cs, 12);
494 	tconst |= zs_read_reg(cs, 13) << 8;
495 	return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
496 }
497 
498 /*
499  * MD functions for setting the baud rate and control modes.
500  */
501 int
502 zs_set_speed(struct zs_chanstate *cs, int bps /* bits per second */)
503 {
504 	int tconst, real_bps;
505 
506 	if (bps == 0)
507 		return (0);
508 
509 #ifdef	DIAGNOSTIC
510 	if (cs->cs_brg_clk == 0)
511 		panic("zs_set_speed");
512 #endif
513 
514 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
515 	if (tconst < 0)
516 		return (EINVAL);
517 
518 	/* Convert back to make sure we can do it. */
519 	real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
520 
521 	/* XXX - Allow some tolerance here? */
522 	if (real_bps != bps)
523 		return (EINVAL);
524 
525 	cs->cs_preg[12] = tconst;
526 	cs->cs_preg[13] = tconst >> 8;
527 
528 	/* Caller will stuff the pending registers. */
529 	return (0);
530 }
531 
532 int
533 zs_set_modes(struct zs_chanstate *cs, int cflag)
534 {
535 	int s;
536 
537 	/*
538 	 * Output hardware flow control on the chip is horrendous:
539 	 * if carrier detect drops, the receiver is disabled, and if
540 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
541 	 * Therefore, NEVER set the HFC bit, and instead use the
542 	 * status interrupt to detect CTS changes.
543 	 */
544 	s = splzs();
545 	cs->cs_rr0_pps = 0;
546 	if ((cflag & (CLOCAL | MDMBUF)) != 0) {
547 		cs->cs_rr0_dcd = 0;
548 		if ((cflag & MDMBUF) == 0)
549 			cs->cs_rr0_pps = ZSRR0_DCD;
550 	} else
551 		cs->cs_rr0_dcd = ZSRR0_DCD;
552 	if ((cflag & CRTSCTS) != 0) {
553 		cs->cs_wr5_dtr = ZSWR5_DTR;
554 		cs->cs_wr5_rts = ZSWR5_RTS;
555 		cs->cs_rr0_cts = ZSRR0_CTS;
556 	} else if ((cflag & CDTRCTS) != 0) {
557 		cs->cs_wr5_dtr = 0;
558 		cs->cs_wr5_rts = ZSWR5_DTR;
559 		cs->cs_rr0_cts = ZSRR0_CTS;
560 	} else if ((cflag & MDMBUF) != 0) {
561 		cs->cs_wr5_dtr = 0;
562 		cs->cs_wr5_rts = ZSWR5_DTR;
563 		cs->cs_rr0_cts = ZSRR0_DCD;
564 	} else {
565 		cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
566 		cs->cs_wr5_rts = 0;
567 		cs->cs_rr0_cts = 0;
568 	}
569 	splx(s);
570 
571 	/* Caller will stuff the pending registers. */
572 	return (0);
573 }
574 
575 
576 /*
577  * Read or write the chip with suitable delays.
578  */
579 
580 u_char
581 zs_read_reg(struct zs_chanstate *cs, u_char reg)
582 {
583 	u_char val;
584 
585 	*cs->cs_reg_csr = reg;
586 	ZS_DELAY();
587 	val = *cs->cs_reg_csr;
588 	ZS_DELAY();
589 	return (val);
590 }
591 
592 void
593 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
594 {
595 	*cs->cs_reg_csr = reg;
596 	ZS_DELAY();
597 	*cs->cs_reg_csr = val;
598 	ZS_DELAY();
599 }
600 
601 u_char
602 zs_read_csr(struct zs_chanstate *cs)
603 {
604 	u_char val;
605 
606 	val = *cs->cs_reg_csr;
607 	ZS_DELAY();
608 	return (val);
609 }
610 
611 void
612 zs_write_csr(struct zs_chanstate *cs, u_char val)
613 {
614 	*cs->cs_reg_csr = val;
615 	ZS_DELAY();
616 }
617 
618 u_char
619 zs_read_data(struct zs_chanstate *cs)
620 {
621 	u_char val;
622 
623 	val = *cs->cs_reg_data;
624 	ZS_DELAY();
625 	return (val);
626 }
627 
628 void
629 zs_write_data(struct zs_chanstate *cs, u_char val)
630 {
631 	*cs->cs_reg_data = val;
632 	ZS_DELAY();
633 }
634 
635 /****************************************************************
636  * Console support functions (Sun specific!)
637  * Note: this code is allowed to know about the layout of
638  * the chip registers, and uses that to keep things simple.
639  * XXX - I think I like the mvme167 code better. -gwr
640  ****************************************************************/
641 
642 extern void Debugger(void);
643 
644 /*
645  * Handle user request to enter kernel debugger.
646  */
647 void
648 zs_abort(struct zs_chanstate *cs)
649 {
650 	volatile struct zschan *zc = zs_conschan_get;
651 	int rr0;
652 
653 	/* Wait for end of break to avoid PROM abort. */
654 	/* XXX - Limit the wait? */
655 	do {
656 		rr0 = zc->zc_csr;
657 		ZS_DELAY();
658 	} while (rr0 & ZSRR0_BREAK);
659 
660 #if defined(KGDB)
661 	zskgdb(cs);
662 #elif defined(DDB)
663 	{
664 		extern int db_active;
665 
666 		if (!db_active)
667 			Debugger();
668 		else
669 			/* Debugger is probably hozed */
670 			callrom();
671 	}
672 #else
673 	printf("stopping on keyboard abort\n");
674 	callrom();
675 #endif
676 }
677 
678 
679 /*
680  * Polled input char.
681  */
682 int
683 zs_getc(void *arg)
684 {
685 	volatile struct zschan *zc = arg;
686 	int s, c, rr0;
687 
688 	s = splhigh();
689 	/* Wait for a character to arrive. */
690 	do {
691 		rr0 = zc->zc_csr;
692 		ZS_DELAY();
693 	} while ((rr0 & ZSRR0_RX_READY) == 0);
694 
695 	c = zc->zc_data;
696 	ZS_DELAY();
697 	splx(s);
698 
699 	/*
700 	 * This is used by the kd driver to read scan codes,
701 	 * so don't translate '\r' ==> '\n' here...
702 	 */
703 	return (c);
704 }
705 
706 /*
707  * Polled output char.
708  */
709 void
710 zs_putc(void *arg, int c)
711 {
712 	volatile struct zschan *zc = arg;
713 	int s, rr0;
714 
715 	s = splhigh();
716 
717 	/* Wait for transmitter to become ready. */
718 	do {
719 		rr0 = zc->zc_csr;
720 		ZS_DELAY();
721 	} while ((rr0 & ZSRR0_TX_READY) == 0);
722 
723 	/*
724 	 * Send the next character.
725 	 * Now you'd think that this could be followed by a ZS_DELAY()
726 	 * just like all the other chip accesses, but it turns out that
727 	 * the `transmit-ready' interrupt isn't de-asserted until
728 	 * some period of time after the register write completes
729 	 * (more than a couple instructions).  So to avoid stray
730 	 * interrupts we put in the 2us delay regardless of CPU model.
731 	 */
732 	zc->zc_data = c;
733 	delay(2);
734 
735 	splx(s);
736 }
737 
738 /*****************************************************************/
739 
740 
741 
742 
743 /*
744  * Polled console input putchar.
745  */
746 static int
747 zscngetc(dev_t dev)
748 {
749 	return (zs_getc(zs_conschan_get));
750 }
751 
752 /*
753  * Polled console output putchar.
754  */
755 static void
756 zscnputc(dev_t dev, int c)
757 {
758 	zs_putc(zs_conschan_put, c);
759 }
760 
761 int swallow_zsintrs;
762 
763 static void
764 zscnpollc(dev_t dev, int on)
765 {
766 	/*
767 	 * Need to tell zs driver to acknowledge all interrupts or we get
768 	 * annoying spurious interrupt messages.  This is because mucking
769 	 * with spl() levels during polling does not prevent interrupts from
770 	 * being generated.
771 	 */
772 
773 	if (on) swallow_zsintrs++;
774 	else swallow_zsintrs--;
775 }
776 
777 int
778 zs_console_flags(int promunit, int node, int channel)
779 {
780 	int cookie, flags = 0;
781 	char buf[255];
782 
783 	/*
784 	 * We'll just do the OBP grovelling down here since that's
785 	 * the only type of firmware we support.
786 	 */
787 
788 	/* Default to channel 0 if there are no explicit prom args */
789 	cookie = 0;
790 	if (node == prom_instance_to_package(prom_stdin())) {
791 		if (prom_getoption("input-device", buf, sizeof buf) == 0 &&
792 		    strcmp("ttyb", buf) == 0)
793 			cookie = 1;
794 
795 		if (channel == cookie)
796 			flags |= ZS_HWFLAG_CONSOLE_INPUT;
797 	}
798 
799 	if (node == prom_instance_to_package(prom_stdout())) {
800 		if (prom_getoption("output-device", buf, sizeof buf) == 0 &&
801 		    strcmp("ttyb", buf) == 0)
802 			cookie = 1;
803 
804 		if (channel == cookie)
805 			flags |= ZS_HWFLAG_CONSOLE_OUTPUT;
806 	}
807 
808 	return (flags);
809 }
810 
811