1 /* $NetBSD: vpci.c,v 1.7 2016/05/10 19:23:59 palle Exp $ */ 2 /* 3 * Copyright (c) 2015 Palle Lyckegaard 4 * All rights reserved. 5 * 6 * Driver for virtual PCIe host bridge on sun4v systems. 7 * 8 * Based on NetBSD pyro and OpenBSD vpci drivers. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 22 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 27 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: vpci.c,v 1.7 2016/05/10 19:23:59 palle Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/device.h> 37 #include <sys/errno.h> 38 #include <sys/malloc.h> 39 #include <sys/systm.h> 40 41 #define _SPARC_BUS_DMA_PRIVATE 42 #include <sys/bus.h> 43 #include <machine/autoconf.h> 44 45 #ifdef DDB 46 #include <machine/db_machdep.h> 47 #endif 48 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pcireg.h> 51 52 #include <sparc64/dev/iommureg.h> 53 #include <sparc64/dev/iommuvar.h> 54 #include <sparc64/dev/vpcivar.h> 55 56 #include <machine/hypervisor.h> 57 58 #ifdef DEBUG 59 #define VDB_PROM 0x01 60 #define VDB_BUSMAP 0x02 61 #define VDB_INTR 0x04 62 #define VDB_CONF_READ 0x08 63 #define VDB_CONF_WRITE 0x10 64 #define VDB_CONF VDB_CONF_READ|VDB_CONF_WRITE 65 int vpci_debug = 0x00; 66 #define DPRINTF(l, s) do { if (vpci_debug & l) printf s; } while (0) 67 #else 68 #define DPRINTF(l, s) 69 #endif 70 71 #if 0 72 FIXME 73 #define FIRE_RESET_GEN 0x7010 74 75 #define FIRE_RESET_GEN_XIR 0x0000000000000002L 76 77 #define FIRE_INTRMAP_INT_CNTRL_NUM_MASK 0x000003c0 78 #define FIRE_INTRMAP_INT_CNTRL_NUM0 0x00000040 79 #define FIRE_INTRMAP_INT_CNTRL_NUM1 0x00000080 80 #define FIRE_INTRMAP_INT_CNTRL_NUM2 0x00000100 81 #define FIRE_INTRMAP_INT_CNTRL_NUM3 0x00000200 82 #define FIRE_INTRMAP_T_JPID_SHIFT 26 83 #define FIRE_INTRMAP_T_JPID_MASK 0x7c000000 84 85 #define OBERON_INTRMAP_T_DESTID_SHIFT 21 86 #define OBERON_INTRMAP_T_DESTID_MASK 0x7fe00000 87 #endif 88 89 extern struct sparc_pci_chipset _sparc_pci_chipset; 90 91 int vpci_match(device_t, cfdata_t, void *); 92 void vpci_attach(device_t, device_t, void *); 93 int vpci_print(void *, const char *); 94 95 CFATTACH_DECL_NEW(vpci, sizeof(struct vpci_softc), 96 vpci_match, vpci_attach, NULL, NULL); 97 98 void vpci_init(struct vpci_softc */*FIXME, int*/, struct mainbus_attach_args *); 99 void vpci_init_iommu(struct vpci_softc *, struct vpci_pbm *); 100 pci_chipset_tag_t vpci_alloc_chipset(struct vpci_pbm *, int, 101 pci_chipset_tag_t); 102 bus_space_tag_t vpci_alloc_mem_tag(struct vpci_pbm *); 103 bus_space_tag_t vpci_alloc_io_tag(struct vpci_pbm *); 104 bus_space_tag_t vpci_alloc_config_tag(struct vpci_pbm *); 105 bus_space_tag_t vpci_alloc_bus_tag(struct vpci_pbm *, const char *, int); 106 bus_dma_tag_t vpci_alloc_dma_tag(struct vpci_pbm *); 107 108 #if 0 109 int vpci_conf_size(pci_chipset_tag_t, pcitag_t); 110 #endif 111 pcireg_t vpci_conf_read(pci_chipset_tag_t, pcitag_t, int); 112 void vpci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 113 114 static void * vpci_pci_intr_establish(pci_chipset_tag_t pc, 115 pci_intr_handle_t ih, int level, 116 int (*func)(void *), void *arg); 117 void vpci_intr_ack(struct intrhand *); 118 int vpci_intr_map(const struct pci_attach_args *, pci_intr_handle_t *); 119 int vpci_bus_map(bus_space_tag_t, bus_addr_t, 120 bus_size_t, int, vaddr_t, bus_space_handle_t *); 121 paddr_t vpci_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, 122 int, int); 123 void *vpci_intr_establish(bus_space_tag_t, int, int, 124 int (*)(void *), void *, void (*)(void)); 125 126 int vpci_dmamap_create(bus_dma_tag_t, bus_size_t, int, 127 bus_size_t, bus_size_t, int, bus_dmamap_t *); 128 129 int 130 vpci_match(device_t parent, cfdata_t match, void *aux) 131 { 132 struct mainbus_attach_args *ma = aux; 133 char compat[32]; 134 135 if (strcmp(ma->ma_name, "pci") != 0) 136 return (0); 137 138 if (OF_getprop(ma->ma_node, "compatible", compat, sizeof(compat)) == -1) 139 return (0); 140 141 if (strcmp(compat, "SUNW,sun4v-pci") == 0) 142 return (1); 143 144 return (0); 145 } 146 147 void 148 vpci_attach(device_t parent, device_t self, void *aux) 149 { 150 struct vpci_softc *sc = device_private(self); 151 struct mainbus_attach_args *ma = aux; 152 #if 0 153 FIXME 154 char *str; 155 int busa; 156 #endif 157 sc->sc_dev = self; 158 sc->sc_node = ma->ma_node; 159 sc->sc_dmat = ma->ma_dmatag; 160 sc->sc_bustag = ma->ma_bustag; 161 sc->sc_csr = ma->ma_reg[0].ur_paddr; 162 #if 0 163 FIXME 164 sc->sc_xbc = ma->ma_reg[1].ur_paddr; 165 sc->sc_ign = INTIGN(ma->ma_upaid << INTMAP_IGN_SHIFT); 166 167 if ((ma->ma_reg[0].ur_paddr & 0x00700000) == 0x00600000) 168 busa = 1; 169 else 170 busa = 0; 171 #endif 172 #if 0 173 FIXME 174 if (bus_space_map(sc->sc_bustag, sc->sc_csr, 175 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, &sc->sc_csrh)) { 176 printf(": failed to map csr registers\n"); 177 return; 178 } 179 #endif 180 #if 0 181 FIXME 182 if (bus_space_map(sc->sc_bustag, sc->sc_xbc, 183 ma->ma_reg[1].ur_len, 0, &sc->sc_xbch)) { 184 printf(": failed to map xbc registers\n"); 185 return; 186 } 187 188 str = prom_getpropstring(ma->ma_node, "compatible"); 189 if (strcmp(str, "pciex108e,80f8") == 0) 190 sc->sc_oberon = 1; 191 192 #endif 193 vpci_init(sc/*FIXME, busa*/, ma); 194 } 195 196 void 197 vpci_init(struct vpci_softc *sc/*FIXME, int busa*/, struct mainbus_attach_args *ma) 198 { 199 struct vpci_pbm *pbm; 200 struct pcibus_attach_args pba; 201 int *busranges = NULL, nranges; 202 203 pbm = malloc(sizeof(*pbm), M_DEVBUF, M_NOWAIT | M_ZERO); 204 if (pbm == NULL) 205 panic("vpci: can't alloc vpci pbm"); 206 207 pbm->vp_sc = sc; 208 pbm->vp_devhandle = (ma->ma_reg[0].ur_paddr >> 32) & 0x0fffffff; 209 #if 0 210 FiXME 211 pbm->vp_bus_a = busa; 212 #endif 213 214 if (prom_getprop(sc->sc_node, "ranges", sizeof(struct vpci_range), 215 &pbm->vp_nrange, (void **)&pbm->vp_range)) 216 panic("vpci: can't get ranges"); 217 for (int range = 0; range < pbm->vp_nrange; range++) 218 DPRINTF(VDB_PROM, 219 ("\nvpci_attach: range %d cspace %08x " 220 "child_hi %08x child_lo %08x phys_hi %08x phys_lo %08x " 221 "size_hi %08x size_lo %08x", range, 222 pbm->vp_range[range].cspace, 223 pbm->vp_range[range].child_hi, 224 pbm->vp_range[range].child_lo, 225 pbm->vp_range[range].phys_hi, 226 pbm->vp_range[range].phys_lo, 227 pbm->vp_range[range].size_hi, 228 pbm->vp_range[range].size_lo)); 229 230 if (prom_getprop(sc->sc_node, "bus-range", sizeof(int), &nranges, 231 (void **)&busranges)) 232 panic("vpci: can't get bus-range"); 233 for (int range = 0; range < nranges; range++) 234 DPRINTF(VDB_PROM, ("\nvpci_attach: bus-range %d %08x", range, busranges[range])); 235 236 aprint_normal(": bus %d to %d", busranges[0], busranges[1]); 237 238 vpci_init_iommu(sc, pbm); 239 240 pbm->vp_memt = vpci_alloc_mem_tag(pbm); 241 pbm->vp_iot = vpci_alloc_io_tag(pbm); 242 pbm->vp_cfgt = vpci_alloc_config_tag(pbm); 243 pbm->vp_dmat = vpci_alloc_dma_tag(pbm); 244 pbm->vp_flags = (pbm->vp_memt ? PCI_FLAGS_MEM_OKAY : 0) | 245 (pbm->vp_iot ? PCI_FLAGS_IO_OKAY : 0); 246 #if 0 247 FIXME 248 if (bus_space_map(pbm->vp_cfgt, 0, 0x10000000, 0, &pbm->vp_cfgh)) 249 panic("vpci: can't map config space"); 250 #endif 251 pbm->vp_pc = vpci_alloc_chipset(pbm, sc->sc_node, &_sparc_pci_chipset); 252 pbm->vp_pc->spc_busmax = busranges[1]; 253 pbm->vp_pc->spc_busnode = malloc(sizeof(*pbm->vp_pc->spc_busnode), 254 M_DEVBUF, M_NOWAIT | M_ZERO); 255 if (pbm->vp_pc->spc_busnode == NULL) 256 panic("vpci: malloc busnode"); 257 258 #if 0 259 pbm->vp_pc->bustag = pbm->vp_cfgt; 260 pbm->vp_pc->bushandle = pbm->vp_cfgh; 261 #endif 262 263 bzero(&pba, sizeof(pba)); 264 pba.pba_bus = busranges[0]; 265 pba.pba_pc = pbm->vp_pc; 266 pba.pba_flags = pbm->vp_flags; 267 pba.pba_dmat = pbm->vp_dmat; 268 pba.pba_dmat64 = NULL; /* XXX */ 269 pba.pba_memt = pbm->vp_memt; 270 pba.pba_iot = pbm->vp_iot; 271 272 free(busranges, M_DEVBUF); 273 274 config_found(sc->sc_dev, &pba, vpci_print); 275 } 276 277 void 278 vpci_init_iommu(struct vpci_softc *sc, struct vpci_pbm *pbm) 279 { 280 struct iommu_state *is = &pbm->vp_is; 281 int *vdma = NULL; 282 int nitem; 283 int tsbsize = 0; 284 u_int32_t iobase = -1; 285 u_int32_t iolen = 0; 286 char *name; 287 288 pbm->vp_sb.sb_is = is; 289 is->is_bustag = sc->sc_bustag; 290 291 if (bus_space_subregion(is->is_bustag, sc->sc_csrh, 292 0x40000, 0x100, &is->is_iommu)) { 293 panic("vpci: unable to create iommu handle"); 294 } 295 296 /* Construct tsbsize */ 297 if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 298 (void **)&vdma)) { 299 DPRINTF(VDB_BUSMAP, ("vpci_init_iommu: vdma[0]=0x%x vdma[1]=0x%x\n", 300 vdma[0], vdma[1])); 301 iobase = vdma[0]; 302 iolen = vdma[1]; 303 for (tsbsize = 8; (1 << (tsbsize+23)) > iolen;) 304 tsbsize--; 305 DPRINTF(VDB_BUSMAP, ("vpci_init_iommu: iobase=0x%x iolen = 0x%x tsbsize=0x%x\n", 306 iobase, iolen, tsbsize)); 307 free(vdma, M_DEVBUF); 308 } else 309 panic("vpci_init_iommu: getprop virtual-dma failed"); 310 311 aprint_normal(" vdma %x length %x\n", iobase, iolen); 312 aprint_naive("\n"); 313 314 /* We have no STC. */ 315 is->is_sb[0] = NULL; 316 317 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 318 if (name == NULL) 319 panic("couldn't malloc iommu name"); 320 snprintf(name, 32, "%s dvma", device_xname(sc->sc_dev)); 321 322 /* Tell iommu how to set the TSB size. */ 323 is->is_flags = IOMMU_TSBSIZE_IN_PTSB; 324 325 is->is_devhandle = pbm->vp_devhandle; 326 iommu_init(name, is, tsbsize, iobase); 327 } 328 329 330 int 331 vpci_print(void *aux, const char *p) 332 { 333 if (p == NULL) 334 return (UNCONF); 335 return (QUIET); 336 } 337 338 pcireg_t 339 vpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 340 { 341 struct vpci_pbm *pbm = pc->cookie; 342 uint64_t error_flag, data; 343 344 int64_t hv_rc; 345 DPRINTF(VDB_CONF_READ, ("%s: tag %lx reg %x ", __func__, (long)tag, reg)); 346 hv_rc = hv_pci_config_get(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 347 &error_flag, &data); 348 if (hv_rc != H_EOK) 349 panic("hv_pci_config_get() failed - rc = %" PRId64 "\n", 350 hv_rc); 351 352 pcireg_t val = error_flag ? (pcireg_t)~0 : data; 353 DPRINTF(VDB_CONF_READ, (" returning %08x\n", (u_int)val)); 354 return val; 355 } 356 357 void 358 vpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 359 { 360 361 struct vpci_pbm *pbm = pc->cookie; 362 uint64_t error_flag; 363 int64_t hv_rc; 364 DPRINTF(VDB_CONF_WRITE, ("%s: tag %lx; reg %x; data %x", __func__, 365 (long)tag, reg, (int)data)); 366 hv_rc = hv_pci_config_put(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 367 data, &error_flag); 368 if (hv_rc != H_EOK) 369 panic("hv_pci_config_put() failed - rc = %" PRId64 "\n", 370 hv_rc); 371 DPRINTF(VDB_CONF_WRITE, (" .. done\n")); 372 } 373 374 /* 375 * Bus-specific interrupt mapping 376 */ 377 int 378 vpci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 379 { 380 struct vpci_pbm *pbm = pa->pa_pc->cookie; 381 uint64_t devhandle = pbm->vp_devhandle; 382 uint64_t devino = INTINO(*ihp); 383 DPRINTF(VDB_INTR, ("vpci_intr_map(): devino 0x%lx\n", devino)); 384 uint64_t sysino; 385 int err; 386 387 if (*ihp != (pci_intr_handle_t)-1) { 388 err = hv_intr_devino_to_sysino(devhandle, devino, &sysino); 389 if (err != H_EOK) 390 return (-1); 391 392 KASSERT(sysino == INTVEC(sysino)); 393 *ihp = sysino; 394 DPRINTF(VDB_INTR, ("vpci_intr_map(): sysino 0x%lx\n", sysino)); 395 return (0); 396 } 397 398 return (-1); 399 } 400 401 bus_space_tag_t 402 vpci_alloc_mem_tag(struct vpci_pbm *vp) 403 { 404 return (vpci_alloc_bus_tag(vp, "mem", PCI_MEMORY_BUS_SPACE)); 405 } 406 407 bus_space_tag_t 408 vpci_alloc_io_tag(struct vpci_pbm *vp) 409 { 410 return (vpci_alloc_bus_tag(vp, "io", PCI_IO_BUS_SPACE)); 411 } 412 413 bus_space_tag_t 414 vpci_alloc_config_tag(struct vpci_pbm *vp) 415 { 416 return (vpci_alloc_bus_tag(vp, "cfg", PCI_CONFIG_BUS_SPACE)); 417 } 418 419 bus_space_tag_t 420 vpci_alloc_bus_tag(struct vpci_pbm *pbm, const char *name, int type) 421 { 422 struct vpci_softc *sc = pbm->vp_sc; 423 struct sparc_bus_space_tag *bt; 424 425 bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO); 426 if (bt == NULL) 427 panic("vpci: could not allocate bus tag"); 428 429 #if 0 430 snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)", 431 device_xname(sc->sc_dev), name, ss, asi); 432 #endif 433 434 bt->cookie = pbm; 435 bt->parent = sc->sc_bustag; 436 bt->type = type; 437 bt->sparc_bus_map = vpci_bus_map; 438 bt->sparc_bus_mmap = vpci_bus_mmap; 439 bt->sparc_intr_establish = vpci_intr_establish; 440 return (bt); 441 } 442 443 bus_dma_tag_t 444 vpci_alloc_dma_tag(struct vpci_pbm *pbm) 445 { 446 struct vpci_softc *sc = pbm->vp_sc; 447 bus_dma_tag_t dt, pdt = sc->sc_dmat; 448 449 dt = malloc(sizeof(*dt), M_DEVBUF, M_NOWAIT | M_ZERO); 450 if (dt == NULL) 451 panic("vpci: could not alloc dma tag"); 452 453 dt->_cookie = pbm; 454 dt->_parent = pdt; 455 #define PCOPY(x) dt->x = pdt->x 456 dt->_dmamap_create = vpci_dmamap_create; 457 PCOPY(_dmamap_destroy); 458 dt->_dmamap_load = iommu_dvmamap_load; 459 PCOPY(_dmamap_load_mbuf); 460 PCOPY(_dmamap_load_uio); 461 dt->_dmamap_load_raw = iommu_dvmamap_load_raw; 462 dt->_dmamap_unload = iommu_dvmamap_unload; 463 dt->_dmamap_sync = iommu_dvmamap_sync; 464 dt->_dmamem_alloc = iommu_dvmamem_alloc; 465 dt->_dmamem_free = iommu_dvmamem_free; 466 dt->_dmamem_map = iommu_dvmamem_map; 467 dt->_dmamem_unmap = iommu_dvmamem_unmap; 468 PCOPY(_dmamem_mmap); 469 #undef PCOPY 470 return (dt); 471 } 472 473 pci_chipset_tag_t 474 vpci_alloc_chipset(struct vpci_pbm *pbm, int node, pci_chipset_tag_t pc) 475 { 476 pci_chipset_tag_t npc; 477 478 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 479 if (npc == NULL) 480 panic("vpci: could not allocate pci_chipset_tag_t"); 481 memcpy(npc, pc, sizeof *pc); 482 npc->cookie = pbm; 483 npc->rootnode = node; 484 npc->spc_conf_read = vpci_conf_read; 485 npc->spc_conf_write = vpci_conf_write; 486 npc->spc_intr_map = vpci_intr_map; 487 npc->spc_intr_establish = vpci_pci_intr_establish; 488 npc->spc_find_ino = NULL; 489 return (npc); 490 } 491 492 int 493 vpci_dmamap_create(bus_dma_tag_t t, bus_size_t size, 494 int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, 495 bus_dmamap_t *dmamp) 496 { 497 struct vpci_pbm *pbm = t->_cookie; 498 int error; 499 500 error = bus_dmamap_create(t->_parent, size, nsegments, maxsegsz, 501 boundary, flags, dmamp); 502 if (error == 0) 503 (*dmamp)->_dm_cookie = &pbm->vp_sb; 504 return error; 505 } 506 507 int 508 vpci_bus_map(bus_space_tag_t t, bus_addr_t offset, 509 bus_size_t size, int flags, vaddr_t unused, bus_space_handle_t *hp) 510 { 511 struct vpci_pbm *pbm = t->cookie; 512 struct vpci_softc *sc = pbm->vp_sc; 513 int i, ss; 514 515 DPRINTF(VDB_BUSMAP, ("vpci_bus_map: type %d off %qx sz %qx flags %d", 516 t->type, 517 (unsigned long long)offset, 518 (unsigned long long)size, 519 flags)); 520 521 ss = sparc_pci_childspace(t->type); 522 DPRINTF(VDB_BUSMAP, (" cspace %d\n", ss)); 523 524 if (t->parent == 0 || t->parent->sparc_bus_map == 0) { 525 printf("\n_vpci_bus_map: invalid parent"); 526 return (EINVAL); 527 } 528 529 for (i = 0; i < pbm->vp_nrange; i++) { 530 bus_addr_t paddr; 531 struct vpci_range *pr = &pbm->vp_range[i]; 532 533 if (((pr->cspace >> 24) & 0x03) != ss) 534 continue; 535 536 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 537 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 538 flags, 0, hp)); 539 } 540 541 return (EINVAL); 542 } 543 544 paddr_t 545 vpci_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, 546 off_t off, int prot, int flags) 547 { 548 bus_addr_t offset = paddr; 549 struct vpci_pbm *pbm = t->cookie; 550 struct vpci_softc *sc = pbm->vp_sc; 551 int i, ss; 552 553 ss = sparc_pci_childspace(t->type); 554 555 DPRINTF(VDB_BUSMAP, ("vpci_bus_mmap: prot %d flags %d pa %qx\n", 556 prot, flags, (unsigned long long)paddr)); 557 558 if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) { 559 printf("\n_vpci_bus_mmap: invalid parent"); 560 return (-1); 561 } 562 563 for (i = 0; i < pbm->vp_nrange; i++) { 564 struct vpci_range *pr = &pbm->vp_range[i]; 565 566 if (((pr->cspace >> 24) & 0x03) != ss) 567 continue; 568 569 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 570 return (bus_space_mmap(sc->sc_bustag, paddr, off, 571 prot, flags)); 572 } 573 574 return (-1); 575 } 576 577 void * 578 vpci_intr_establish(bus_space_tag_t t, int ihandle, int level, 579 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 580 { 581 struct intrhand *ih = NULL; 582 int ino; 583 584 ino = INTINO(ihandle); 585 DPRINTF(VDB_INTR, ("%s: ih %lx; level %d ino %#x\n", __func__, (u_long)ihandle, level, ino)); 586 587 if (level == IPL_NONE) { 588 level = INTLEV(ihandle); 589 printf(": IPL_NONE, setting IPL %d.\n", level); 590 } 591 if (level == IPL_NONE) { 592 level = 2; 593 printf(": no IPL, setting IPL 2.\n"); 594 } 595 596 ino |= INTVEC(ihandle); 597 DPRINTF(VDB_INTR, ("%s: ih %lx; level %d ino %#x\n", __func__, (u_long)ihandle, level, ino)); 598 599 ih = intrhand_alloc(); 600 601 ih->ih_ivec = ihandle; 602 ih->ih_fun = handler; 603 ih->ih_arg = arg; 604 ih->ih_pil = level; 605 ih->ih_number = ino; 606 ih->ih_pending = 0; 607 ih->ih_ack = vpci_intr_ack; 608 intr_establish(ih->ih_pil, level != IPL_VM, ih); 609 610 uint64_t sysino = INTVEC(ihandle); 611 DPRINTF(VDB_INTR, ("vpci_intr_establish(): sysino 0x%lx\n", sysino)); 612 613 int err; 614 615 err = hv_intr_settarget(sysino, cpus->ci_cpuid); 616 if (err != H_EOK) 617 printf("hv_intr_settarget(%lu, %u) failed - err = %d\n", 618 (long unsigned int)sysino, cpus->ci_cpuid, err); 619 620 /* Clear pending interrupts. */ 621 err = hv_intr_setstate(sysino, INTR_IDLE); 622 if (err != H_EOK) 623 printf("hv_intr_setstate(%lu, INTR_IDLE) failed - err = %d\n", 624 (long unsigned int)sysino, err); 625 626 err = hv_intr_setenabled(sysino, INTR_ENABLED); 627 if (err != H_EOK) 628 printf("hv_intr_setenabled(%lu) failed - err = %d\n", 629 (long unsigned int)sysino, err); 630 631 DPRINTF(VDB_INTR, ("%s() returning %p\n", __func__, ih)); 632 return (ih); 633 } 634 635 void 636 vpci_intr_ack(struct intrhand *ih) 637 { 638 int err; 639 err = hv_intr_setstate(ih->ih_number, INTR_IDLE); 640 if (err != H_EOK) 641 panic("%s(%u, INTR_IDLE) failed - err = %d\n", 642 __func__, ih->ih_number, err); 643 } 644 645 static void * 646 vpci_pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 647 int (*func)(void *), void *arg) 648 { 649 void *cookie; 650 struct vpci_pbm *pbm = (struct vpci_pbm *)pc->cookie; 651 652 DPRINTF(VDB_INTR, ("%s: ih %lx; level %d\n", __func__, (u_long)ih, level)); 653 cookie = bus_intr_establish(pbm->vp_memt, ih, level, func, arg); 654 655 DPRINTF(VDB_INTR, ("%s: returning handle %p\n", __func__, cookie)); 656 return (cookie); 657 } 658