1 /* $NetBSD: sbus.c,v 1.73 2005/12/11 12:19:09 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1999-2002 Eduardo Horvath 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 24 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 32 /* 33 * Sbus stuff. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: sbus.c,v 1.73 2005/12/11 12:19:09 christos Exp $"); 38 39 #include "opt_ddb.h" 40 41 #include <sys/param.h> 42 #include <sys/extent.h> 43 #include <sys/malloc.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/reboot.h> 47 48 #include <machine/bus.h> 49 #include <machine/openfirm.h> 50 51 #include <sparc64/sparc64/cache.h> 52 #include <sparc64/dev/iommureg.h> 53 #include <sparc64/dev/iommuvar.h> 54 #include <sparc64/dev/sbusreg.h> 55 #include <dev/sbus/sbusvar.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <machine/autoconf.h> 60 #include <machine/cpu.h> 61 #include <machine/sparc64.h> 62 63 #ifdef DEBUG 64 #define SDB_DVMA 0x1 65 #define SDB_INTR 0x2 66 int sbus_debug = 0; 67 #define DPRINTF(l, s) do { if (sbus_debug & l) printf s; } while (0) 68 #else 69 #define DPRINTF(l, s) 70 #endif 71 72 void sbusreset __P((int)); 73 74 static bus_dma_tag_t sbus_alloc_dmatag __P((struct sbus_softc *)); 75 static int sbus_get_intr __P((struct sbus_softc *, int, 76 struct openprom_intr **, int *, int)); 77 static int sbus_overtemp __P((void *)); 78 static int _sbus_bus_map __P(( 79 bus_space_tag_t, 80 bus_addr_t, /*offset*/ 81 bus_size_t, /*size*/ 82 int, /*flags*/ 83 vaddr_t, /* XXX unused -- compat w/sparc */ 84 bus_space_handle_t *)); 85 static void *sbus_intr_establish __P(( 86 bus_space_tag_t, 87 int, /*Sbus interrupt level*/ 88 int, /*`device class' priority*/ 89 int (*) __P((void *)), /*handler*/ 90 void *, /*handler arg*/ 91 void (*) __P((void)))); /*optional fast trap*/ 92 93 94 /* autoconfiguration driver */ 95 int sbus_match __P((struct device *, struct cfdata *, void *)); 96 void sbus_attach __P((struct device *, struct device *, void *)); 97 98 99 CFATTACH_DECL(sbus, sizeof(struct sbus_softc), 100 sbus_match, sbus_attach, NULL, NULL); 101 102 extern struct cfdriver sbus_cd; 103 104 /* 105 * DVMA routines 106 */ 107 int sbus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 108 bus_size_t, struct proc *, int)); 109 void sbus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 110 int sbus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 111 bus_dma_segment_t *, int, bus_size_t, int)); 112 void sbus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 113 bus_size_t, int)); 114 int sbus_dmamem_alloc __P((bus_dma_tag_t tag, bus_size_t size, 115 bus_size_t alignment, bus_size_t boundary, 116 bus_dma_segment_t *segs, int nsegs, int *rsegs, 117 int flags)); 118 void sbus_dmamem_free __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 119 int nsegs)); 120 int sbus_dmamem_map __P((bus_dma_tag_t tag, bus_dma_segment_t *segs, 121 int nsegs, size_t size, caddr_t *kvap, int flags)); 122 void sbus_dmamem_unmap __P((bus_dma_tag_t tag, caddr_t kva, 123 size_t size)); 124 125 /* 126 * Child devices receive the Sbus interrupt level in their attach 127 * arguments. We translate these to CPU IPLs using the following 128 * tables. Note: obio bus interrupt levels are identical to the 129 * processor IPL. 130 * 131 * The second set of tables is used when the Sbus interrupt level 132 * cannot be had from the PROM as an `interrupt' property. We then 133 * fall back on the `intr' property which contains the CPU IPL. 134 */ 135 136 /* 137 * This value is or'ed into the attach args' interrupt level cookie 138 * if the interrupt level comes from an `intr' property, i.e. it is 139 * not an Sbus interrupt level. 140 */ 141 #define SBUS_INTR_COMPAT 0x80000000 142 143 144 /* 145 * Print the location of some sbus-attached device (called just 146 * before attaching that device). If `sbus' is not NULL, the 147 * device was found but not configured; print the sbus as well. 148 * Return UNCONF (config_find ignores this if the device was configured). 149 */ 150 int 151 sbus_print(args, busname) 152 void *args; 153 const char *busname; 154 { 155 struct sbus_attach_args *sa = args; 156 int i; 157 158 if (busname) 159 aprint_normal("%s at %s", sa->sa_name, busname); 160 aprint_normal(" slot %ld offset 0x%lx", (long)sa->sa_slot, 161 (u_long)sa->sa_offset); 162 for (i = 0; i < sa->sa_nintr; i++) { 163 struct openprom_intr *sbi = &sa->sa_intr[i]; 164 165 aprint_normal(" vector %lx ipl %ld", 166 (u_long)sbi->oi_vec, 167 (long)INTLEV(sbi->oi_pri)); 168 } 169 return (UNCONF); 170 } 171 172 int 173 sbus_match(parent, cf, aux) 174 struct device *parent; 175 struct cfdata *cf; 176 void *aux; 177 { 178 struct mainbus_attach_args *ma = aux; 179 180 return (strcmp(cf->cf_name, ma->ma_name) == 0); 181 } 182 183 /* 184 * Attach an Sbus. 185 */ 186 void 187 sbus_attach(parent, self, aux) 188 struct device *parent; 189 struct device *self; 190 void *aux; 191 { 192 struct sbus_softc *sc = (struct sbus_softc *)self; 193 struct mainbus_attach_args *ma = aux; 194 struct intrhand *ih; 195 int ipl; 196 char *name; 197 int node = ma->ma_node; 198 int node0, error; 199 bus_space_tag_t sbt; 200 struct sbus_attach_args sa; 201 202 sc->sc_bustag = ma->ma_bustag; 203 sc->sc_dmatag = ma->ma_dmatag; 204 sc->sc_ign = ma->ma_interrupts[0] & INTMAP_IGN; 205 206 /* XXXX Use sysio PROM mappings for interrupt vector regs. */ 207 sparc_promaddr_to_handle(sc->sc_bustag, ma->ma_address[0], &sc->sc_bh); 208 sc->sc_sysio = (struct sysioreg *)bus_space_vaddr(sc->sc_bustag, 209 sc->sc_bh); 210 211 #ifdef _LP64 212 /* 213 * 32-bit kernels use virtual addresses for bus space operations 214 * so we may as well use the prom VA. 215 * 216 * 64-bit kernels use physical addresses for bus space operations 217 * so mapping this in again will reduce TLB thrashing. 218 */ 219 if (bus_space_map(sc->sc_bustag, ma->ma_reg[0].ur_paddr, 220 ma->ma_reg[0].ur_len, 0, &sc->sc_bh) != 0) { 221 printf("%s: cannot map registers\n", self->dv_xname); 222 return; 223 } 224 #endif 225 226 /* 227 * Record clock frequency for synchronous SCSI. 228 * IS THIS THE CORRECT DEFAULT?? 229 */ 230 sc->sc_clockfreq = prom_getpropint(node, "clock-frequency", 231 25*1000*1000); 232 printf(": clock = %s MHz\n", clockfreq(sc->sc_clockfreq)); 233 234 sbt = bus_space_tag_alloc(sc->sc_bustag, sc); 235 sbt->type = SBUS_BUS_SPACE; 236 sbt->sparc_bus_map = _sbus_bus_map; 237 sbt->sparc_intr_establish = sbus_intr_establish; 238 239 sc->sc_dmatag = sbus_alloc_dmatag(sc); 240 241 /* 242 * Get the SBus burst transfer size if burst transfers are supported 243 */ 244 sc->sc_burst = prom_getpropint(node, "burst-sizes", 0); 245 246 /* 247 * Collect address translations from the OBP. 248 */ 249 error = prom_getprop(node, "ranges", sizeof(struct openprom_range), 250 &sbt->nranges, &sbt->ranges); 251 if (error) 252 panic("%s: error getting ranges property", sc->sc_dev.dv_xname); 253 254 /* initialize the IOMMU */ 255 256 /* punch in our copies */ 257 sc->sc_is.is_bustag = sc->sc_bustag; 258 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 259 (vaddr_t)&((struct sysioreg *)NULL)->sys_iommu, 260 sizeof (struct iommureg), &sc->sc_is.is_iommu); 261 262 /* initialize our strbuf_ctl */ 263 sc->sc_is.is_sb[0] = &sc->sc_sb; 264 sc->sc_sb.sb_is = &sc->sc_is; 265 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 266 (vaddr_t)&((struct sysioreg *)NULL)->sys_strbuf, 267 sizeof (struct iommu_strbuf), &sc->sc_sb.sb_sb); 268 /* Point sb_flush to our flush buffer. */ 269 sc->sc_sb.sb_flush = &sc->sc_flush; 270 271 /* give us a nice name.. */ 272 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 273 if (name == 0) 274 panic("couldn't malloc iommu name"); 275 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 276 277 iommu_init(name, &sc->sc_is, 0, -1); 278 279 /* Enable the over temp intr */ 280 ih = (struct intrhand *) 281 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 282 ih->ih_map = &sc->sc_sysio->therm_int_map; 283 ih->ih_clr = NULL; /* &sc->sc_sysio->therm_clr_int; */ 284 ih->ih_fun = sbus_overtemp; 285 ipl = 1; 286 ih->ih_pil = (1<<ipl); 287 ih->ih_number = INTVEC(*(ih->ih_map)); 288 intr_establish(ipl, ih); 289 *(ih->ih_map) |= INTMAP_V; 290 291 /* 292 * Note: the stupid SBUS IOMMU ignores the high bits of an address, so a 293 * NULL DMA pointer will be translated by the first page of the IOTSB. 294 * To avoid bugs we'll alloc and ignore the first entry in the IOTSB. 295 */ 296 { 297 u_long dummy; 298 299 if (extent_alloc_subregion(sc->sc_is.is_dvmamap, 300 sc->sc_is.is_dvmabase, sc->sc_is.is_dvmabase + PAGE_SIZE, 301 PAGE_SIZE, PAGE_SIZE, 0, EX_NOWAIT|EX_BOUNDZERO, 302 (u_long *)&dummy) != 0) 303 panic("sbus iommu: can't toss first dvma page"); 304 } 305 306 /* 307 * Loop through ROM children, fixing any relative addresses 308 * and then configuring each device. 309 * `specials' is an array of device names that are treated 310 * specially: 311 */ 312 node0 = OF_child(node); 313 for (node = node0; node; node = OF_peer(node)) { 314 char *name1 = prom_getpropstring(node, "name"); 315 316 if (sbus_setup_attach_args(sc, sbt, sc->sc_dmatag, 317 node, &sa) != 0) { 318 printf("sbus_attach: %s: incomplete\n", name1); 319 continue; 320 } 321 (void) config_found(&sc->sc_dev, (void *)&sa, sbus_print); 322 sbus_destroy_attach_args(&sa); 323 } 324 } 325 326 int 327 sbus_setup_attach_args(sc, bustag, dmatag, node, sa) 328 struct sbus_softc *sc; 329 bus_space_tag_t bustag; 330 bus_dma_tag_t dmatag; 331 int node; 332 struct sbus_attach_args *sa; 333 { 334 /*struct openprom_addr sbusreg;*/ 335 /*int base;*/ 336 int error; 337 int n; 338 339 memset(sa, 0, sizeof(struct sbus_attach_args)); 340 n = 0; 341 error = prom_getprop(node, "name", 1, &n, &sa->sa_name); 342 if (error != 0) 343 return (error); 344 sa->sa_name[n] = '\0'; 345 346 sa->sa_bustag = bustag; 347 sa->sa_dmatag = dmatag; 348 sa->sa_node = node; 349 sa->sa_frequency = sc->sc_clockfreq; 350 351 error = prom_getprop(node, "reg", sizeof(struct openprom_addr), 352 &sa->sa_nreg, &sa->sa_reg); 353 if (error != 0) { 354 char buf[32]; 355 if (error != ENOENT || 356 !node_has_property(node, "device_type") || 357 strcmp(prom_getpropstringA(node, "device_type", buf, sizeof buf), 358 "hierarchical") != 0) 359 return (error); 360 } 361 for (n = 0; n < sa->sa_nreg; n++) { 362 /* Convert to relative addressing, if necessary */ 363 u_int32_t base = sa->sa_reg[n].oa_base; 364 if (SBUS_ABS(base)) { 365 sa->sa_reg[n].oa_space = SBUS_ABS_TO_SLOT(base); 366 sa->sa_reg[n].oa_base = SBUS_ABS_TO_OFFSET(base); 367 } 368 } 369 370 if ((error = sbus_get_intr(sc, node, &sa->sa_intr, &sa->sa_nintr, 371 sa->sa_slot)) != 0) 372 return (error); 373 374 error = prom_getprop(node, "address", sizeof(u_int32_t), 375 &sa->sa_npromvaddrs, &sa->sa_promvaddrs); 376 if (error != 0 && error != ENOENT) 377 return (error); 378 379 return (0); 380 } 381 382 void 383 sbus_destroy_attach_args(sa) 384 struct sbus_attach_args *sa; 385 { 386 if (sa->sa_name != NULL) 387 free(sa->sa_name, M_DEVBUF); 388 389 if (sa->sa_nreg != 0) 390 free(sa->sa_reg, M_DEVBUF); 391 392 if (sa->sa_intr) 393 free(sa->sa_intr, M_DEVBUF); 394 395 if (sa->sa_promvaddrs) 396 free((void *)sa->sa_promvaddrs, M_DEVBUF); 397 398 memset(sa, 0, sizeof(struct sbus_attach_args)); /*DEBUG*/ 399 } 400 401 402 int 403 _sbus_bus_map(t, addr, size, flags, v, hp) 404 bus_space_tag_t t; 405 bus_addr_t addr; 406 bus_size_t size; 407 int flags; 408 vaddr_t v; 409 bus_space_handle_t *hp; 410 { 411 int error; 412 413 if (t->ranges != NULL) { 414 if ((error = bus_space_translate_address_generic( 415 t->ranges, t->nranges, &addr)) != 0) 416 return (error); 417 } 418 419 return (bus_space_map(t->parent, addr, size, flags, hp)); 420 } 421 422 423 bus_addr_t 424 sbus_bus_addr(t, btype, offset) 425 bus_space_tag_t t; 426 u_int btype; 427 u_int offset; 428 { 429 int slot = btype; 430 struct openprom_range *rp; 431 int i; 432 433 for (i = 0; i < t->nranges; i++) { 434 rp = &t->ranges[i]; 435 if (rp->or_child_space != slot) 436 continue; 437 438 return BUS_ADDR(rp->or_parent_space, 439 rp->or_parent_base + offset); 440 } 441 442 return (0); 443 } 444 445 446 /* 447 * Each attached device calls sbus_establish after it initializes 448 * its sbusdev portion. 449 */ 450 void 451 sbus_establish(sd, dev) 452 register struct sbusdev *sd; 453 register struct device *dev; 454 { 455 register struct sbus_softc *sc; 456 register struct device *curdev; 457 458 /* 459 * We have to look for the sbus by name, since it is not necessarily 460 * our immediate parent (i.e. sun4m /iommu/sbus/espdma/esp) 461 * We don't just use the device structure of the above-attached 462 * sbus, since we might (in the future) support multiple sbus's. 463 */ 464 for (curdev = dev->dv_parent; ; curdev = curdev->dv_parent) { 465 if (!curdev || !curdev->dv_xname) 466 panic("sbus_establish: can't find sbus parent for %s", 467 sd->sd_dev->dv_xname 468 ? sd->sd_dev->dv_xname 469 : "<unknown>" ); 470 471 if (strncmp(curdev->dv_xname, "sbus", 4) == 0) 472 break; 473 } 474 sc = (struct sbus_softc *) curdev; 475 476 sd->sd_dev = dev; 477 sd->sd_bchain = sc->sc_sbdev; 478 sc->sc_sbdev = sd; 479 } 480 481 /* 482 * Reset the given sbus. 483 */ 484 void 485 sbusreset(sbus) 486 int sbus; 487 { 488 register struct sbusdev *sd; 489 struct sbus_softc *sc = sbus_cd.cd_devs[sbus]; 490 struct device *dev; 491 492 printf("reset %s:", sc->sc_dev.dv_xname); 493 for (sd = sc->sc_sbdev; sd != NULL; sd = sd->sd_bchain) { 494 if (sd->sd_reset) { 495 dev = sd->sd_dev; 496 (*sd->sd_reset)(dev); 497 printf(" %s", dev->dv_xname); 498 } 499 } 500 /* Reload iommu regs */ 501 iommu_reset(&sc->sc_is); 502 } 503 504 /* 505 * Handle an overtemp situation. 506 * 507 * SPARCs have temperature sensors which generate interrupts 508 * if the machine's temperature exceeds a certain threshold. 509 * This handles the interrupt and powers off the machine. 510 * The same needs to be done to PCI controller drivers. 511 */ 512 int 513 sbus_overtemp(arg) 514 void *arg; 515 { 516 /* Should try a clean shutdown first */ 517 printf("DANGER: OVER TEMPERATURE detected\nShutting down...\n"); 518 delay(20); 519 cpu_reboot(RB_POWERDOWN|RB_HALT, NULL); 520 } 521 522 /* 523 * Get interrupt attributes for an Sbus device. 524 */ 525 int 526 sbus_get_intr(sc, node, ipp, np, slot) 527 struct sbus_softc *sc; 528 int node; 529 struct openprom_intr **ipp; 530 int *np; 531 int slot; 532 { 533 int *ipl; 534 int n, i; 535 char buf[32]; 536 537 /* 538 * The `interrupts' property contains the Sbus interrupt level. 539 */ 540 ipl = NULL; 541 if (prom_getprop(node, "interrupts", sizeof(int), np, &ipl) == 0) { 542 struct openprom_intr *ip; 543 int pri; 544 545 /* Default to interrupt level 2 -- otherwise unused */ 546 pri = INTLEVENCODE(2); 547 548 /* Change format to an `struct sbus_intr' array */ 549 ip = malloc(*np * sizeof(struct openprom_intr), M_DEVBUF, 550 M_NOWAIT); 551 if (ip == NULL) 552 return (ENOMEM); 553 554 /* 555 * Now things get ugly. We need to take this value which is 556 * the interrupt vector number and encode the IPL into it 557 * somehow. Luckily, the interrupt vector has lots of free 558 * space and we can easily stuff the IPL in there for a while. 559 */ 560 prom_getpropstringA(node, "device_type", buf, sizeof buf); 561 if (buf[0] == '\0') 562 prom_getpropstringA(node, "name", buf, sizeof buf); 563 564 for (i = 0; intrmap[i].in_class; i++) 565 if (strcmp(intrmap[i].in_class, buf) == 0) { 566 pri = INTLEVENCODE(intrmap[i].in_lev); 567 break; 568 } 569 570 /* 571 * Sbus card devices need the slot number encoded into 572 * the vector as this is generally not done. 573 */ 574 if ((ipl[0] & INTMAP_OBIO) == 0) 575 pri |= slot << 3; 576 577 for (n = 0; n < *np; n++) { 578 /* 579 * We encode vector and priority into sbi_pri so we 580 * can pass them as a unit. This will go away if 581 * sbus_establish ever takes an sbus_intr instead 582 * of an integer level. 583 * Stuff the real vector in sbi_vec. 584 */ 585 586 ip[n].oi_pri = pri|ipl[n]; 587 ip[n].oi_vec = ipl[n]; 588 } 589 free(ipl, M_DEVBUF); 590 *ipp = ip; 591 } 592 593 return (0); 594 } 595 596 597 /* 598 * Install an interrupt handler for an Sbus device. 599 */ 600 void * 601 sbus_intr_establish(t, pri, level, handler, arg, fastvec) 602 bus_space_tag_t t; 603 int pri; 604 int level; 605 int (*handler) __P((void *)); 606 void *arg; 607 void (*fastvec) __P((void)); /* ignored */ 608 { 609 struct sbus_softc *sc = t->cookie; 610 struct intrhand *ih; 611 int ipl; 612 long vec = pri; 613 614 ih = (struct intrhand *) 615 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 616 if (ih == NULL) 617 return (NULL); 618 619 if ((vec & SBUS_INTR_COMPAT) != 0) 620 ipl = vec & ~SBUS_INTR_COMPAT; 621 else { 622 /* Decode and remove IPL */ 623 ipl = INTLEV(vec); 624 vec = INTVEC(vec); 625 DPRINTF(SDB_INTR, 626 ("\nsbus: intr[%ld]%lx: %lx\nHunting for IRQ...\n", 627 (long)ipl, (long)vec, (u_long)intrlev[vec])); 628 if ((vec & INTMAP_OBIO) == 0) { 629 /* We're in an SBUS slot */ 630 /* Register the map and clear intr registers */ 631 632 int slot = INTSLOT(pri); 633 634 ih->ih_map = &(&sc->sc_sysio->sbus_slot0_int)[slot]; 635 ih->ih_clr = &sc->sc_sysio->sbus0_clr_int[vec]; 636 #ifdef DEBUG 637 if (sbus_debug & SDB_INTR) { 638 int64_t imap = *ih->ih_map; 639 640 printf("SBUS %lx IRQ as %llx in slot %d\n", 641 (long)vec, (long long)imap, slot); 642 printf("\tmap addr %p clr addr %p\n", 643 ih->ih_map, ih->ih_clr); 644 } 645 #endif 646 /* Enable the interrupt */ 647 vec |= INTMAP_V | sc->sc_ign | 648 (CPU_UPAID << INTMAP_TID_SHIFT); 649 *(ih->ih_map) = vec; 650 } else { 651 int64_t *intrptr = &sc->sc_sysio->scsi_int_map; 652 int64_t imap = 0; 653 int i; 654 655 /* Insert IGN */ 656 vec |= sc->sc_ign; 657 for (i = 0; &intrptr[i] <= 658 (int64_t *)&sc->sc_sysio->reserved_int_map && 659 INTVEC(imap = intrptr[i]) != INTVEC(vec); i++) 660 ; 661 if (INTVEC(imap) == INTVEC(vec)) { 662 DPRINTF(SDB_INTR, 663 ("OBIO %lx IRQ as %lx in slot %d\n", 664 vec, (long)imap, i)); 665 /* Register the map and clear intr registers */ 666 ih->ih_map = &intrptr[i]; 667 intrptr = (int64_t *)&sc->sc_sysio->scsi_clr_int; 668 ih->ih_clr = &intrptr[i]; 669 /* Enable the interrupt */ 670 imap |= INTMAP_V; 671 /* XXXX */ 672 *(ih->ih_map) = imap; 673 } else 674 panic("IRQ not found!"); 675 } 676 } 677 #ifdef DEBUG 678 if (sbus_debug & SDB_INTR) { long i; for (i = 0; i < 400000000; i++); } 679 #endif 680 681 ih->ih_fun = handler; 682 ih->ih_arg = arg; 683 ih->ih_number = vec; 684 ih->ih_pil = (1<<ipl); 685 intr_establish(ipl, ih); 686 return (ih); 687 } 688 689 static bus_dma_tag_t 690 sbus_alloc_dmatag(sc) 691 struct sbus_softc *sc; 692 { 693 bus_dma_tag_t sdt, psdt = sc->sc_dmatag; 694 695 sdt = (bus_dma_tag_t) 696 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 697 if (sdt == NULL) 698 /* Panic? */ 699 return (psdt); 700 701 sdt->_cookie = sc; 702 sdt->_parent = psdt; 703 #define PCOPY(x) sdt->x = psdt->x 704 PCOPY(_dmamap_create); 705 PCOPY(_dmamap_destroy); 706 sdt->_dmamap_load = sbus_dmamap_load; 707 PCOPY(_dmamap_load_mbuf); 708 PCOPY(_dmamap_load_uio); 709 sdt->_dmamap_load_raw = sbus_dmamap_load_raw; 710 sdt->_dmamap_unload = sbus_dmamap_unload; 711 sdt->_dmamap_sync = sbus_dmamap_sync; 712 sdt->_dmamem_alloc = sbus_dmamem_alloc; 713 sdt->_dmamem_free = sbus_dmamem_free; 714 sdt->_dmamem_map = sbus_dmamem_map; 715 sdt->_dmamem_unmap = sbus_dmamem_unmap; 716 PCOPY(_dmamem_mmap); 717 #undef PCOPY 718 sc->sc_dmatag = sdt; 719 return (sdt); 720 } 721 722 int 723 sbus_dmamap_load(tag, map, buf, buflen, p, flags) 724 bus_dma_tag_t tag; 725 bus_dmamap_t map; 726 void *buf; 727 bus_size_t buflen; 728 struct proc *p; 729 int flags; 730 { 731 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 732 733 return (iommu_dvmamap_load(tag, &sc->sc_sb, map, buf, buflen, p, flags)); 734 } 735 736 int 737 sbus_dmamap_load_raw(tag, map, segs, nsegs, size, flags) 738 bus_dma_tag_t tag; 739 bus_dmamap_t map; 740 bus_dma_segment_t *segs; 741 int nsegs; 742 bus_size_t size; 743 int flags; 744 { 745 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 746 747 return (iommu_dvmamap_load_raw(tag, &sc->sc_sb, map, segs, nsegs, flags, size)); 748 } 749 750 void 751 sbus_dmamap_unload(tag, map) 752 bus_dma_tag_t tag; 753 bus_dmamap_t map; 754 { 755 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 756 757 iommu_dvmamap_unload(tag, &sc->sc_sb, map); 758 } 759 760 void 761 sbus_dmamap_sync(tag, map, offset, len, ops) 762 bus_dma_tag_t tag; 763 bus_dmamap_t map; 764 bus_addr_t offset; 765 bus_size_t len; 766 int ops; 767 { 768 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 769 770 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 771 /* Flush the CPU then the IOMMU */ 772 bus_dmamap_sync(tag->_parent, map, offset, len, ops); 773 iommu_dvmamap_sync(tag, &sc->sc_sb, map, offset, len, ops); 774 } 775 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 776 /* Flush the IOMMU then the CPU */ 777 iommu_dvmamap_sync(tag, &sc->sc_sb, map, offset, len, ops); 778 bus_dmamap_sync(tag->_parent, map, offset, len, ops); 779 } 780 } 781 782 int 783 sbus_dmamem_alloc(tag, size, alignment, boundary, segs, nsegs, rsegs, flags) 784 bus_dma_tag_t tag; 785 bus_size_t size; 786 bus_size_t alignment; 787 bus_size_t boundary; 788 bus_dma_segment_t *segs; 789 int nsegs; 790 int *rsegs; 791 int flags; 792 { 793 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 794 795 return (iommu_dvmamem_alloc(tag, &sc->sc_sb, size, alignment, boundary, 796 segs, nsegs, rsegs, flags)); 797 } 798 799 void 800 sbus_dmamem_free(tag, segs, nsegs) 801 bus_dma_tag_t tag; 802 bus_dma_segment_t *segs; 803 int nsegs; 804 { 805 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 806 807 iommu_dvmamem_free(tag, &sc->sc_sb, segs, nsegs); 808 } 809 810 int 811 sbus_dmamem_map(tag, segs, nsegs, size, kvap, flags) 812 bus_dma_tag_t tag; 813 bus_dma_segment_t *segs; 814 int nsegs; 815 size_t size; 816 caddr_t *kvap; 817 int flags; 818 { 819 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 820 821 return (iommu_dvmamem_map(tag, &sc->sc_sb, segs, nsegs, size, kvap, flags)); 822 } 823 824 void 825 sbus_dmamem_unmap(tag, kva, size) 826 bus_dma_tag_t tag; 827 caddr_t kva; 828 size_t size; 829 { 830 struct sbus_softc *sc = (struct sbus_softc *)tag->_cookie; 831 832 iommu_dvmamem_unmap(tag, &sc->sc_sb, kva, size); 833 } 834