1 /* $NetBSD: psycho.c,v 1.79 2006/03/08 23:46:24 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Eduardo E. Horvath 5 * Copyright (c) 1999, 2000 Matthew R. Green 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: psycho.c,v 1.79 2006/03/08 23:46:24 lukem Exp $"); 34 35 #include "opt_ddb.h" 36 37 /* 38 * Support for `psycho' and `psycho+' UPA to PCI bridge and 39 * UltraSPARC IIi and IIe `sabre' PCI controllers. 40 */ 41 42 #ifdef DEBUG 43 #define PDB_PROM 0x01 44 #define PDB_BUSMAP 0x02 45 #define PDB_INTR 0x04 46 int psycho_debug = 0x0; 47 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 48 #else 49 #define DPRINTF(l, s) 50 #endif 51 52 #include <sys/param.h> 53 #include <sys/device.h> 54 #include <sys/errno.h> 55 #include <sys/extent.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/time.h> 59 #include <sys/reboot.h> 60 61 #include <uvm/uvm.h> 62 63 #define _SPARC_BUS_DMA_PRIVATE 64 #include <machine/bus.h> 65 #include <machine/autoconf.h> 66 #include <machine/psl.h> 67 68 #include <dev/pci/pcivar.h> 69 #include <dev/pci/pcireg.h> 70 #include <dev/sysmon/sysmon_taskq.h> 71 72 #include <sparc64/dev/iommureg.h> 73 #include <sparc64/dev/iommuvar.h> 74 #include <sparc64/dev/psychoreg.h> 75 #include <sparc64/dev/psychovar.h> 76 #include <sparc64/sparc64/cache.h> 77 78 #include "ioconf.h" 79 80 static pci_chipset_tag_t psycho_alloc_chipset(struct psycho_pbm *, int, 81 pci_chipset_tag_t); 82 static struct extent *psycho_alloc_extent(struct psycho_pbm *, int, int, 83 const char *); 84 static void psycho_get_bus_range(int, int *); 85 static void psycho_get_ranges(int, struct psycho_ranges **, int *); 86 static void psycho_set_intr(struct psycho_softc *, int, void *, uint64_t *, 87 uint64_t *); 88 89 /* Interrupt handlers */ 90 static int psycho_ue(void *); 91 static int psycho_ce(void *); 92 static int psycho_bus_a(void *); 93 static int psycho_bus_b(void *); 94 static int psycho_powerfail(void *); 95 static int psycho_wakeup(void *); 96 97 98 /* IOMMU support */ 99 static void psycho_iommu_init(struct psycho_softc *, int); 100 101 /* 102 * bus space and bus DMA support for UltraSPARC `psycho'. note that most 103 * of the bus DMA support is provided by the iommu dvma controller. 104 */ 105 static int get_childspace(int); 106 static struct psycho_ranges *get_psychorange(struct psycho_pbm *, int); 107 108 static paddr_t psycho_bus_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 109 static int _psycho_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 110 vaddr_t, bus_space_handle_t *); 111 static void *psycho_intr_establish(bus_space_tag_t, int, int, int (*)(void *), 112 void *, void(*)(void)); 113 114 static int psycho_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t, 115 struct proc *, int); 116 static void psycho_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 117 static int psycho_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 118 bus_dma_segment_t *, int, bus_size_t, int); 119 static void psycho_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 120 bus_size_t, int); 121 int psycho_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 122 bus_dma_segment_t *, int, int *, int); 123 void psycho_dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 124 int psycho_dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 125 caddr_t *, int); 126 void psycho_dmamem_unmap(bus_dma_tag_t, caddr_t, size_t); 127 128 /* base pci_chipset */ 129 extern struct sparc_pci_chipset _sparc_pci_chipset; 130 131 /* power button handlers */ 132 static void psycho_register_power_button(struct psycho_softc *sc); 133 static void psycho_power_button_pressed(void *arg); 134 135 /* 136 * autoconfiguration 137 */ 138 static int psycho_match(struct device *, struct cfdata *, void *); 139 static void psycho_attach(struct device *, struct device *, void *); 140 static int psycho_print(void *aux, const char *p); 141 142 CFATTACH_DECL(psycho, sizeof(struct psycho_softc), 143 psycho_match, psycho_attach, NULL, NULL); 144 145 /* 146 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 147 * single PCI bus and does not have a streaming buffer. It often has an APB 148 * (advanced PCI bridge) connected to it, which was designed specifically for 149 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 150 * appears as two "simba"'s underneath the sabre. 151 * 152 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 153 * and manages two PCI buses. "psycho" has two 64-bit 33 MHz buses, while 154 * "psycho+" controls both a 64-bit 33 MHz and a 64-bit 66 MHz PCI bus. You 155 * will usually find a "psycho+" since I don't think the original "psycho" 156 * ever shipped, and if it did it would be in the U30. 157 * 158 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 159 * both part of the same IC, they only have a single register space. As such, 160 * they need to be configured together, even though the autoconfiguration will 161 * attach them separately. 162 * 163 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 164 * as pci1 and pci2, although they have been implemented with other PCI bus 165 * numbers on some machines. 166 * 167 * On UltraII machines, there can be any number of "psycho+" ICs, each 168 * providing two PCI buses. 169 * 170 * 171 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 172 * the values of the following interrupts in this order: 173 * 174 * PCI Bus Error (30) 175 * DMA UE (2e) 176 * DMA CE (2f) 177 * Power Fail (25) 178 * 179 * We really should attach handlers for each. 180 * 181 */ 182 183 #define ROM_PCI_NAME "pci" 184 185 struct psycho_names { 186 const char *p_name; 187 int p_type; 188 } psycho_names[] = { 189 { "SUNW,psycho", PSYCHO_MODE_PSYCHO }, 190 { "pci108e,8000", PSYCHO_MODE_PSYCHO }, 191 { "SUNW,sabre", PSYCHO_MODE_SABRE }, 192 { "pci108e,a000", PSYCHO_MODE_SABRE }, 193 { "pci108e,a001", PSYCHO_MODE_SABRE }, 194 { NULL, 0 } 195 }; 196 197 static int 198 psycho_match(struct device *parent, struct cfdata *match, void *aux) 199 { 200 struct mainbus_attach_args *ma = aux; 201 char *model = prom_getpropstring(ma->ma_node, "model"); 202 int i; 203 204 /* match on a name of "pci" and a sabre or a psycho */ 205 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0) { 206 for (i=0; psycho_names[i].p_name; i++) 207 if (strcmp(model, psycho_names[i].p_name) == 0) 208 return (1); 209 210 model = prom_getpropstring(ma->ma_node, "compatible"); 211 for (i=0; psycho_names[i].p_name; i++) 212 if (strcmp(model, psycho_names[i].p_name) == 0) 213 return (1); 214 } 215 return (0); 216 } 217 218 #ifdef DEBUG 219 static void psycho_dump_intmap(struct psycho_softc *sc); 220 static void 221 psycho_dump_intmap(struct psycho_softc *sc) 222 { 223 volatile uint64_t *intrmapptr = NULL; 224 225 printf("psycho_dump_intmap: OBIO\n"); 226 227 for (intrmapptr = &sc->sc_regs->scsi_int_map; 228 intrmapptr < &sc->sc_regs->ue_int_map; 229 intrmapptr++) 230 printf("%p: %llx\n", intrmapptr, 231 (unsigned long long)*intrmapptr); 232 233 printf("\tintmap:pci\n"); 234 for (intrmapptr = &sc->sc_regs->pcia_slot0_int; 235 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 236 intrmapptr++) 237 printf("%p: %llx\n", intrmapptr, 238 (unsigned long long)*intrmapptr); 239 240 printf("\tintmap:ffb\n"); 241 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 242 intrmapptr <= &sc->sc_regs->ffb1_int_map; 243 intrmapptr++) 244 printf("%p: %llx\n", intrmapptr, 245 (unsigned long long)*intrmapptr); 246 } 247 #endif 248 249 /* 250 * SUNW,psycho initialisation .. 251 * - find the per-psycho registers 252 * - figure out the IGN. 253 * - find our partner psycho 254 * - configure ourselves 255 * - bus range, bus, 256 * - get interrupt-map and interrupt-map-mask 257 * - setup the chipsets. 258 * - if we're the first of the pair, initialise the IOMMU, otherwise 259 * just copy it's tags and addresses. 260 */ 261 static void 262 psycho_attach(struct device *parent, struct device *self, void *aux) 263 { 264 struct psycho_softc *sc = (struct psycho_softc *)self; 265 struct psycho_softc *osc = NULL; 266 struct psycho_pbm *pp; 267 struct pcibus_attach_args pba; 268 struct mainbus_attach_args *ma = aux; 269 bus_space_handle_t bh; 270 uint64_t csr; 271 int psycho_br[2], n, i; 272 bus_space_handle_t pci_ctl; 273 char *model = prom_getpropstring(ma->ma_node, "model"); 274 275 printf("\n"); 276 277 sc->sc_node = ma->ma_node; 278 sc->sc_bustag = ma->ma_bustag; 279 sc->sc_dmatag = ma->ma_dmatag; 280 281 /* 282 * Identify the device. 283 */ 284 for (i=0; psycho_names[i].p_name; i++) 285 if (strcmp(model, psycho_names[i].p_name) == 0) { 286 sc->sc_mode = psycho_names[i].p_type; 287 goto found; 288 } 289 290 model = prom_getpropstring(ma->ma_node, "compatible"); 291 for (i=0; psycho_names[i].p_name; i++) 292 if (strcmp(model, psycho_names[i].p_name) == 0) { 293 sc->sc_mode = psycho_names[i].p_type; 294 goto found; 295 } 296 297 panic("unknown psycho model %s", model); 298 found: 299 300 /* 301 * The psycho gets three register banks: 302 * (0) per-PBM configuration and status registers 303 * (1) per-PBM PCI configuration space, containing only the 304 * PBM 256-byte PCI header 305 * (2) the shared psycho configuration registers (struct psychoreg) 306 */ 307 308 /* Register layouts are different. stuupid. */ 309 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 310 sc->sc_basepaddr = (paddr_t)ma->ma_reg[2].ur_paddr; 311 312 if (ma->ma_naddress > 2) { 313 sparc_promaddr_to_handle(sc->sc_bustag, 314 ma->ma_address[2], &sc->sc_bh); 315 sparc_promaddr_to_handle(sc->sc_bustag, 316 ma->ma_address[0], &pci_ctl); 317 318 sc->sc_regs = (struct psychoreg *) 319 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 320 } else if (ma->ma_nreg > 2) { 321 322 /* We need to map this in ourselves. */ 323 if (bus_space_map(sc->sc_bustag, 324 ma->ma_reg[2].ur_paddr, 325 ma->ma_reg[2].ur_len, BUS_SPACE_MAP_LINEAR, 326 &sc->sc_bh)) 327 panic("psycho_attach: cannot map regs"); 328 sc->sc_regs = (struct psychoreg *) 329 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 330 331 if (bus_space_map(sc->sc_bustag, 332 ma->ma_reg[0].ur_paddr, 333 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 334 &pci_ctl)) 335 panic("psycho_attach: cannot map ctl"); 336 } else 337 panic("psycho_attach: %d not enough registers", 338 ma->ma_nreg); 339 340 } else { 341 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 342 343 if (ma->ma_naddress) { 344 sparc_promaddr_to_handle(sc->sc_bustag, 345 ma->ma_address[0], &sc->sc_bh); 346 sc->sc_regs = (struct psychoreg *) 347 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 348 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 349 offsetof(struct psychoreg, psy_pcictl), 350 sizeof(struct pci_ctl), &pci_ctl); 351 } else if (ma->ma_nreg) { 352 353 /* We need to map this in ourselves. */ 354 if (bus_space_map(sc->sc_bustag, 355 ma->ma_reg[0].ur_paddr, 356 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 357 &sc->sc_bh)) 358 panic("psycho_attach: cannot map regs"); 359 sc->sc_regs = (struct psychoreg *) 360 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 361 362 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 363 offsetof(struct psychoreg, psy_pcictl), 364 sizeof(struct pci_ctl), &pci_ctl); 365 } else 366 panic("psycho_attach: %d not enough registers", 367 ma->ma_nreg); 368 } 369 370 371 csr = bus_space_read_8(sc->sc_bustag, sc->sc_bh, 372 offsetof(struct psychoreg, psy_csr)); 373 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 374 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 375 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 376 377 printf("%s: impl %d, version %d: ign %x ", 378 model, PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr), 379 sc->sc_ign); 380 /* 381 * Match other psycho's that are already configured against 382 * the base physical address. This will be the same for a 383 * pair of devices that share register space. 384 */ 385 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 386 387 struct psycho_softc *asc = 388 (struct psycho_softc *)psycho_cd.cd_devs[n]; 389 390 if (asc == NULL || asc == sc) 391 /* This entry is not there or it is me */ 392 continue; 393 394 if (asc->sc_basepaddr != sc->sc_basepaddr) 395 /* This is an unrelated psycho */ 396 continue; 397 398 /* Found partner */ 399 osc = asc; 400 break; 401 } 402 403 404 /* Oh, dear. OK, lets get started */ 405 406 /* 407 * Setup the PCI control register 408 */ 409 csr = bus_space_read_8(sc->sc_bustag, pci_ctl, 410 offsetof(struct pci_ctl, pci_csr)); 411 csr |= PCICTL_MRLM | 412 PCICTL_ARB_PARK | 413 PCICTL_ERRINTEN | 414 PCICTL_4ENABLE; 415 csr &= ~(PCICTL_SERR | 416 PCICTL_CPU_PRIO | 417 PCICTL_ARB_PRIO | 418 PCICTL_RTRYWAIT); 419 bus_space_write_8(sc->sc_bustag, pci_ctl, 420 offsetof(struct pci_ctl, pci_csr), csr); 421 422 423 /* 424 * Allocate our psycho_pbm 425 */ 426 pp = sc->sc_psycho_this = malloc(sizeof *pp, M_DEVBUF, 427 M_NOWAIT | M_ZERO); 428 if (pp == NULL) 429 panic("could not allocate psycho pbm"); 430 431 pp->pp_sc = sc; 432 433 /* grab the psycho ranges */ 434 psycho_get_ranges(sc->sc_node, &pp->pp_range, &pp->pp_nrange); 435 436 /* get the bus-range for the psycho */ 437 psycho_get_bus_range(sc->sc_node, psycho_br); 438 439 pba.pba_bus = psycho_br[0]; 440 pba.pba_bridgetag = NULL; 441 pp->pp_busmax = psycho_br[1]; 442 443 printf("bus range %u to %u", psycho_br[0], psycho_br[1]); 444 printf("; PCI bus %d", psycho_br[0]); 445 446 pp->pp_pcictl = pci_ctl; 447 448 /* allocate our tags */ 449 pp->pp_memt = psycho_alloc_mem_tag(pp); 450 pp->pp_iot = psycho_alloc_io_tag(pp); 451 pp->pp_dmat = psycho_alloc_dma_tag(pp); 452 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 453 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 454 455 /* allocate a chipset for this */ 456 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 457 458 /* setup the rest of the psycho pbm */ 459 pba.pba_pc = psycho_alloc_chipset(pp, sc->sc_node, pp->pp_pc); 460 461 switch((ma->ma_reg[0].ur_paddr) & 0xf000) { 462 case 0x2000: 463 pp->pp_id = PSYCHO_PBM_A; 464 break; 465 case 0x4000: 466 pp->pp_id = PSYCHO_PBM_B; 467 break; 468 } 469 470 printf("\n"); 471 472 /* allocate extents for free bus space */ 473 pp->pp_exmem = psycho_alloc_extent(pp, sc->sc_node, 0x02, "psycho mem"); 474 pp->pp_exio = psycho_alloc_extent(pp, sc->sc_node, 0x01, "psycho io"); 475 476 #ifdef DEBUG 477 if (psycho_debug & PDB_INTR) 478 psycho_dump_intmap(sc); 479 #endif 480 481 /* 482 * And finally, if we're a sabre or the first of a pair of psycho's to 483 * arrive here, start up the IOMMU and get a config space tag. 484 */ 485 if (osc == NULL) { 486 uint64_t timeo; 487 488 /* 489 * Establish handlers for interesting interrupts.... 490 * 491 * XXX We need to remember these and remove this to support 492 * hotplug on the UPA/FHC bus. 493 * 494 * XXX Not all controllers have these, but installing them 495 * is better than trying to sort through this mess. 496 */ 497 psycho_set_intr(sc, 15, psycho_ue, 498 &sc->sc_regs->ue_int_map, 499 &sc->sc_regs->ue_clr_int); 500 psycho_set_intr(sc, 1, psycho_ce, 501 &sc->sc_regs->ce_int_map, 502 &sc->sc_regs->ce_clr_int); 503 psycho_set_intr(sc, 15, psycho_bus_a, 504 &sc->sc_regs->pciaerr_int_map, 505 &sc->sc_regs->pciaerr_clr_int); 506 psycho_set_intr(sc, 15, psycho_powerfail, 507 &sc->sc_regs->power_int_map, 508 &sc->sc_regs->power_clr_int); 509 psycho_register_power_button(sc); 510 if (sc->sc_mode != PSYCHO_MODE_SABRE) { 511 /* sabre doesn't have these interrupts */ 512 psycho_set_intr(sc, 15, psycho_bus_b, 513 &sc->sc_regs->pciberr_int_map, 514 &sc->sc_regs->pciberr_clr_int); 515 psycho_set_intr(sc, 1, psycho_wakeup, 516 &sc->sc_regs->pwrmgt_int_map, 517 &sc->sc_regs->pwrmgt_clr_int); 518 } 519 520 /* 521 * Apparently a number of machines with psycho and psycho+ 522 * controllers have interrupt latency issues. We'll try 523 * setting the interrupt retry timeout to 0xff which gives us 524 * a retry of 3-6 usec (which is what sysio is set to) for the 525 * moment, which seems to help alleviate this problem. 526 */ 527 timeo = sc->sc_regs->intr_retry_timer; 528 if (timeo > 0xfff) { 529 #ifdef DEBUG 530 printf("decreasing interrupt retry timeout " 531 "from %lx to 0xff\n", (long)timeo); 532 #endif 533 sc->sc_regs->intr_retry_timer = 0xff; 534 } 535 536 /* 537 * Allocate bus node, this contains a prom node per bus. 538 */ 539 pp->pp_busnode = malloc(sizeof(*pp->pp_busnode), M_DEVBUF, 540 M_NOWAIT | M_ZERO); 541 if (pp->pp_busnode == NULL) 542 panic("psycho_attach: malloc pp->pp_busnode"); 543 544 /* 545 * Setup IOMMU and PCI configuration if we're the first 546 * of a pair of psycho's to arrive here. 547 * 548 * We should calculate a TSB size based on amount of RAM 549 * and number of bus controllers and number an type of 550 * child devices. 551 * 552 * For the moment, 32KB should be more than enough. 553 */ 554 sc->sc_is = malloc(sizeof(struct iommu_state), 555 M_DEVBUF, M_NOWAIT); 556 if (sc->sc_is == NULL) 557 panic("psycho_attach: malloc iommu_state"); 558 559 /* Point the strbuf_ctl at the iommu_state */ 560 pp->pp_sb.sb_is = sc->sc_is; 561 562 sc->sc_is->is_sb[0] = sc->sc_is->is_sb[1] = NULL; 563 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 564 struct strbuf_ctl *sb = &pp->pp_sb; 565 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 566 567 /* 568 * Initialize the strbuf_ctl. 569 * 570 * The flush sync buffer must be 64-byte aligned. 571 */ 572 sb->sb_flush = (void *)(va & ~0x3f); 573 574 bus_space_subregion(sc->sc_bustag, pci_ctl, 575 offsetof(struct pci_ctl, pci_strbuf), 576 sizeof (struct iommu_strbuf), &sb->sb_sb); 577 578 /* Point our iommu at the strbuf_ctl */ 579 sc->sc_is->is_sb[0] = sb; 580 } 581 582 psycho_iommu_init(sc, 2); 583 584 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 585 586 /* 587 * XXX This is a really ugly hack because PCI config space 588 * is explicitly handled with unmapped accesses. 589 */ 590 i = sc->sc_bustag->type; 591 sc->sc_bustag->type = PCI_CONFIG_BUS_SPACE; 592 if (bus_space_map(sc->sc_bustag, sc->sc_basepaddr + 0x01000000, 593 0x01000000, 0, &bh)) 594 panic("could not map psycho PCI configuration space"); 595 sc->sc_bustag->type = i; 596 sc->sc_configaddr = bh; 597 } else { 598 /* Share bus numbers with the pair of mine */ 599 pp->pp_busnode = osc->sc_psycho_this->pp_busnode; 600 601 /* Just copy IOMMU state, config tag and address */ 602 sc->sc_is = osc->sc_is; 603 sc->sc_configtag = osc->sc_configtag; 604 sc->sc_configaddr = osc->sc_configaddr; 605 606 /* Point the strbuf_ctl at the iommu_state */ 607 pp->pp_sb.sb_is = sc->sc_is; 608 609 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 610 struct strbuf_ctl *sb = &pp->pp_sb; 611 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 612 613 /* 614 * Initialize the strbuf_ctl. 615 * 616 * The flush sync buffer must be 64-byte aligned. 617 */ 618 sb->sb_flush = (void *)(va & ~0x3f); 619 620 bus_space_subregion(sc->sc_bustag, pci_ctl, 621 offsetof(struct pci_ctl, pci_strbuf), 622 sizeof (struct iommu_strbuf), &sb->sb_sb); 623 624 /* Point our iommu at the strbuf_ctl */ 625 sc->sc_is->is_sb[1] = sb; 626 } 627 iommu_reset(sc->sc_is); 628 } 629 630 /* 631 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 632 */ 633 pba.pba_flags = sc->sc_psycho_this->pp_flags; 634 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 635 pba.pba_dmat64 = NULL; 636 pba.pba_iot = sc->sc_psycho_this->pp_iot; 637 pba.pba_memt = sc->sc_psycho_this->pp_memt; 638 639 config_found_ia(self, "pcibus", &pba, psycho_print); 640 } 641 642 static int 643 psycho_print(void *aux, const char *p) 644 { 645 646 if (p == NULL) 647 return (UNCONF); 648 return (QUIET); 649 } 650 651 static void 652 psycho_set_intr(struct psycho_softc *sc, int ipl, void *handler, 653 uint64_t *mapper, uint64_t *clearer) 654 { 655 struct intrhand *ih; 656 657 ih = (struct intrhand *)malloc(sizeof(struct intrhand), 658 M_DEVBUF, M_NOWAIT); 659 ih->ih_arg = sc; 660 ih->ih_map = mapper; 661 ih->ih_clr = clearer; 662 ih->ih_fun = handler; 663 ih->ih_pil = (1<<ipl); 664 ih->ih_number = INTVEC(*(ih->ih_map)); 665 intr_establish(ipl, ih); 666 *(ih->ih_map) |= INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT); 667 } 668 669 /* 670 * power button handlers 671 */ 672 static void 673 psycho_register_power_button(struct psycho_softc *sc) 674 { 675 sysmon_task_queue_init(); 676 677 sc->sc_powerpressed = 0; 678 sc->sc_smcontext = malloc(sizeof(struct sysmon_pswitch), M_DEVBUF, 0); 679 if (!sc->sc_smcontext) { 680 printf("%s: could not allocate power button context\n", 681 sc->sc_dev.dv_xname); 682 return; 683 } 684 memset(sc->sc_smcontext, 0, sizeof(struct sysmon_pswitch)); 685 sc->sc_smcontext->smpsw_name = sc->sc_dev.dv_xname; 686 sc->sc_smcontext->smpsw_type = PSWITCH_TYPE_POWER; 687 if (sysmon_pswitch_register(sc->sc_smcontext) != 0) 688 printf("%s: unable to register power button with sysmon\n", 689 sc->sc_dev.dv_xname); 690 } 691 692 static void 693 psycho_power_button_pressed(void *arg) 694 { 695 struct psycho_softc *sc = arg; 696 697 sysmon_pswitch_event(sc->sc_smcontext, PSWITCH_EVENT_PRESSED); 698 sc->sc_powerpressed = 0; 699 } 700 701 /* 702 * PCI bus support 703 */ 704 705 /* 706 * allocate a PCI chipset tag and set it's cookie. 707 */ 708 static pci_chipset_tag_t 709 psycho_alloc_chipset(struct psycho_pbm *pp, int node, pci_chipset_tag_t pc) 710 { 711 pci_chipset_tag_t npc; 712 713 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 714 if (npc == NULL) 715 panic("could not allocate pci_chipset_tag_t"); 716 memcpy(npc, pc, sizeof *pc); 717 npc->cookie = pp; 718 npc->rootnode = node; 719 720 return (npc); 721 } 722 723 /* 724 * create extent for free bus space, then allocate assigned regions. 725 */ 726 static struct extent * 727 psycho_alloc_extent(struct psycho_pbm *pp, int node, int ss, const char *name) 728 { 729 struct psycho_registers *pa = NULL; 730 struct psycho_ranges *pr; 731 struct extent *ex; 732 bus_addr_t baddr, addr; 733 bus_size_t bsize, size; 734 int i, num; 735 736 /* get bus space size */ 737 pr = get_psychorange(pp, ss); 738 if (pr == NULL) { 739 printf("psycho_alloc_extent: get_psychorange failed\n"); 740 return NULL; 741 } 742 baddr = 0x00000000; 743 bsize = BUS_ADDR(pr->size_hi, pr->size_lo); 744 745 /* get available lists */ 746 num = 0; 747 if (prom_getprop(node, "available", sizeof(*pa), &num, &pa)) { 748 printf("psycho_alloc_extent: prom_getprop failed\n"); 749 return NULL; 750 } 751 752 /* create extent */ 753 ex = extent_create(name, baddr, bsize - baddr - 1, M_DEVBUF, 0, 0, 754 EX_NOWAIT); 755 if (ex == NULL) { 756 printf("psycho_alloc_extent: extent_create failed\n"); 757 goto ret; 758 } 759 760 /* allocate assigned regions */ 761 for (i = 0; i < num; i++) 762 if (((pa[i].phys_hi >> 24) & 0x03) == ss) { 763 /* allocate bus space */ 764 addr = BUS_ADDR(pa[i].phys_mid, pa[i].phys_lo); 765 size = BUS_ADDR(pa[i].size_hi, pa[i].size_lo); 766 if (extent_alloc_region(ex, baddr, addr - baddr, 767 EX_NOWAIT)) { 768 printf("psycho_alloc_extent: " 769 "extent_alloc_region %" PRIx64 "-%" 770 PRIx64 " failed\n", baddr, addr); 771 extent_destroy(ex); 772 ex = NULL; 773 goto ret; 774 } 775 baddr = addr + size; 776 } 777 /* allocate left region if available */ 778 if (baddr < bsize) 779 if (extent_alloc_region(ex, baddr, bsize - baddr, EX_NOWAIT)) { 780 printf("psycho_alloc_extent: extent_alloc_region %" 781 PRIx64 "-%" PRIx64 " failed\n", baddr, bsize); 782 extent_destroy(ex); 783 ex = NULL; 784 goto ret; 785 } 786 787 #ifdef DEBUG 788 /* print extent */ 789 extent_print(ex); 790 #endif 791 792 ret: 793 /* return extent */ 794 free(pa, M_DEVBUF); 795 return ex; 796 } 797 798 /* 799 * grovel the OBP for various psycho properties 800 */ 801 static void 802 psycho_get_bus_range(int node, int *brp) 803 { 804 int n, error; 805 806 n = 2; 807 error = prom_getprop(node, "bus-range", sizeof(*brp), &n, &brp); 808 if (error) 809 panic("could not get psycho bus-range, error %d", error); 810 if (n != 2) 811 panic("broken psycho bus-range"); 812 DPRINTF(PDB_PROM, ("psycho debug: got `bus-range' for node %08x: %u - %u\n", 813 node, brp[0], brp[1])); 814 } 815 816 static void 817 psycho_get_ranges(int node, struct psycho_ranges **rp, int *np) 818 { 819 820 if (prom_getprop(node, "ranges", sizeof(**rp), np, rp)) 821 panic("could not get psycho ranges"); 822 DPRINTF(PDB_PROM, ("psycho debug: got `ranges' for node %08x: %d entries\n", node, *np)); 823 } 824 825 /* 826 * Interrupt handlers. 827 */ 828 829 static int 830 psycho_ue(void *arg) 831 { 832 struct psycho_softc *sc = (struct psycho_softc *)arg; 833 struct psychoreg *regs = sc->sc_regs; 834 long long afsr = regs->psy_ue_afsr; 835 long long afar = regs->psy_ue_afar; 836 long size = PAGE_SIZE<<(sc->sc_is->is_tsbsize); 837 struct iommu_state *is = sc->sc_is; 838 char bits[128]; 839 840 /* 841 * It's uncorrectable. Dump the regs and panic. 842 */ 843 printf("%s: uncorrectable DMA error AFAR %llx pa %llx AFSR %llx:\n%s\n", 844 sc->sc_dev.dv_xname, afar, 845 (long long)iommu_extract(is, (vaddr_t)afar), afsr, 846 bitmask_snprintf(afsr, PSYCHO_UE_AFSR_BITS, 847 bits, sizeof(bits))); 848 849 /* Sometimes the AFAR points to an IOTSB entry */ 850 if (afar >= is->is_ptsb && afar < is->is_ptsb + size) { 851 printf("IOVA %llx IOTTE %llx\n", 852 (long long)((afar - is->is_ptsb) * PAGE_SIZE + is->is_dvmabase), 853 (long long)ldxa(afar, ASI_PHYS_CACHED)); 854 } 855 #ifdef DDB 856 Debugger(); 857 #endif 858 regs->psy_ue_afar = 0; 859 regs->psy_ue_afsr = 0; 860 return (1); 861 } 862 static int 863 psycho_ce(void *arg) 864 { 865 struct psycho_softc *sc = (struct psycho_softc *)arg; 866 struct psychoreg *regs = sc->sc_regs; 867 868 /* 869 * It's correctable. Dump the regs and continue. 870 */ 871 872 printf("%s: correctable DMA error AFAR %llx AFSR %llx\n", 873 sc->sc_dev.dv_xname, 874 (long long)regs->psy_ce_afar, (long long)regs->psy_ce_afsr); 875 return (1); 876 } 877 static int 878 psycho_bus_a(void *arg) 879 { 880 struct psycho_softc *sc = (struct psycho_softc *)arg; 881 struct psychoreg *regs = sc->sc_regs; 882 883 /* 884 * It's uncorrectable. Dump the regs and panic. 885 */ 886 887 panic("%s: PCI bus A error AFAR %llx AFSR %llx", 888 sc->sc_dev.dv_xname, 889 (long long)regs->psy_pcictl[0].pci_afar, 890 (long long)regs->psy_pcictl[0].pci_afsr); 891 return (1); 892 } 893 static int 894 psycho_bus_b(void *arg) 895 { 896 struct psycho_softc *sc = (struct psycho_softc *)arg; 897 struct psychoreg *regs = sc->sc_regs; 898 899 /* 900 * It's uncorrectable. Dump the regs and panic. 901 */ 902 903 panic("%s: PCI bus B error AFAR %llx AFSR %llx", 904 sc->sc_dev.dv_xname, 905 (long long)regs->psy_pcictl[0].pci_afar, 906 (long long)regs->psy_pcictl[0].pci_afsr); 907 return (1); 908 } 909 910 static int 911 psycho_powerfail(void *arg) 912 { 913 struct psycho_softc *sc = (struct psycho_softc *)arg; 914 915 /* 916 * We lost power. Queue a callback with thread context to 917 * handle all the real work. 918 */ 919 if (sc->sc_powerpressed == 0 && sc->sc_smcontext != NULL) { 920 sc->sc_powerpressed = 1; 921 sysmon_task_queue_sched(0, psycho_power_button_pressed, sc); 922 } 923 return (1); 924 } 925 926 static 927 int psycho_wakeup(void *arg) 928 { 929 struct psycho_softc *sc = (struct psycho_softc *)arg; 930 931 /* 932 * Gee, we don't really have a framework to deal with this 933 * properly. 934 */ 935 printf("%s: power management wakeup\n", sc->sc_dev.dv_xname); 936 return (1); 937 } 938 939 940 941 /* 942 * initialise the IOMMU.. 943 */ 944 void 945 psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 946 { 947 char *name; 948 struct iommu_state *is = sc->sc_is; 949 uint32_t iobase = -1; 950 int *vdma = NULL; 951 int nitem; 952 953 /* punch in our copies */ 954 is->is_bustag = sc->sc_bustag; 955 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 956 offsetof(struct psychoreg, psy_iommu), 957 sizeof (struct iommureg), 958 &is->is_iommu); 959 960 /* 961 * Separate the men from the boys. Get the `virtual-dma' 962 * property for sabre and use that to make sure the damn 963 * iommu works. 964 * 965 * We could query the `#virtual-dma-size-cells' and 966 * `#virtual-dma-addr-cells' and DTRT, but I'm lazy. 967 */ 968 nitem = 0; 969 if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 970 &vdma)) { 971 /* Damn. Gotta use these values. */ 972 iobase = vdma[0]; 973 #define TSBCASE(x) case 1<<((x)+23): tsbsize = (x); break 974 switch (vdma[1]) { 975 TSBCASE(1); TSBCASE(2); TSBCASE(3); 976 TSBCASE(4); TSBCASE(5); TSBCASE(6); 977 default: 978 printf("bogus tsb size %x, using 7\n", vdma[1]); 979 TSBCASE(7); 980 } 981 #undef TSBCASE 982 } 983 984 /* give us a nice name.. */ 985 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 986 if (name == 0) 987 panic("couldn't malloc iommu name"); 988 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 989 990 iommu_init(name, is, tsbsize, iobase); 991 } 992 993 /* 994 * below here is bus space and bus DMA support 995 */ 996 bus_space_tag_t 997 psycho_alloc_bus_tag(struct psycho_pbm *pp, int type) 998 { 999 struct psycho_softc *sc = pp->pp_sc; 1000 bus_space_tag_t bt; 1001 1002 bt = (bus_space_tag_t) 1003 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 1004 if (bt == NULL) 1005 panic("could not allocate psycho bus tag"); 1006 1007 memset(bt, 0, sizeof *bt); 1008 bt->cookie = pp; 1009 bt->parent = sc->sc_bustag; 1010 bt->type = type; 1011 bt->sparc_bus_map = _psycho_bus_map; 1012 bt->sparc_bus_mmap = psycho_bus_mmap; 1013 bt->sparc_intr_establish = psycho_intr_establish; 1014 return (bt); 1015 } 1016 1017 bus_dma_tag_t 1018 psycho_alloc_dma_tag(struct psycho_pbm *pp) 1019 { 1020 struct psycho_softc *sc = pp->pp_sc; 1021 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 1022 1023 dt = (bus_dma_tag_t) 1024 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 1025 if (dt == NULL) 1026 panic("could not allocate psycho DMA tag"); 1027 1028 memset(dt, 0, sizeof *dt); 1029 dt->_cookie = pp; 1030 dt->_parent = pdt; 1031 #define PCOPY(x) dt->x = pdt->x 1032 PCOPY(_dmamap_create); 1033 PCOPY(_dmamap_destroy); 1034 dt->_dmamap_load = psycho_dmamap_load; 1035 PCOPY(_dmamap_load_mbuf); 1036 PCOPY(_dmamap_load_uio); 1037 dt->_dmamap_load_raw = psycho_dmamap_load_raw; 1038 dt->_dmamap_unload = psycho_dmamap_unload; 1039 dt->_dmamap_sync = psycho_dmamap_sync; 1040 dt->_dmamem_alloc = psycho_dmamem_alloc; 1041 dt->_dmamem_free = psycho_dmamem_free; 1042 dt->_dmamem_map = psycho_dmamem_map; 1043 dt->_dmamem_unmap = psycho_dmamem_unmap; 1044 PCOPY(_dmamem_mmap); 1045 #undef PCOPY 1046 return (dt); 1047 } 1048 1049 /* 1050 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 1051 * PCI physical addresses. 1052 */ 1053 1054 static int 1055 get_childspace(int type) 1056 { 1057 int ss; 1058 1059 switch (type) { 1060 case PCI_CONFIG_BUS_SPACE: 1061 ss = 0x00; 1062 break; 1063 case PCI_IO_BUS_SPACE: 1064 ss = 0x01; 1065 break; 1066 case PCI_MEMORY_BUS_SPACE: 1067 ss = 0x02; 1068 break; 1069 #if 0 1070 /* we don't do 64 bit memory space */ 1071 case PCI_MEMORY64_BUS_SPACE: 1072 ss = 0x03; 1073 break; 1074 #endif 1075 default: 1076 panic("get_childspace: unknown bus type"); 1077 } 1078 1079 return (ss); 1080 } 1081 1082 static struct psycho_ranges * 1083 get_psychorange(struct psycho_pbm *pp, int ss) 1084 { 1085 int i; 1086 1087 for (i = 0; i < pp->pp_nrange; i++) { 1088 if (((pp->pp_range[i].cspace >> 24) & 0x03) == ss) 1089 return (&pp->pp_range[i]); 1090 } 1091 /* not found */ 1092 return (NULL); 1093 } 1094 1095 static int 1096 _psycho_bus_map(bus_space_tag_t t, bus_addr_t offset, bus_size_t size, 1097 int flags, vaddr_t unused, bus_space_handle_t *hp) 1098 { 1099 struct psycho_pbm *pp = t->cookie; 1100 struct psycho_softc *sc = pp->pp_sc; 1101 struct psycho_ranges *pr; 1102 bus_addr_t paddr; 1103 int ss; 1104 1105 DPRINTF(PDB_BUSMAP, 1106 ("_psycho_bus_map: type %d off %qx sz %qx flags %d", 1107 t->type, (unsigned long long)offset, 1108 (unsigned long long)size, flags)); 1109 1110 ss = get_childspace(t->type); 1111 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 1112 1113 pr = get_psychorange(pp, ss); 1114 if (pr != NULL) { 1115 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1116 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr " 1117 "space %lx offset %lx paddr %qx\n", 1118 (long)ss, (long)offset, 1119 (unsigned long long)paddr)); 1120 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 1121 flags, 0, hp)); 1122 } 1123 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 1124 return (EINVAL); 1125 } 1126 1127 static paddr_t 1128 psycho_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot, 1129 int flags) 1130 { 1131 bus_addr_t offset = paddr; 1132 struct psycho_pbm *pp = t->cookie; 1133 struct psycho_softc *sc = pp->pp_sc; 1134 struct psycho_ranges *pr; 1135 int ss; 1136 1137 ss = get_childspace(t->type); 1138 1139 DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: prot %x flags %d pa %qx\n", 1140 prot, flags, (unsigned long long)paddr)); 1141 1142 pr = get_psychorange(pp, ss); 1143 if (pr != NULL) { 1144 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1145 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr " 1146 "space %lx offset %lx paddr %qx\n", 1147 (long)ss, (long)offset, 1148 (unsigned long long)paddr)); 1149 return (bus_space_mmap(sc->sc_bustag, paddr, off, 1150 prot, flags)); 1151 } 1152 1153 return (-1); 1154 } 1155 1156 /* 1157 * Get a PCI offset address from bus_space_handle_t. 1158 */ 1159 bus_addr_t 1160 psycho_bus_offset(bus_space_tag_t t, bus_space_handle_t *hp) 1161 { 1162 struct psycho_pbm *pp = t->cookie; 1163 struct psycho_ranges *pr; 1164 bus_addr_t addr, offset; 1165 vaddr_t va; 1166 int ss; 1167 1168 addr = hp->_ptr; 1169 ss = get_childspace(t->type); 1170 DPRINTF(PDB_BUSMAP, ("psycho_bus_offset: type %d addr %" PRIx64 1171 " cspace %d", t->type, addr, ss)); 1172 1173 pr = get_psychorange(pp, ss); 1174 if (pr != NULL) { 1175 if (!PHYS_ASI(hp->_asi)) { 1176 va = trunc_page((vaddr_t)addr); 1177 if (pmap_extract(pmap_kernel(), va, &addr) == FALSE) { 1178 DPRINTF(PDB_BUSMAP, 1179 ("\n pmap_extract FAILED\n")); 1180 return (-1); 1181 } 1182 addr += hp->_ptr & PGOFSET; 1183 } 1184 offset = BUS_ADDR_PADDR(addr) - pr->phys_lo; 1185 DPRINTF(PDB_BUSMAP, ("\npsycho_bus_offset: paddr %" PRIx64 1186 " offset %" PRIx64 "\n", addr, offset)); 1187 return (offset); 1188 } 1189 DPRINTF(PDB_BUSMAP, ("\n FAILED\n")); 1190 return (-1); 1191 } 1192 1193 1194 /* 1195 * install an interrupt handler for a PCI device 1196 */ 1197 void * 1198 psycho_intr_establish(bus_space_tag_t t, int ihandle, int level, 1199 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 1200 { 1201 struct psycho_pbm *pp = t->cookie; 1202 struct psycho_softc *sc = pp->pp_sc; 1203 struct intrhand *ih; 1204 volatile uint64_t *intrmapptr = NULL, *intrclrptr = NULL; 1205 int64_t imap = 0; 1206 int ino; 1207 long vec = INTVEC(ihandle); 1208 1209 ih = (struct intrhand *) 1210 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 1211 if (ih == NULL) 1212 return (NULL); 1213 1214 /* 1215 * Hunt through all the interrupt mapping regs to look for our 1216 * interrupt vector. 1217 * 1218 * XXX We only compare INOs rather than IGNs since the firmware may 1219 * not provide the IGN and the IGN is constant for all device on that 1220 * PCI controller. This could cause problems for the FFB/external 1221 * interrupt which has a full vector that can be set arbitrarily. 1222 */ 1223 1224 DPRINTF(PDB_INTR, ("\npsycho_intr_establish: ihandle %x vec %lx", ihandle, vec)); 1225 ino = INTINO(vec); 1226 DPRINTF(PDB_INTR, (" ino %x", ino)); 1227 1228 /* If the device didn't ask for an IPL, use the one encoded. */ 1229 if (level == IPL_NONE) level = INTLEV(vec); 1230 /* If it still has no level, print a warning and assign IPL 2 */ 1231 if (level == IPL_NONE) { 1232 printf("ERROR: no IPL, setting IPL 2.\n"); 1233 level = 2; 1234 } 1235 1236 DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %p\nHunting for IRQ...\n", 1237 (long)ino, intrlev[ino])); 1238 1239 /* Hunt thru obio first */ 1240 for (intrmapptr = &sc->sc_regs->scsi_int_map, 1241 intrclrptr = &sc->sc_regs->scsi_clr_int; 1242 intrmapptr < &sc->sc_regs->ue_int_map; 1243 intrmapptr++, intrclrptr++) { 1244 if (INTINO(*intrmapptr) == ino) 1245 goto found; 1246 } 1247 1248 /* Now do PCI interrupts */ 1249 for (intrmapptr = &sc->sc_regs->pcia_slot0_int, 1250 intrclrptr = &sc->sc_regs->pcia0_clr_int[0]; 1251 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 1252 intrmapptr++, intrclrptr += 4) { 1253 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 1254 (intrmapptr == &sc->sc_regs->pcia_slot2_int || 1255 intrmapptr == &sc->sc_regs->pcia_slot3_int)) 1256 continue; 1257 if (((*intrmapptr ^ vec) & 0x3c) == 0) { 1258 intrclrptr += vec & 0x3; 1259 goto found; 1260 } 1261 } 1262 1263 /* Finally check the two FFB slots */ 1264 intrclrptr = NULL; /* XXX? */ 1265 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 1266 intrmapptr <= &sc->sc_regs->ffb1_int_map; 1267 intrmapptr++) { 1268 if (INTVEC(*intrmapptr) == ino) 1269 goto found; 1270 } 1271 1272 printf("Cannot find interrupt vector %lx\n", vec); 1273 return (NULL); 1274 1275 found: 1276 /* Register the map and clear intr registers */ 1277 ih->ih_map = intrmapptr; 1278 ih->ih_clr = intrclrptr; 1279 1280 ih->ih_fun = handler; 1281 ih->ih_arg = arg; 1282 ih->ih_pil = level; 1283 ih->ih_number = ino | sc->sc_ign; 1284 1285 DPRINTF(PDB_INTR, ( 1286 "; installing handler %p arg %p with ino %u pil %u\n", 1287 handler, arg, (u_int)ino, (u_int)ih->ih_pil)); 1288 1289 intr_establish(ih->ih_pil, ih); 1290 1291 /* 1292 * Enable the interrupt now we have the handler installed. 1293 * Read the current value as we can't change it besides the 1294 * valid bit so so make sure only this bit is changed. 1295 * 1296 * XXXX --- we really should use bus_space for this. 1297 */ 1298 if (intrmapptr) { 1299 imap = *intrmapptr; 1300 DPRINTF(PDB_INTR, ("; read intrmap = %016qx", 1301 (unsigned long long)imap)); 1302 1303 /* Enable the interrupt */ 1304 imap |= INTMAP_V|(CPU_UPAID << INTMAP_TID_SHIFT); 1305 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 1306 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", 1307 (unsigned long long)imap)); 1308 *intrmapptr = imap; 1309 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", 1310 (unsigned long long)(imap = *intrmapptr))); 1311 } 1312 return (ih); 1313 } 1314 1315 /* 1316 * hooks into the iommu dvma calls. 1317 */ 1318 int 1319 psycho_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, 1320 bus_size_t buflen, struct proc *p, int flags) 1321 { 1322 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1323 1324 return (iommu_dvmamap_load(t, &pp->pp_sb, map, buf, buflen, p, flags)); 1325 } 1326 1327 void 1328 psycho_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map) 1329 { 1330 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1331 1332 iommu_dvmamap_unload(t, &pp->pp_sb, map); 1333 } 1334 1335 int 1336 psycho_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, 1337 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags) 1338 { 1339 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1340 1341 return (iommu_dvmamap_load_raw(t, &pp->pp_sb, map, segs, nsegs, flags, size)); 1342 } 1343 1344 void 1345 psycho_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, 1346 bus_size_t len, int ops) 1347 { 1348 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1349 1350 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 1351 /* Flush the CPU then the IOMMU */ 1352 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1353 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1354 } 1355 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 1356 /* Flush the IOMMU then the CPU */ 1357 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1358 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1359 } 1360 1361 } 1362 1363 int 1364 psycho_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, 1365 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, 1366 int flags) 1367 { 1368 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1369 1370 return (iommu_dvmamem_alloc(t, &pp->pp_sb, size, alignment, boundary, 1371 segs, nsegs, rsegs, flags)); 1372 } 1373 1374 void 1375 psycho_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs) 1376 { 1377 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1378 1379 iommu_dvmamem_free(t, &pp->pp_sb, segs, nsegs); 1380 } 1381 1382 int 1383 psycho_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, 1384 size_t size, caddr_t *kvap, int flags) 1385 { 1386 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1387 1388 return (iommu_dvmamem_map(t, &pp->pp_sb, segs, nsegs, size, kvap, flags)); 1389 } 1390 1391 void 1392 psycho_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size) 1393 { 1394 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1395 1396 iommu_dvmamem_unmap(t, &pp->pp_sb, kva, size); 1397 } 1398