1 /* $NetBSD: psycho.c,v 1.68 2004/01/21 07:16:07 petrov Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Eduardo E. Horvath 5 * Copyright (c) 1999, 2000 Matthew R. Green 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: psycho.c,v 1.68 2004/01/21 07:16:07 petrov Exp $"); 34 35 #include "opt_ddb.h" 36 37 /* 38 * Support for `psycho' and `psycho+' UPA to PCI bridge and 39 * UltraSPARC IIi and IIe `sabre' PCI controllers. 40 */ 41 42 #ifdef DEBUG 43 #define PDB_PROM 0x01 44 #define PDB_BUSMAP 0x02 45 #define PDB_INTR 0x04 46 int psycho_debug = 0x0; 47 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 48 #else 49 #define DPRINTF(l, s) 50 #endif 51 52 #include <sys/param.h> 53 #include <sys/device.h> 54 #include <sys/errno.h> 55 #include <sys/extent.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/time.h> 59 #include <sys/reboot.h> 60 61 #include <uvm/uvm.h> 62 63 #define _SPARC_BUS_DMA_PRIVATE 64 #include <machine/bus.h> 65 #include <machine/autoconf.h> 66 #include <machine/psl.h> 67 68 #include <dev/pci/pcivar.h> 69 #include <dev/pci/pcireg.h> 70 #include <dev/sysmon/sysmon_taskq.h> 71 72 #include <sparc64/dev/iommureg.h> 73 #include <sparc64/dev/iommuvar.h> 74 #include <sparc64/dev/psychoreg.h> 75 #include <sparc64/dev/psychovar.h> 76 #include <sparc64/sparc64/cache.h> 77 78 #include "ioconf.h" 79 80 static pci_chipset_tag_t psycho_alloc_chipset __P((struct psycho_pbm *, int, 81 pci_chipset_tag_t)); 82 static struct extent *psycho_alloc_extent __P((struct psycho_pbm *, int, int, 83 char *)); 84 static void psycho_get_bus_range __P((int, int *)); 85 static void psycho_get_ranges __P((int, struct psycho_ranges **, int *)); 86 static void psycho_set_intr __P((struct psycho_softc *, int, void *, 87 u_int64_t *, u_int64_t *)); 88 89 /* Interrupt handlers */ 90 static int psycho_ue __P((void *)); 91 static int psycho_ce __P((void *)); 92 static int psycho_bus_a __P((void *)); 93 static int psycho_bus_b __P((void *)); 94 static int psycho_powerfail __P((void *)); 95 static int psycho_wakeup __P((void *)); 96 97 98 /* IOMMU support */ 99 static void psycho_iommu_init __P((struct psycho_softc *, int)); 100 101 /* 102 * bus space and bus DMA support for UltraSPARC `psycho'. note that most 103 * of the bus DMA support is provided by the iommu dvma controller. 104 */ 105 static int get_childspace __P((int)); 106 static struct psycho_ranges *get_psychorange __P((struct psycho_pbm *, int)); 107 108 static paddr_t psycho_bus_mmap __P((bus_space_tag_t, bus_addr_t, off_t, 109 int, int)); 110 static int _psycho_bus_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, 111 vaddr_t, bus_space_handle_t *)); 112 static void *psycho_intr_establish __P((bus_space_tag_t, int, int, 113 int (*) __P((void *)), void *, void(*)__P((void)))); 114 115 static int psycho_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 116 bus_size_t, struct proc *, int)); 117 static void psycho_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 118 static int psycho_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 119 bus_dma_segment_t *, int, bus_size_t, int)); 120 static void psycho_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 121 bus_size_t, int)); 122 int psycho_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 123 bus_dma_segment_t *, int, int *, int)); 124 void psycho_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int)); 125 int psycho_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 126 caddr_t *, int)); 127 void psycho_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t)); 128 129 /* base pci_chipset */ 130 extern struct sparc_pci_chipset _sparc_pci_chipset; 131 132 /* power button handlers */ 133 static void psycho_register_power_button(struct psycho_softc *sc); 134 static void psycho_power_button_pressed(void *arg); 135 136 /* 137 * autoconfiguration 138 */ 139 static int psycho_match __P((struct device *, struct cfdata *, void *)); 140 static void psycho_attach __P((struct device *, struct device *, void *)); 141 static int psycho_print __P((void *aux, const char *p)); 142 143 CFATTACH_DECL(psycho, sizeof(struct psycho_softc), 144 psycho_match, psycho_attach, NULL, NULL); 145 146 /* 147 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 148 * single PCI bus and does not have a streaming buffer. It often has an APB 149 * (advanced PCI bridge) connected to it, which was designed specifically for 150 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 151 * appears as two "simba"'s underneath the sabre. 152 * 153 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 154 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while 155 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 156 * will usually find a "psycho+" since I don't think the original "psycho" 157 * ever shipped, and if it did it would be in the U30. 158 * 159 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 160 * both part of the same IC, they only have a single register space. As such, 161 * they need to be configured together, even though the autoconfiguration will 162 * attach them separately. 163 * 164 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 165 * as pci1 and pci2, although they have been implemented with other PCI bus 166 * numbers on some machines. 167 * 168 * On UltraII machines, there can be any number of "psycho+" ICs, each 169 * providing two PCI buses. 170 * 171 * 172 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 173 * the values of the following interrupts in this order: 174 * 175 * PCI Bus Error (30) 176 * DMA UE (2e) 177 * DMA CE (2f) 178 * Power Fail (25) 179 * 180 * We really should attach handlers for each. 181 * 182 */ 183 184 #define ROM_PCI_NAME "pci" 185 186 struct psycho_names { 187 char *p_name; 188 int p_type; 189 } psycho_names[] = { 190 { "SUNW,psycho", PSYCHO_MODE_PSYCHO }, 191 { "pci108e,8000", PSYCHO_MODE_PSYCHO }, 192 { "SUNW,sabre", PSYCHO_MODE_SABRE }, 193 { "pci108e,a000", PSYCHO_MODE_SABRE }, 194 { "pci108e,a001", PSYCHO_MODE_SABRE }, 195 { NULL, 0 } 196 }; 197 198 static int 199 psycho_match(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct mainbus_attach_args *ma = aux; 205 char *model = PROM_getpropstring(ma->ma_node, "model"); 206 int i; 207 208 /* match on a name of "pci" and a sabre or a psycho */ 209 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0) { 210 for (i=0; psycho_names[i].p_name; i++) 211 if (strcmp(model, psycho_names[i].p_name) == 0) 212 return (1); 213 214 model = PROM_getpropstring(ma->ma_node, "compatible"); 215 for (i=0; psycho_names[i].p_name; i++) 216 if (strcmp(model, psycho_names[i].p_name) == 0) 217 return (1); 218 } 219 return (0); 220 } 221 222 #ifdef DEBUG 223 static void psycho_dump_intmap(struct psycho_softc *sc); 224 static void 225 psycho_dump_intmap(struct psycho_softc *sc) 226 { 227 volatile u_int64_t *intrmapptr = NULL; 228 229 printf("psycho_dump_intmap: OBIO\n"); 230 231 for (intrmapptr = &sc->sc_regs->scsi_int_map; 232 intrmapptr < &sc->sc_regs->ue_int_map; 233 intrmapptr++) 234 printf("%p: %lx\n", intrmapptr, *intrmapptr); 235 236 printf("\tintmap:pci\n"); 237 for (intrmapptr = &sc->sc_regs->pcia_slot0_int; 238 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 239 intrmapptr++) 240 printf("%p: %lx\n", intrmapptr, *intrmapptr); 241 242 printf("\tintmap:ffb\n"); 243 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 244 intrmapptr <= &sc->sc_regs->ffb1_int_map; 245 intrmapptr++) 246 printf("%p: %lx\n", intrmapptr, *intrmapptr); 247 } 248 #endif 249 250 /* 251 * SUNW,psycho initialisation .. 252 * - find the per-psycho registers 253 * - figure out the IGN. 254 * - find our partner psycho 255 * - configure ourselves 256 * - bus range, bus, 257 * - get interrupt-map and interrupt-map-mask 258 * - setup the chipsets. 259 * - if we're the first of the pair, initialise the IOMMU, otherwise 260 * just copy it's tags and addresses. 261 */ 262 static void 263 psycho_attach(parent, self, aux) 264 struct device *parent, *self; 265 void *aux; 266 { 267 struct psycho_softc *sc = (struct psycho_softc *)self; 268 struct psycho_softc *osc = NULL; 269 struct psycho_pbm *pp; 270 struct pcibus_attach_args pba; 271 struct mainbus_attach_args *ma = aux; 272 bus_space_handle_t bh; 273 u_int64_t csr; 274 int psycho_br[2], n, i; 275 bus_space_handle_t pci_ctl; 276 char *model = PROM_getpropstring(ma->ma_node, "model"); 277 278 printf("\n"); 279 280 sc->sc_node = ma->ma_node; 281 sc->sc_bustag = ma->ma_bustag; 282 sc->sc_dmatag = ma->ma_dmatag; 283 284 /* 285 * Identify the device. 286 */ 287 for (i=0; psycho_names[i].p_name; i++) 288 if (strcmp(model, psycho_names[i].p_name) == 0) { 289 sc->sc_mode = psycho_names[i].p_type; 290 goto found; 291 } 292 293 model = PROM_getpropstring(ma->ma_node, "compatible"); 294 for (i=0; psycho_names[i].p_name; i++) 295 if (strcmp(model, psycho_names[i].p_name) == 0) { 296 sc->sc_mode = psycho_names[i].p_type; 297 goto found; 298 } 299 300 panic("unknown psycho model %s", model); 301 found: 302 303 /* 304 * The psycho gets three register banks: 305 * (0) per-PBM configuration and status registers 306 * (1) per-PBM PCI configuration space, containing only the 307 * PBM 256-byte PCI header 308 * (2) the shared psycho configuration registers (struct psychoreg) 309 */ 310 311 /* Register layouts are different. stuupid. */ 312 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 313 sc->sc_basepaddr = (paddr_t)ma->ma_reg[2].ur_paddr; 314 315 if (ma->ma_naddress > 2) { 316 sparc_promaddr_to_handle(sc->sc_bustag, 317 ma->ma_address[2], &sc->sc_bh); 318 sparc_promaddr_to_handle(sc->sc_bustag, 319 ma->ma_address[0], &pci_ctl); 320 321 sc->sc_regs = (struct psychoreg *) 322 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 323 } else if (ma->ma_nreg > 2) { 324 325 /* We need to map this in ourselves. */ 326 if (bus_space_map(sc->sc_bustag, 327 ma->ma_reg[2].ur_paddr, 328 ma->ma_reg[2].ur_len, BUS_SPACE_MAP_LINEAR, 329 &sc->sc_bh)) 330 panic("psycho_attach: cannot map regs"); 331 sc->sc_regs = (struct psychoreg *) 332 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 333 334 if (bus_space_map(sc->sc_bustag, 335 ma->ma_reg[0].ur_paddr, 336 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 337 &pci_ctl)) 338 panic("psycho_attach: cannot map ctl"); 339 } else 340 panic("psycho_attach: %d not enough registers", 341 ma->ma_nreg); 342 343 } else { 344 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 345 346 if (ma->ma_naddress) { 347 sparc_promaddr_to_handle(sc->sc_bustag, 348 ma->ma_address[0], &sc->sc_bh); 349 sc->sc_regs = (struct psychoreg *) 350 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 351 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 352 offsetof(struct psychoreg, psy_pcictl), 353 sizeof(struct pci_ctl), &pci_ctl); 354 } else if (ma->ma_nreg) { 355 356 /* We need to map this in ourselves. */ 357 if (bus_space_map(sc->sc_bustag, 358 ma->ma_reg[0].ur_paddr, 359 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 360 &sc->sc_bh)) 361 panic("psycho_attach: cannot map regs"); 362 sc->sc_regs = (struct psychoreg *) 363 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 364 365 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 366 offsetof(struct psychoreg, psy_pcictl), 367 sizeof(struct pci_ctl), &pci_ctl); 368 } else 369 panic("psycho_attach: %d not enough registers", 370 ma->ma_nreg); 371 } 372 373 374 csr = bus_space_read_8(sc->sc_bustag, sc->sc_bh, 375 offsetof(struct psychoreg, psy_csr)); 376 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 377 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 378 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 379 380 printf("%s: impl %d, version %d: ign %x ", 381 model, PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr), 382 sc->sc_ign); 383 /* 384 * Match other psycho's that are already configured against 385 * the base physical address. This will be the same for a 386 * pair of devices that share register space. 387 */ 388 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 389 390 struct psycho_softc *asc = 391 (struct psycho_softc *)psycho_cd.cd_devs[n]; 392 393 if (asc == NULL || asc == sc) 394 /* This entry is not there or it is me */ 395 continue; 396 397 if (asc->sc_basepaddr != sc->sc_basepaddr) 398 /* This is an unrelated psycho */ 399 continue; 400 401 /* Found partner */ 402 osc = asc; 403 break; 404 } 405 406 407 /* Oh, dear. OK, lets get started */ 408 409 /* 410 * Setup the PCI control register 411 */ 412 csr = bus_space_read_8(sc->sc_bustag, pci_ctl, 413 offsetof(struct pci_ctl, pci_csr)); 414 csr |= PCICTL_MRLM | 415 PCICTL_ARB_PARK | 416 PCICTL_ERRINTEN | 417 PCICTL_4ENABLE; 418 csr &= ~(PCICTL_SERR | 419 PCICTL_CPU_PRIO | 420 PCICTL_ARB_PRIO | 421 PCICTL_RTRYWAIT); 422 bus_space_write_8(sc->sc_bustag, pci_ctl, 423 offsetof(struct pci_ctl, pci_csr), csr); 424 425 426 /* 427 * Allocate our psycho_pbm 428 */ 429 pp = sc->sc_psycho_this = malloc(sizeof *pp, M_DEVBUF, 430 M_NOWAIT | M_ZERO); 431 if (pp == NULL) 432 panic("could not allocate psycho pbm"); 433 434 pp->pp_sc = sc; 435 436 /* grab the psycho ranges */ 437 psycho_get_ranges(sc->sc_node, &pp->pp_range, &pp->pp_nrange); 438 439 /* get the bus-range for the psycho */ 440 psycho_get_bus_range(sc->sc_node, psycho_br); 441 442 pba.pba_bus = psycho_br[0]; 443 pba.pba_bridgetag = NULL; 444 pp->pp_busmax = psycho_br[1]; 445 446 printf("bus range %u to %u", psycho_br[0], psycho_br[1]); 447 printf("; PCI bus %d", psycho_br[0]); 448 449 pp->pp_pcictl = pci_ctl; 450 451 /* allocate our tags */ 452 pp->pp_memt = psycho_alloc_mem_tag(pp); 453 pp->pp_iot = psycho_alloc_io_tag(pp); 454 pp->pp_dmat = psycho_alloc_dma_tag(pp); 455 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 456 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 457 458 /* allocate a chipset for this */ 459 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 460 461 /* setup the rest of the psycho pbm */ 462 pba.pba_pc = psycho_alloc_chipset(pp, sc->sc_node, pp->pp_pc); 463 464 switch((ma->ma_reg[0].ur_paddr) & 0xf000) { 465 case 0x2000: 466 pp->pp_id = PSYCHO_PBM_A; 467 break; 468 case 0x4000: 469 pp->pp_id = PSYCHO_PBM_B; 470 break; 471 } 472 473 printf("\n"); 474 475 /* allocate extents for free bus space */ 476 pp->pp_exmem = psycho_alloc_extent(pp, sc->sc_node, 0x02, "psycho mem"); 477 pp->pp_exio = psycho_alloc_extent(pp, sc->sc_node, 0x01, "psycho io"); 478 479 #ifdef DEBUG 480 if (psycho_debug & PDB_INTR) 481 psycho_dump_intmap(sc); 482 #endif 483 484 /* 485 * And finally, if we're a sabre or the first of a pair of psycho's to 486 * arrive here, start up the IOMMU and get a config space tag. 487 */ 488 if (osc == NULL) { 489 uint64_t timeo; 490 491 /* 492 * Establish handlers for interesting interrupts.... 493 * 494 * XXX We need to remember these and remove this to support 495 * hotplug on the UPA/FHC bus. 496 * 497 * XXX Not all controllers have these, but installing them 498 * is better than trying to sort through this mess. 499 */ 500 psycho_set_intr(sc, 15, psycho_ue, 501 &sc->sc_regs->ue_int_map, 502 &sc->sc_regs->ue_clr_int); 503 psycho_set_intr(sc, 1, psycho_ce, 504 &sc->sc_regs->ce_int_map, 505 &sc->sc_regs->ce_clr_int); 506 psycho_set_intr(sc, 15, psycho_bus_a, 507 &sc->sc_regs->pciaerr_int_map, 508 &sc->sc_regs->pciaerr_clr_int); 509 psycho_set_intr(sc, 15, psycho_powerfail, 510 &sc->sc_regs->power_int_map, 511 &sc->sc_regs->power_clr_int); 512 psycho_register_power_button(sc); 513 if (sc->sc_mode != PSYCHO_MODE_SABRE) { 514 /* sabre doesn't have these interrups */ 515 psycho_set_intr(sc, 15, psycho_bus_b, 516 &sc->sc_regs->pciberr_int_map, 517 &sc->sc_regs->pciberr_clr_int); 518 psycho_set_intr(sc, 1, psycho_wakeup, 519 &sc->sc_regs->pwrmgt_int_map, 520 &sc->sc_regs->pwrmgt_clr_int); 521 } 522 523 /* 524 * Apparently a number of machines with psycho and psycho+ 525 * controllers have interrupt latency issues. We'll try 526 * setting the interrupt retry timeout to 0xff which gives us 527 * a retry of 3-6 usec (which is what sysio is set to) for the 528 * moment, which seems to help alleviate this problem. 529 */ 530 timeo = sc->sc_regs->intr_retry_timer; 531 if (timeo > 0xfff) { 532 #ifdef DEBUG 533 printf("decreasing interrupt retry timeout " 534 "from %lx to 0xff\n", (long)timeo); 535 #endif 536 sc->sc_regs->intr_retry_timer = 0xff; 537 } 538 539 /* 540 * Allocate bus node, this contains a prom node per bus. 541 */ 542 pp->pp_busnode = malloc(sizeof(*pp->pp_busnode), M_DEVBUF, 543 M_NOWAIT | M_ZERO); 544 if (pp->pp_busnode == NULL) 545 panic("psycho_attach: malloc pp->pp_busnode"); 546 547 /* 548 * Setup IOMMU and PCI configuration if we're the first 549 * of a pair of psycho's to arrive here. 550 * 551 * We should calculate a TSB size based on amount of RAM 552 * and number of bus controllers and number an type of 553 * child devices. 554 * 555 * For the moment, 32KB should be more than enough. 556 */ 557 sc->sc_is = malloc(sizeof(struct iommu_state), 558 M_DEVBUF, M_NOWAIT); 559 if (sc->sc_is == NULL) 560 panic("psycho_attach: malloc iommu_state"); 561 562 /* Point the strbuf_ctl at the iommu_state */ 563 pp->pp_sb.sb_is = sc->sc_is; 564 565 sc->sc_is->is_sb[0] = sc->sc_is->is_sb[1] = NULL; 566 if (PROM_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 567 struct strbuf_ctl *sb = &pp->pp_sb; 568 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 569 570 /* 571 * Initialize the strbuf_ctl. 572 * 573 * The flush sync buffer must be 64-byte aligned. 574 */ 575 sb->sb_flush = (void *)(va & ~0x3f); 576 577 bus_space_subregion(sc->sc_bustag, pci_ctl, 578 offsetof(struct pci_ctl, pci_strbuf), 579 sizeof (struct iommu_strbuf), &sb->sb_sb); 580 581 /* Point our iommu at the strbuf_ctl */ 582 sc->sc_is->is_sb[0] = sb; 583 } 584 585 psycho_iommu_init(sc, 2); 586 587 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 588 589 /* 590 * XXX This is a really ugly hack because PCI config space 591 * is explicitly handled with unmapped accesses. 592 */ 593 i = sc->sc_bustag->type; 594 sc->sc_bustag->type = PCI_CONFIG_BUS_SPACE; 595 if (bus_space_map(sc->sc_bustag, sc->sc_basepaddr + 0x01000000, 596 0x01000000, 0, &bh)) 597 panic("could not map psycho PCI configuration space"); 598 sc->sc_bustag->type = i; 599 sc->sc_configaddr = bh; 600 } else { 601 /* Share bus numbers with the pair of mine */ 602 pp->pp_busnode = osc->sc_psycho_this->pp_busnode; 603 604 /* Just copy IOMMU state, config tag and address */ 605 sc->sc_is = osc->sc_is; 606 sc->sc_configtag = osc->sc_configtag; 607 sc->sc_configaddr = osc->sc_configaddr; 608 609 /* Point the strbuf_ctl at the iommu_state */ 610 pp->pp_sb.sb_is = sc->sc_is; 611 612 if (PROM_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 613 struct strbuf_ctl *sb = &pp->pp_sb; 614 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 615 616 /* 617 * Initialize the strbuf_ctl. 618 * 619 * The flush sync buffer must be 64-byte aligned. 620 */ 621 sb->sb_flush = (void *)(va & ~0x3f); 622 623 bus_space_subregion(sc->sc_bustag, pci_ctl, 624 offsetof(struct pci_ctl, pci_strbuf), 625 sizeof (struct iommu_strbuf), &sb->sb_sb); 626 627 /* Point our iommu at the strbuf_ctl */ 628 sc->sc_is->is_sb[1] = sb; 629 } 630 iommu_reset(sc->sc_is); 631 } 632 633 /* 634 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 635 */ 636 pba.pba_busname = "pci"; 637 pba.pba_flags = sc->sc_psycho_this->pp_flags; 638 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 639 pba.pba_dmat64 = NULL; 640 pba.pba_iot = sc->sc_psycho_this->pp_iot; 641 pba.pba_memt = sc->sc_psycho_this->pp_memt; 642 643 config_found(self, &pba, psycho_print); 644 } 645 646 static int 647 psycho_print(aux, p) 648 void *aux; 649 const char *p; 650 { 651 652 if (p == NULL) 653 return (UNCONF); 654 return (QUIET); 655 } 656 657 static void 658 psycho_set_intr(sc, ipl, handler, mapper, clearer) 659 struct psycho_softc *sc; 660 int ipl; 661 void *handler; 662 u_int64_t *mapper; 663 u_int64_t *clearer; 664 { 665 struct intrhand *ih; 666 667 ih = (struct intrhand *)malloc(sizeof(struct intrhand), 668 M_DEVBUF, M_NOWAIT); 669 ih->ih_arg = sc; 670 ih->ih_map = mapper; 671 ih->ih_clr = clearer; 672 ih->ih_fun = handler; 673 ih->ih_pil = (1<<ipl); 674 ih->ih_number = INTVEC(*(ih->ih_map)); 675 intr_establish(ipl, ih); 676 *(ih->ih_map) |= INTMAP_V; 677 } 678 679 /* 680 * power button handlers 681 */ 682 static void 683 psycho_register_power_button(struct psycho_softc *sc) 684 { 685 sysmon_task_queue_init(); 686 687 sc->sc_powerpressed = 0; 688 sc->sc_smcontext = malloc(sizeof(struct sysmon_pswitch), M_DEVBUF, 0); 689 if (!sc->sc_smcontext) { 690 printf("%s: could not allocate power button context\n", 691 sc->sc_dev.dv_xname); 692 return; 693 } 694 memset(sc->sc_smcontext, 0, sizeof(struct sysmon_pswitch)); 695 sc->sc_smcontext->smpsw_name = sc->sc_dev.dv_xname; 696 sc->sc_smcontext->smpsw_type = PSWITCH_TYPE_POWER; 697 if (sysmon_pswitch_register(sc->sc_smcontext) != 0) 698 printf("%s: unable to register power button with sysmon\n", 699 sc->sc_dev.dv_xname); 700 } 701 702 static void 703 psycho_power_button_pressed(void *arg) 704 { 705 struct psycho_softc *sc = arg; 706 707 sysmon_pswitch_event(sc->sc_smcontext, PSWITCH_EVENT_PRESSED); 708 sc->sc_powerpressed = 0; 709 } 710 711 /* 712 * PCI bus support 713 */ 714 715 /* 716 * allocate a PCI chipset tag and set it's cookie. 717 */ 718 static pci_chipset_tag_t 719 psycho_alloc_chipset(pp, node, pc) 720 struct psycho_pbm *pp; 721 int node; 722 pci_chipset_tag_t pc; 723 { 724 pci_chipset_tag_t npc; 725 726 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 727 if (npc == NULL) 728 panic("could not allocate pci_chipset_tag_t"); 729 memcpy(npc, pc, sizeof *pc); 730 npc->cookie = pp; 731 npc->rootnode = node; 732 733 return (npc); 734 } 735 736 /* 737 * create extent for free bus space, then allocate assigned regions. 738 */ 739 static struct extent * 740 psycho_alloc_extent(pp, node, ss, name) 741 struct psycho_pbm *pp; 742 int node; 743 int ss; 744 char *name; 745 { 746 struct psycho_registers *pa = NULL; 747 struct psycho_ranges *pr; 748 struct extent *ex; 749 bus_addr_t baddr, addr; 750 bus_size_t bsize, size; 751 int i, num; 752 753 /* get bus space size */ 754 pr = get_psychorange(pp, ss); 755 if (pr == NULL) { 756 printf("psycho_alloc_extent: get_psychorange failed\n"); 757 return NULL; 758 } 759 baddr = 0x00000000; 760 bsize = BUS_ADDR(pr->size_hi, pr->size_lo); 761 762 /* get available lists */ 763 if (PROM_getprop(node, "available", sizeof(*pa), &num, &pa)) { 764 printf("psycho_alloc_extent: PROM_getprop failed\n"); 765 return NULL; 766 } 767 768 /* create extent */ 769 ex = extent_create(name, baddr, bsize - baddr - 1, M_DEVBUF, 0, 0, 770 EX_NOWAIT); 771 if (ex == NULL) { 772 printf("psycho_alloc_extent: extent_create failed\n"); 773 goto ret; 774 } 775 776 /* allocate assigned regions */ 777 for (i = 0; i < num; i++) 778 if (((pa[i].phys_hi >> 24) & 0x03) == ss) { 779 /* allocate bus space */ 780 addr = BUS_ADDR(pa[i].phys_mid, pa[i].phys_lo); 781 size = BUS_ADDR(pa[i].size_hi, pa[i].size_lo); 782 if (extent_alloc_region(ex, baddr, addr - baddr, 783 EX_NOWAIT)) { 784 printf("psycho_alloc_extent: " 785 "extent_alloc_region %" PRIx64 "-%" 786 PRIx64 " failed\n", baddr, addr); 787 extent_destroy(ex); 788 ex = NULL; 789 goto ret; 790 } 791 baddr = addr + size; 792 } 793 /* allocate left region if available */ 794 if (baddr < bsize) 795 if (extent_alloc_region(ex, baddr, bsize - baddr, EX_NOWAIT)) { 796 printf("psycho_alloc_extent: extent_alloc_region %" 797 PRIx64 "-%" PRIx64 " failed\n", baddr, bsize); 798 extent_destroy(ex); 799 ex = NULL; 800 goto ret; 801 } 802 803 #ifdef DEBUG 804 /* print extent */ 805 extent_print(ex); 806 #endif 807 808 ret: 809 /* return extent */ 810 free(pa, M_DEVBUF); 811 return ex; 812 } 813 814 /* 815 * grovel the OBP for various psycho properties 816 */ 817 static void 818 psycho_get_bus_range(node, brp) 819 int node; 820 int *brp; 821 { 822 int n; 823 824 if (PROM_getprop(node, "bus-range", sizeof(*brp), &n, &brp)) 825 panic("could not get psycho bus-range"); 826 if (n != 2) 827 panic("broken psycho bus-range"); 828 DPRINTF(PDB_PROM, ("psycho debug: got `bus-range' for node %08x: %u - %u\n", 829 node, brp[0], brp[1])); 830 } 831 832 static void 833 psycho_get_ranges(node, rp, np) 834 int node; 835 struct psycho_ranges **rp; 836 int *np; 837 { 838 839 if (PROM_getprop(node, "ranges", sizeof(**rp), np, rp)) 840 panic("could not get psycho ranges"); 841 DPRINTF(PDB_PROM, ("psycho debug: got `ranges' for node %08x: %d entries\n", node, *np)); 842 } 843 844 /* 845 * Interrupt handlers. 846 */ 847 848 static int 849 psycho_ue(arg) 850 void *arg; 851 { 852 struct psycho_softc *sc = (struct psycho_softc *)arg; 853 struct psychoreg *regs = sc->sc_regs; 854 long long afsr = regs->psy_ue_afsr; 855 long long afar = regs->psy_ue_afar; 856 long size = PAGE_SIZE<<(sc->sc_is->is_tsbsize); 857 struct iommu_state *is = sc->sc_is; 858 char bits[128]; 859 860 /* 861 * It's uncorrectable. Dump the regs and panic. 862 */ 863 printf("%s: uncorrectable DMA error AFAR %llx pa %llx AFSR %llx:\n%s\n", 864 sc->sc_dev.dv_xname, afar, 865 (long long)iommu_extract(is, (vaddr_t)afar), afsr, 866 bitmask_snprintf(afsr, PSYCHO_UE_AFSR_BITS, 867 bits, sizeof(bits))); 868 869 /* Sometimes the AFAR points to an IOTSB entry */ 870 if (afar >= is->is_ptsb && afar < is->is_ptsb + size) { 871 printf("IOVA %llx IOTTE %llx\n", 872 (long long)((afar - is->is_ptsb) * PAGE_SIZE + is->is_dvmabase), 873 (long long)ldxa(afar, ASI_PHYS_CACHED)); 874 } 875 #ifdef DDB 876 Debugger(); 877 #endif 878 regs->psy_ue_afar = 0; 879 regs->psy_ue_afsr = 0; 880 return (1); 881 } 882 static int 883 psycho_ce(arg) 884 void *arg; 885 { 886 struct psycho_softc *sc = (struct psycho_softc *)arg; 887 struct psychoreg *regs = sc->sc_regs; 888 889 /* 890 * It's correctable. Dump the regs and continue. 891 */ 892 893 printf("%s: correctable DMA error AFAR %llx AFSR %llx\n", 894 sc->sc_dev.dv_xname, 895 (long long)regs->psy_ce_afar, (long long)regs->psy_ce_afsr); 896 return (1); 897 } 898 static int 899 psycho_bus_a(arg) 900 void *arg; 901 { 902 struct psycho_softc *sc = (struct psycho_softc *)arg; 903 struct psychoreg *regs = sc->sc_regs; 904 905 /* 906 * It's uncorrectable. Dump the regs and panic. 907 */ 908 909 panic("%s: PCI bus A error AFAR %llx AFSR %llx", 910 sc->sc_dev.dv_xname, 911 (long long)regs->psy_pcictl[0].pci_afar, 912 (long long)regs->psy_pcictl[0].pci_afsr); 913 return (1); 914 } 915 static int 916 psycho_bus_b(arg) 917 void *arg; 918 { 919 struct psycho_softc *sc = (struct psycho_softc *)arg; 920 struct psychoreg *regs = sc->sc_regs; 921 922 /* 923 * It's uncorrectable. Dump the regs and panic. 924 */ 925 926 panic("%s: PCI bus B error AFAR %llx AFSR %llx", 927 sc->sc_dev.dv_xname, 928 (long long)regs->psy_pcictl[0].pci_afar, 929 (long long)regs->psy_pcictl[0].pci_afsr); 930 return (1); 931 } 932 933 static int 934 psycho_powerfail(arg) 935 void *arg; 936 { 937 struct psycho_softc *sc = (struct psycho_softc *)arg; 938 939 /* 940 * We lost power. Queue a callback with thread context to 941 * handle all the real work. 942 */ 943 if (sc->sc_powerpressed == 0 && sc->sc_smcontext != NULL) { 944 sc->sc_powerpressed = 1; 945 sysmon_task_queue_sched(0, psycho_power_button_pressed, sc); 946 } 947 return (1); 948 } 949 950 static 951 int psycho_wakeup(arg) 952 void *arg; 953 { 954 struct psycho_softc *sc = (struct psycho_softc *)arg; 955 956 /* 957 * Gee, we don't really have a framework to deal with this 958 * properly. 959 */ 960 printf("%s: power management wakeup\n", sc->sc_dev.dv_xname); 961 return (1); 962 } 963 964 965 966 /* 967 * initialise the IOMMU.. 968 */ 969 void 970 psycho_iommu_init(sc, tsbsize) 971 struct psycho_softc *sc; 972 int tsbsize; 973 { 974 char *name; 975 struct iommu_state *is = sc->sc_is; 976 u_int32_t iobase = -1; 977 int *vdma = NULL; 978 int nitem; 979 980 /* punch in our copies */ 981 is->is_bustag = sc->sc_bustag; 982 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 983 offsetof(struct psychoreg, psy_iommu), 984 sizeof (struct iommureg), 985 &is->is_iommu); 986 987 /* 988 * Separate the men from the boys. Get the `virtual-dma' 989 * property for sabre and use that to make sure the damn 990 * iommu works. 991 * 992 * We could query the `#virtual-dma-size-cells' and 993 * `#virtual-dma-addr-cells' and DTRT, but I'm lazy. 994 */ 995 if (!PROM_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 996 &vdma)) { 997 /* Damn. Gotta use these values. */ 998 iobase = vdma[0]; 999 #define TSBCASE(x) case 1<<((x)+23): tsbsize = (x); break 1000 switch (vdma[1]) { 1001 TSBCASE(1); TSBCASE(2); TSBCASE(3); 1002 TSBCASE(4); TSBCASE(5); TSBCASE(6); 1003 default: 1004 printf("bogus tsb size %x, using 7\n", vdma[1]); 1005 TSBCASE(7); 1006 } 1007 #undef TSBCASE 1008 } 1009 1010 /* give us a nice name.. */ 1011 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 1012 if (name == 0) 1013 panic("couldn't malloc iommu name"); 1014 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 1015 1016 iommu_init(name, is, tsbsize, iobase); 1017 } 1018 1019 /* 1020 * below here is bus space and bus DMA support 1021 */ 1022 bus_space_tag_t 1023 psycho_alloc_bus_tag(pp, type) 1024 struct psycho_pbm *pp; 1025 int type; 1026 { 1027 struct psycho_softc *sc = pp->pp_sc; 1028 bus_space_tag_t bt; 1029 1030 bt = (bus_space_tag_t) 1031 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 1032 if (bt == NULL) 1033 panic("could not allocate psycho bus tag"); 1034 1035 memset(bt, 0, sizeof *bt); 1036 bt->cookie = pp; 1037 bt->parent = sc->sc_bustag; 1038 bt->type = type; 1039 bt->sparc_bus_map = _psycho_bus_map; 1040 bt->sparc_bus_mmap = psycho_bus_mmap; 1041 bt->sparc_intr_establish = psycho_intr_establish; 1042 return (bt); 1043 } 1044 1045 bus_dma_tag_t 1046 psycho_alloc_dma_tag(pp) 1047 struct psycho_pbm *pp; 1048 { 1049 struct psycho_softc *sc = pp->pp_sc; 1050 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 1051 1052 dt = (bus_dma_tag_t) 1053 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 1054 if (dt == NULL) 1055 panic("could not allocate psycho DMA tag"); 1056 1057 memset(dt, 0, sizeof *dt); 1058 dt->_cookie = pp; 1059 dt->_parent = pdt; 1060 #define PCOPY(x) dt->x = pdt->x 1061 PCOPY(_dmamap_create); 1062 PCOPY(_dmamap_destroy); 1063 dt->_dmamap_load = psycho_dmamap_load; 1064 PCOPY(_dmamap_load_mbuf); 1065 PCOPY(_dmamap_load_uio); 1066 dt->_dmamap_load_raw = psycho_dmamap_load_raw; 1067 dt->_dmamap_unload = psycho_dmamap_unload; 1068 dt->_dmamap_sync = psycho_dmamap_sync; 1069 dt->_dmamem_alloc = psycho_dmamem_alloc; 1070 dt->_dmamem_free = psycho_dmamem_free; 1071 dt->_dmamem_map = psycho_dmamem_map; 1072 dt->_dmamem_unmap = psycho_dmamem_unmap; 1073 PCOPY(_dmamem_mmap); 1074 #undef PCOPY 1075 return (dt); 1076 } 1077 1078 /* 1079 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 1080 * PCI physical addresses. 1081 */ 1082 1083 static int 1084 get_childspace(type) 1085 int type; 1086 { 1087 int ss; 1088 1089 switch (type) { 1090 case PCI_CONFIG_BUS_SPACE: 1091 ss = 0x00; 1092 break; 1093 case PCI_IO_BUS_SPACE: 1094 ss = 0x01; 1095 break; 1096 case PCI_MEMORY_BUS_SPACE: 1097 ss = 0x02; 1098 break; 1099 #if 0 1100 /* we don't do 64 bit memory space */ 1101 case PCI_MEMORY64_BUS_SPACE: 1102 ss = 0x03; 1103 break; 1104 #endif 1105 default: 1106 panic("get_childspace: unknown bus type"); 1107 } 1108 1109 return (ss); 1110 } 1111 1112 static struct psycho_ranges * 1113 get_psychorange(pp, ss) 1114 struct psycho_pbm *pp; 1115 int ss; 1116 { 1117 int i; 1118 1119 for (i = 0; i < pp->pp_nrange; i++) { 1120 if (((pp->pp_range[i].cspace >> 24) & 0x03) == ss) 1121 return (&pp->pp_range[i]); 1122 } 1123 /* not found */ 1124 return (NULL); 1125 } 1126 1127 static int 1128 _psycho_bus_map(t, offset, size, flags, unused, hp) 1129 bus_space_tag_t t; 1130 bus_addr_t offset; 1131 bus_size_t size; 1132 int flags; 1133 vaddr_t unused; 1134 bus_space_handle_t *hp; 1135 { 1136 struct psycho_pbm *pp = t->cookie; 1137 struct psycho_softc *sc = pp->pp_sc; 1138 struct psycho_ranges *pr; 1139 bus_addr_t paddr; 1140 int ss; 1141 1142 DPRINTF(PDB_BUSMAP, 1143 ("_psycho_bus_map: type %d off %qx sz %qx flags %d", 1144 t->type, (unsigned long long)offset, 1145 (unsigned long long)size, flags)); 1146 1147 ss = get_childspace(t->type); 1148 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 1149 1150 pr = get_psychorange(pp, ss); 1151 if (pr != NULL) { 1152 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1153 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr " 1154 "space %lx offset %lx paddr %qx\n", 1155 (long)ss, (long)offset, 1156 (unsigned long long)paddr)); 1157 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 1158 flags, 0, hp)); 1159 } 1160 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 1161 return (EINVAL); 1162 } 1163 1164 static paddr_t 1165 psycho_bus_mmap(t, paddr, off, prot, flags) 1166 bus_space_tag_t t; 1167 bus_addr_t paddr; 1168 off_t off; 1169 int prot; 1170 int flags; 1171 { 1172 bus_addr_t offset = paddr; 1173 struct psycho_pbm *pp = t->cookie; 1174 struct psycho_softc *sc = pp->pp_sc; 1175 struct psycho_ranges *pr; 1176 int ss; 1177 1178 ss = get_childspace(t->type); 1179 1180 DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: prot %x flags %d pa %qx\n", 1181 prot, flags, (unsigned long long)paddr)); 1182 1183 pr = get_psychorange(pp, ss); 1184 if (pr != NULL) { 1185 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1186 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr " 1187 "space %lx offset %lx paddr %qx\n", 1188 (long)ss, (long)offset, 1189 (unsigned long long)paddr)); 1190 return (bus_space_mmap(sc->sc_bustag, paddr, off, 1191 prot, flags)); 1192 } 1193 1194 return (-1); 1195 } 1196 1197 /* 1198 * Get a PCI offset address from bus_space_handle_t. 1199 */ 1200 bus_addr_t 1201 psycho_bus_offset(t, hp) 1202 bus_space_tag_t t; 1203 bus_space_handle_t *hp; 1204 { 1205 struct psycho_pbm *pp = t->cookie; 1206 struct psycho_ranges *pr; 1207 bus_addr_t addr, offset; 1208 vaddr_t va; 1209 int ss; 1210 1211 addr = hp->_ptr; 1212 ss = get_childspace(t->type); 1213 DPRINTF(PDB_BUSMAP, ("psycho_bus_offset: type %d addr %" PRIx64 1214 " cspace %d", t->type, addr, ss)); 1215 1216 pr = get_psychorange(pp, ss); 1217 if (pr != NULL) { 1218 if (!PHYS_ASI(hp->_asi)) { 1219 va = trunc_page((vaddr_t)addr); 1220 if (pmap_extract(pmap_kernel(), va, &addr) == FALSE) { 1221 DPRINTF(PDB_BUSMAP, 1222 ("\n pmap_extract FAILED\n")); 1223 return (-1); 1224 } 1225 addr += hp->_ptr & PGOFSET; 1226 } 1227 offset = BUS_ADDR_PADDR(addr) - pr->phys_lo; 1228 DPRINTF(PDB_BUSMAP, ("\npsycho_bus_offset: paddr %" PRIx64 1229 " offset %" PRIx64 "\n", addr, offset)); 1230 return (offset); 1231 } 1232 DPRINTF(PDB_BUSMAP, ("\n FAILED\n")); 1233 return (-1); 1234 } 1235 1236 1237 /* 1238 * install an interrupt handler for a PCI device 1239 */ 1240 void * 1241 psycho_intr_establish(t, ihandle, level, handler, arg, fastvec) 1242 bus_space_tag_t t; 1243 int ihandle; 1244 int level; 1245 int (*handler) __P((void *)); 1246 void *arg; 1247 void (*fastvec) __P((void)); /* ignored */ 1248 { 1249 struct psycho_pbm *pp = t->cookie; 1250 struct psycho_softc *sc = pp->pp_sc; 1251 struct intrhand *ih; 1252 volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL; 1253 int64_t intrmap = 0; 1254 int ino; 1255 long vec = INTVEC(ihandle); 1256 1257 ih = (struct intrhand *) 1258 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 1259 if (ih == NULL) 1260 return (NULL); 1261 1262 /* 1263 * Hunt through all the interrupt mapping regs to look for our 1264 * interrupt vector. 1265 * 1266 * XXX We only compare INOs rather than IGNs since the firmware may 1267 * not provide the IGN and the IGN is constant for all device on that 1268 * PCI controller. This could cause problems for the FFB/external 1269 * interrupt which has a full vector that can be set arbitrarily. 1270 */ 1271 1272 DPRINTF(PDB_INTR, ("\npsycho_intr_establish: ihandle %x vec %lx", ihandle, vec)); 1273 ino = INTINO(vec); 1274 DPRINTF(PDB_INTR, (" ino %x", ino)); 1275 1276 /* If the device didn't ask for an IPL, use the one encoded. */ 1277 if (level == IPL_NONE) level = INTLEV(vec); 1278 /* If it still has no level, print a warning and assign IPL 2 */ 1279 if (level == IPL_NONE) { 1280 printf("ERROR: no IPL, setting IPL 2.\n"); 1281 level = 2; 1282 } 1283 1284 DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %p\nHunting for IRQ...\n", 1285 (long)ino, intrlev[ino])); 1286 1287 /* Hunt thru obio first */ 1288 for (intrmapptr = &sc->sc_regs->scsi_int_map, 1289 intrclrptr = &sc->sc_regs->scsi_clr_int; 1290 intrmapptr < &sc->sc_regs->ue_int_map; 1291 intrmapptr++, intrclrptr++) { 1292 if (INTINO(*intrmapptr) == ino) 1293 goto found; 1294 } 1295 1296 /* Now do PCI interrupts */ 1297 for (intrmapptr = &sc->sc_regs->pcia_slot0_int, 1298 intrclrptr = &sc->sc_regs->pcia0_clr_int[0]; 1299 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 1300 intrmapptr++, intrclrptr += 4) { 1301 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 1302 (intrmapptr == &sc->sc_regs->pcia_slot2_int || 1303 intrmapptr == &sc->sc_regs->pcia_slot3_int)) 1304 continue; 1305 if (((*intrmapptr ^ vec) & 0x3c) == 0) { 1306 intrclrptr += vec & 0x3; 1307 goto found; 1308 } 1309 } 1310 1311 /* Finally check the two FFB slots */ 1312 intrclrptr = NULL; /* XXX? */ 1313 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 1314 intrmapptr <= &sc->sc_regs->ffb1_int_map; 1315 intrmapptr++) { 1316 if (INTVEC(*intrmapptr) == ino) 1317 goto found; 1318 } 1319 1320 printf("Cannot find interrupt vector %lx\n", vec); 1321 return (NULL); 1322 1323 found: 1324 /* Register the map and clear intr registers */ 1325 ih->ih_map = intrmapptr; 1326 ih->ih_clr = intrclrptr; 1327 1328 ih->ih_fun = handler; 1329 ih->ih_arg = arg; 1330 ih->ih_pil = level; 1331 ih->ih_number = ino | sc->sc_ign; 1332 1333 DPRINTF(PDB_INTR, ( 1334 "; installing handler %p arg %p with ino %u pil %u\n", 1335 handler, arg, (u_int)ino, (u_int)ih->ih_pil)); 1336 1337 intr_establish(ih->ih_pil, ih); 1338 1339 /* 1340 * Enable the interrupt now we have the handler installed. 1341 * Read the current value as we can't change it besides the 1342 * valid bit so so make sure only this bit is changed. 1343 * 1344 * XXXX --- we really should use bus_space for this. 1345 */ 1346 if (intrmapptr) { 1347 intrmap = *intrmapptr; 1348 DPRINTF(PDB_INTR, ("; read intrmap = %016qx", 1349 (unsigned long long)intrmap)); 1350 1351 /* Enable the interrupt */ 1352 intrmap |= INTMAP_V; 1353 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 1354 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", 1355 (unsigned long long)intrmap)); 1356 *intrmapptr = intrmap; 1357 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", 1358 (unsigned long long)(intrmap = *intrmapptr))); 1359 } 1360 return (ih); 1361 } 1362 1363 /* 1364 * hooks into the iommu dvma calls. 1365 */ 1366 int 1367 psycho_dmamap_load(t, map, buf, buflen, p, flags) 1368 bus_dma_tag_t t; 1369 bus_dmamap_t map; 1370 void *buf; 1371 bus_size_t buflen; 1372 struct proc *p; 1373 int flags; 1374 { 1375 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1376 1377 return (iommu_dvmamap_load(t, &pp->pp_sb, map, buf, buflen, p, flags)); 1378 } 1379 1380 void 1381 psycho_dmamap_unload(t, map) 1382 bus_dma_tag_t t; 1383 bus_dmamap_t map; 1384 { 1385 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1386 1387 iommu_dvmamap_unload(t, &pp->pp_sb, map); 1388 } 1389 1390 int 1391 psycho_dmamap_load_raw(t, map, segs, nsegs, size, flags) 1392 bus_dma_tag_t t; 1393 bus_dmamap_t map; 1394 bus_dma_segment_t *segs; 1395 int nsegs; 1396 bus_size_t size; 1397 int flags; 1398 { 1399 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1400 1401 return (iommu_dvmamap_load_raw(t, &pp->pp_sb, map, segs, nsegs, flags, size)); 1402 } 1403 1404 void 1405 psycho_dmamap_sync(t, map, offset, len, ops) 1406 bus_dma_tag_t t; 1407 bus_dmamap_t map; 1408 bus_addr_t offset; 1409 bus_size_t len; 1410 int ops; 1411 { 1412 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1413 1414 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 1415 /* Flush the CPU then the IOMMU */ 1416 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1417 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1418 } 1419 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 1420 /* Flush the IOMMU then the CPU */ 1421 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1422 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1423 } 1424 1425 } 1426 1427 int 1428 psycho_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 1429 bus_dma_tag_t t; 1430 bus_size_t size; 1431 bus_size_t alignment; 1432 bus_size_t boundary; 1433 bus_dma_segment_t *segs; 1434 int nsegs; 1435 int *rsegs; 1436 int flags; 1437 { 1438 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1439 1440 return (iommu_dvmamem_alloc(t, &pp->pp_sb, size, alignment, boundary, 1441 segs, nsegs, rsegs, flags)); 1442 } 1443 1444 void 1445 psycho_dmamem_free(t, segs, nsegs) 1446 bus_dma_tag_t t; 1447 bus_dma_segment_t *segs; 1448 int nsegs; 1449 { 1450 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1451 1452 iommu_dvmamem_free(t, &pp->pp_sb, segs, nsegs); 1453 } 1454 1455 int 1456 psycho_dmamem_map(t, segs, nsegs, size, kvap, flags) 1457 bus_dma_tag_t t; 1458 bus_dma_segment_t *segs; 1459 int nsegs; 1460 size_t size; 1461 caddr_t *kvap; 1462 int flags; 1463 { 1464 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1465 1466 return (iommu_dvmamem_map(t, &pp->pp_sb, segs, nsegs, size, kvap, flags)); 1467 } 1468 1469 void 1470 psycho_dmamem_unmap(t, kva, size) 1471 bus_dma_tag_t t; 1472 caddr_t kva; 1473 size_t size; 1474 { 1475 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1476 1477 iommu_dvmamem_unmap(t, &pp->pp_sb, kva, size); 1478 } 1479