1 /* $NetBSD: psycho.c,v 1.72 2004/03/28 09:31:21 nakayama Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Eduardo E. Horvath 5 * Copyright (c) 1999, 2000 Matthew R. Green 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: psycho.c,v 1.72 2004/03/28 09:31:21 nakayama Exp $"); 34 35 #include "opt_ddb.h" 36 37 /* 38 * Support for `psycho' and `psycho+' UPA to PCI bridge and 39 * UltraSPARC IIi and IIe `sabre' PCI controllers. 40 */ 41 42 #ifdef DEBUG 43 #define PDB_PROM 0x01 44 #define PDB_BUSMAP 0x02 45 #define PDB_INTR 0x04 46 int psycho_debug = 0x0; 47 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 48 #else 49 #define DPRINTF(l, s) 50 #endif 51 52 #include <sys/param.h> 53 #include <sys/device.h> 54 #include <sys/errno.h> 55 #include <sys/extent.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/time.h> 59 #include <sys/reboot.h> 60 61 #include <uvm/uvm.h> 62 63 #define _SPARC_BUS_DMA_PRIVATE 64 #include <machine/bus.h> 65 #include <machine/autoconf.h> 66 #include <machine/psl.h> 67 68 #include <dev/pci/pcivar.h> 69 #include <dev/pci/pcireg.h> 70 #include <dev/sysmon/sysmon_taskq.h> 71 72 #include <sparc64/dev/iommureg.h> 73 #include <sparc64/dev/iommuvar.h> 74 #include <sparc64/dev/psychoreg.h> 75 #include <sparc64/dev/psychovar.h> 76 #include <sparc64/sparc64/cache.h> 77 78 #include "ioconf.h" 79 80 static pci_chipset_tag_t psycho_alloc_chipset __P((struct psycho_pbm *, int, 81 pci_chipset_tag_t)); 82 static struct extent *psycho_alloc_extent __P((struct psycho_pbm *, int, int, 83 char *)); 84 static void psycho_get_bus_range __P((int, int *)); 85 static void psycho_get_ranges __P((int, struct psycho_ranges **, int *)); 86 static void psycho_set_intr __P((struct psycho_softc *, int, void *, 87 u_int64_t *, u_int64_t *)); 88 89 /* Interrupt handlers */ 90 static int psycho_ue __P((void *)); 91 static int psycho_ce __P((void *)); 92 static int psycho_bus_a __P((void *)); 93 static int psycho_bus_b __P((void *)); 94 static int psycho_powerfail __P((void *)); 95 static int psycho_wakeup __P((void *)); 96 97 98 /* IOMMU support */ 99 static void psycho_iommu_init __P((struct psycho_softc *, int)); 100 101 /* 102 * bus space and bus DMA support for UltraSPARC `psycho'. note that most 103 * of the bus DMA support is provided by the iommu dvma controller. 104 */ 105 static int get_childspace __P((int)); 106 static struct psycho_ranges *get_psychorange __P((struct psycho_pbm *, int)); 107 108 static paddr_t psycho_bus_mmap __P((bus_space_tag_t, bus_addr_t, off_t, 109 int, int)); 110 static int _psycho_bus_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, 111 vaddr_t, bus_space_handle_t *)); 112 static void *psycho_intr_establish __P((bus_space_tag_t, int, int, 113 int (*) __P((void *)), void *, void(*)__P((void)))); 114 115 static int psycho_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 116 bus_size_t, struct proc *, int)); 117 static void psycho_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 118 static int psycho_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 119 bus_dma_segment_t *, int, bus_size_t, int)); 120 static void psycho_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 121 bus_size_t, int)); 122 int psycho_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 123 bus_dma_segment_t *, int, int *, int)); 124 void psycho_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int)); 125 int psycho_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 126 caddr_t *, int)); 127 void psycho_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t)); 128 129 /* base pci_chipset */ 130 extern struct sparc_pci_chipset _sparc_pci_chipset; 131 132 /* power button handlers */ 133 static void psycho_register_power_button(struct psycho_softc *sc); 134 static void psycho_power_button_pressed(void *arg); 135 136 /* 137 * autoconfiguration 138 */ 139 static int psycho_match __P((struct device *, struct cfdata *, void *)); 140 static void psycho_attach __P((struct device *, struct device *, void *)); 141 static int psycho_print __P((void *aux, const char *p)); 142 143 CFATTACH_DECL(psycho, sizeof(struct psycho_softc), 144 psycho_match, psycho_attach, NULL, NULL); 145 146 /* 147 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 148 * single PCI bus and does not have a streaming buffer. It often has an APB 149 * (advanced PCI bridge) connected to it, which was designed specifically for 150 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 151 * appears as two "simba"'s underneath the sabre. 152 * 153 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 154 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while 155 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 156 * will usually find a "psycho+" since I don't think the original "psycho" 157 * ever shipped, and if it did it would be in the U30. 158 * 159 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 160 * both part of the same IC, they only have a single register space. As such, 161 * they need to be configured together, even though the autoconfiguration will 162 * attach them separately. 163 * 164 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 165 * as pci1 and pci2, although they have been implemented with other PCI bus 166 * numbers on some machines. 167 * 168 * On UltraII machines, there can be any number of "psycho+" ICs, each 169 * providing two PCI buses. 170 * 171 * 172 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 173 * the values of the following interrupts in this order: 174 * 175 * PCI Bus Error (30) 176 * DMA UE (2e) 177 * DMA CE (2f) 178 * Power Fail (25) 179 * 180 * We really should attach handlers for each. 181 * 182 */ 183 184 #define ROM_PCI_NAME "pci" 185 186 struct psycho_names { 187 char *p_name; 188 int p_type; 189 } psycho_names[] = { 190 { "SUNW,psycho", PSYCHO_MODE_PSYCHO }, 191 { "pci108e,8000", PSYCHO_MODE_PSYCHO }, 192 { "SUNW,sabre", PSYCHO_MODE_SABRE }, 193 { "pci108e,a000", PSYCHO_MODE_SABRE }, 194 { "pci108e,a001", PSYCHO_MODE_SABRE }, 195 { NULL, 0 } 196 }; 197 198 static int 199 psycho_match(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct mainbus_attach_args *ma = aux; 205 char *model = prom_getpropstring(ma->ma_node, "model"); 206 int i; 207 208 /* match on a name of "pci" and a sabre or a psycho */ 209 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0) { 210 for (i=0; psycho_names[i].p_name; i++) 211 if (strcmp(model, psycho_names[i].p_name) == 0) 212 return (1); 213 214 model = prom_getpropstring(ma->ma_node, "compatible"); 215 for (i=0; psycho_names[i].p_name; i++) 216 if (strcmp(model, psycho_names[i].p_name) == 0) 217 return (1); 218 } 219 return (0); 220 } 221 222 #ifdef DEBUG 223 static void psycho_dump_intmap(struct psycho_softc *sc); 224 static void 225 psycho_dump_intmap(struct psycho_softc *sc) 226 { 227 volatile u_int64_t *intrmapptr = NULL; 228 229 printf("psycho_dump_intmap: OBIO\n"); 230 231 for (intrmapptr = &sc->sc_regs->scsi_int_map; 232 intrmapptr < &sc->sc_regs->ue_int_map; 233 intrmapptr++) 234 printf("%p: %llx\n", intrmapptr, 235 (unsigned long long)*intrmapptr); 236 237 printf("\tintmap:pci\n"); 238 for (intrmapptr = &sc->sc_regs->pcia_slot0_int; 239 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 240 intrmapptr++) 241 printf("%p: %llx\n", intrmapptr, 242 (unsigned long long)*intrmapptr); 243 244 printf("\tintmap:ffb\n"); 245 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 246 intrmapptr <= &sc->sc_regs->ffb1_int_map; 247 intrmapptr++) 248 printf("%p: %llx\n", intrmapptr, 249 (unsigned long long)*intrmapptr); 250 } 251 #endif 252 253 /* 254 * SUNW,psycho initialisation .. 255 * - find the per-psycho registers 256 * - figure out the IGN. 257 * - find our partner psycho 258 * - configure ourselves 259 * - bus range, bus, 260 * - get interrupt-map and interrupt-map-mask 261 * - setup the chipsets. 262 * - if we're the first of the pair, initialise the IOMMU, otherwise 263 * just copy it's tags and addresses. 264 */ 265 static void 266 psycho_attach(parent, self, aux) 267 struct device *parent, *self; 268 void *aux; 269 { 270 struct psycho_softc *sc = (struct psycho_softc *)self; 271 struct psycho_softc *osc = NULL; 272 struct psycho_pbm *pp; 273 struct pcibus_attach_args pba; 274 struct mainbus_attach_args *ma = aux; 275 bus_space_handle_t bh; 276 u_int64_t csr; 277 int psycho_br[2], n, i; 278 bus_space_handle_t pci_ctl; 279 char *model = prom_getpropstring(ma->ma_node, "model"); 280 281 printf("\n"); 282 283 sc->sc_node = ma->ma_node; 284 sc->sc_bustag = ma->ma_bustag; 285 sc->sc_dmatag = ma->ma_dmatag; 286 287 /* 288 * Identify the device. 289 */ 290 for (i=0; psycho_names[i].p_name; i++) 291 if (strcmp(model, psycho_names[i].p_name) == 0) { 292 sc->sc_mode = psycho_names[i].p_type; 293 goto found; 294 } 295 296 model = prom_getpropstring(ma->ma_node, "compatible"); 297 for (i=0; psycho_names[i].p_name; i++) 298 if (strcmp(model, psycho_names[i].p_name) == 0) { 299 sc->sc_mode = psycho_names[i].p_type; 300 goto found; 301 } 302 303 panic("unknown psycho model %s", model); 304 found: 305 306 /* 307 * The psycho gets three register banks: 308 * (0) per-PBM configuration and status registers 309 * (1) per-PBM PCI configuration space, containing only the 310 * PBM 256-byte PCI header 311 * (2) the shared psycho configuration registers (struct psychoreg) 312 */ 313 314 /* Register layouts are different. stuupid. */ 315 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 316 sc->sc_basepaddr = (paddr_t)ma->ma_reg[2].ur_paddr; 317 318 if (ma->ma_naddress > 2) { 319 sparc_promaddr_to_handle(sc->sc_bustag, 320 ma->ma_address[2], &sc->sc_bh); 321 sparc_promaddr_to_handle(sc->sc_bustag, 322 ma->ma_address[0], &pci_ctl); 323 324 sc->sc_regs = (struct psychoreg *) 325 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 326 } else if (ma->ma_nreg > 2) { 327 328 /* We need to map this in ourselves. */ 329 if (bus_space_map(sc->sc_bustag, 330 ma->ma_reg[2].ur_paddr, 331 ma->ma_reg[2].ur_len, BUS_SPACE_MAP_LINEAR, 332 &sc->sc_bh)) 333 panic("psycho_attach: cannot map regs"); 334 sc->sc_regs = (struct psychoreg *) 335 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 336 337 if (bus_space_map(sc->sc_bustag, 338 ma->ma_reg[0].ur_paddr, 339 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 340 &pci_ctl)) 341 panic("psycho_attach: cannot map ctl"); 342 } else 343 panic("psycho_attach: %d not enough registers", 344 ma->ma_nreg); 345 346 } else { 347 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 348 349 if (ma->ma_naddress) { 350 sparc_promaddr_to_handle(sc->sc_bustag, 351 ma->ma_address[0], &sc->sc_bh); 352 sc->sc_regs = (struct psychoreg *) 353 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 354 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 355 offsetof(struct psychoreg, psy_pcictl), 356 sizeof(struct pci_ctl), &pci_ctl); 357 } else if (ma->ma_nreg) { 358 359 /* We need to map this in ourselves. */ 360 if (bus_space_map(sc->sc_bustag, 361 ma->ma_reg[0].ur_paddr, 362 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 363 &sc->sc_bh)) 364 panic("psycho_attach: cannot map regs"); 365 sc->sc_regs = (struct psychoreg *) 366 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 367 368 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 369 offsetof(struct psychoreg, psy_pcictl), 370 sizeof(struct pci_ctl), &pci_ctl); 371 } else 372 panic("psycho_attach: %d not enough registers", 373 ma->ma_nreg); 374 } 375 376 377 csr = bus_space_read_8(sc->sc_bustag, sc->sc_bh, 378 offsetof(struct psychoreg, psy_csr)); 379 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 380 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 381 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 382 383 printf("%s: impl %d, version %d: ign %x ", 384 model, PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr), 385 sc->sc_ign); 386 /* 387 * Match other psycho's that are already configured against 388 * the base physical address. This will be the same for a 389 * pair of devices that share register space. 390 */ 391 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 392 393 struct psycho_softc *asc = 394 (struct psycho_softc *)psycho_cd.cd_devs[n]; 395 396 if (asc == NULL || asc == sc) 397 /* This entry is not there or it is me */ 398 continue; 399 400 if (asc->sc_basepaddr != sc->sc_basepaddr) 401 /* This is an unrelated psycho */ 402 continue; 403 404 /* Found partner */ 405 osc = asc; 406 break; 407 } 408 409 410 /* Oh, dear. OK, lets get started */ 411 412 /* 413 * Setup the PCI control register 414 */ 415 csr = bus_space_read_8(sc->sc_bustag, pci_ctl, 416 offsetof(struct pci_ctl, pci_csr)); 417 csr |= PCICTL_MRLM | 418 PCICTL_ARB_PARK | 419 PCICTL_ERRINTEN | 420 PCICTL_4ENABLE; 421 csr &= ~(PCICTL_SERR | 422 PCICTL_CPU_PRIO | 423 PCICTL_ARB_PRIO | 424 PCICTL_RTRYWAIT); 425 bus_space_write_8(sc->sc_bustag, pci_ctl, 426 offsetof(struct pci_ctl, pci_csr), csr); 427 428 429 /* 430 * Allocate our psycho_pbm 431 */ 432 pp = sc->sc_psycho_this = malloc(sizeof *pp, M_DEVBUF, 433 M_NOWAIT | M_ZERO); 434 if (pp == NULL) 435 panic("could not allocate psycho pbm"); 436 437 pp->pp_sc = sc; 438 439 /* grab the psycho ranges */ 440 psycho_get_ranges(sc->sc_node, &pp->pp_range, &pp->pp_nrange); 441 442 /* get the bus-range for the psycho */ 443 psycho_get_bus_range(sc->sc_node, psycho_br); 444 445 pba.pba_bus = psycho_br[0]; 446 pba.pba_bridgetag = NULL; 447 pp->pp_busmax = psycho_br[1]; 448 449 printf("bus range %u to %u", psycho_br[0], psycho_br[1]); 450 printf("; PCI bus %d", psycho_br[0]); 451 452 pp->pp_pcictl = pci_ctl; 453 454 /* allocate our tags */ 455 pp->pp_memt = psycho_alloc_mem_tag(pp); 456 pp->pp_iot = psycho_alloc_io_tag(pp); 457 pp->pp_dmat = psycho_alloc_dma_tag(pp); 458 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 459 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 460 461 /* allocate a chipset for this */ 462 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 463 464 /* setup the rest of the psycho pbm */ 465 pba.pba_pc = psycho_alloc_chipset(pp, sc->sc_node, pp->pp_pc); 466 467 switch((ma->ma_reg[0].ur_paddr) & 0xf000) { 468 case 0x2000: 469 pp->pp_id = PSYCHO_PBM_A; 470 break; 471 case 0x4000: 472 pp->pp_id = PSYCHO_PBM_B; 473 break; 474 } 475 476 printf("\n"); 477 478 /* allocate extents for free bus space */ 479 pp->pp_exmem = psycho_alloc_extent(pp, sc->sc_node, 0x02, "psycho mem"); 480 pp->pp_exio = psycho_alloc_extent(pp, sc->sc_node, 0x01, "psycho io"); 481 482 #ifdef DEBUG 483 if (psycho_debug & PDB_INTR) 484 psycho_dump_intmap(sc); 485 #endif 486 487 /* 488 * And finally, if we're a sabre or the first of a pair of psycho's to 489 * arrive here, start up the IOMMU and get a config space tag. 490 */ 491 if (osc == NULL) { 492 uint64_t timeo; 493 494 /* 495 * Establish handlers for interesting interrupts.... 496 * 497 * XXX We need to remember these and remove this to support 498 * hotplug on the UPA/FHC bus. 499 * 500 * XXX Not all controllers have these, but installing them 501 * is better than trying to sort through this mess. 502 */ 503 psycho_set_intr(sc, 15, psycho_ue, 504 &sc->sc_regs->ue_int_map, 505 &sc->sc_regs->ue_clr_int); 506 psycho_set_intr(sc, 1, psycho_ce, 507 &sc->sc_regs->ce_int_map, 508 &sc->sc_regs->ce_clr_int); 509 psycho_set_intr(sc, 15, psycho_bus_a, 510 &sc->sc_regs->pciaerr_int_map, 511 &sc->sc_regs->pciaerr_clr_int); 512 psycho_set_intr(sc, 15, psycho_powerfail, 513 &sc->sc_regs->power_int_map, 514 &sc->sc_regs->power_clr_int); 515 psycho_register_power_button(sc); 516 if (sc->sc_mode != PSYCHO_MODE_SABRE) { 517 /* sabre doesn't have these interrups */ 518 psycho_set_intr(sc, 15, psycho_bus_b, 519 &sc->sc_regs->pciberr_int_map, 520 &sc->sc_regs->pciberr_clr_int); 521 psycho_set_intr(sc, 1, psycho_wakeup, 522 &sc->sc_regs->pwrmgt_int_map, 523 &sc->sc_regs->pwrmgt_clr_int); 524 } 525 526 /* 527 * Apparently a number of machines with psycho and psycho+ 528 * controllers have interrupt latency issues. We'll try 529 * setting the interrupt retry timeout to 0xff which gives us 530 * a retry of 3-6 usec (which is what sysio is set to) for the 531 * moment, which seems to help alleviate this problem. 532 */ 533 timeo = sc->sc_regs->intr_retry_timer; 534 if (timeo > 0xfff) { 535 #ifdef DEBUG 536 printf("decreasing interrupt retry timeout " 537 "from %lx to 0xff\n", (long)timeo); 538 #endif 539 sc->sc_regs->intr_retry_timer = 0xff; 540 } 541 542 /* 543 * Allocate bus node, this contains a prom node per bus. 544 */ 545 pp->pp_busnode = malloc(sizeof(*pp->pp_busnode), M_DEVBUF, 546 M_NOWAIT | M_ZERO); 547 if (pp->pp_busnode == NULL) 548 panic("psycho_attach: malloc pp->pp_busnode"); 549 550 /* 551 * Setup IOMMU and PCI configuration if we're the first 552 * of a pair of psycho's to arrive here. 553 * 554 * We should calculate a TSB size based on amount of RAM 555 * and number of bus controllers and number an type of 556 * child devices. 557 * 558 * For the moment, 32KB should be more than enough. 559 */ 560 sc->sc_is = malloc(sizeof(struct iommu_state), 561 M_DEVBUF, M_NOWAIT); 562 if (sc->sc_is == NULL) 563 panic("psycho_attach: malloc iommu_state"); 564 565 /* Point the strbuf_ctl at the iommu_state */ 566 pp->pp_sb.sb_is = sc->sc_is; 567 568 sc->sc_is->is_sb[0] = sc->sc_is->is_sb[1] = NULL; 569 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 570 struct strbuf_ctl *sb = &pp->pp_sb; 571 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 572 573 /* 574 * Initialize the strbuf_ctl. 575 * 576 * The flush sync buffer must be 64-byte aligned. 577 */ 578 sb->sb_flush = (void *)(va & ~0x3f); 579 580 bus_space_subregion(sc->sc_bustag, pci_ctl, 581 offsetof(struct pci_ctl, pci_strbuf), 582 sizeof (struct iommu_strbuf), &sb->sb_sb); 583 584 /* Point our iommu at the strbuf_ctl */ 585 sc->sc_is->is_sb[0] = sb; 586 } 587 588 psycho_iommu_init(sc, 2); 589 590 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 591 592 /* 593 * XXX This is a really ugly hack because PCI config space 594 * is explicitly handled with unmapped accesses. 595 */ 596 i = sc->sc_bustag->type; 597 sc->sc_bustag->type = PCI_CONFIG_BUS_SPACE; 598 if (bus_space_map(sc->sc_bustag, sc->sc_basepaddr + 0x01000000, 599 0x01000000, 0, &bh)) 600 panic("could not map psycho PCI configuration space"); 601 sc->sc_bustag->type = i; 602 sc->sc_configaddr = bh; 603 } else { 604 /* Share bus numbers with the pair of mine */ 605 pp->pp_busnode = osc->sc_psycho_this->pp_busnode; 606 607 /* Just copy IOMMU state, config tag and address */ 608 sc->sc_is = osc->sc_is; 609 sc->sc_configtag = osc->sc_configtag; 610 sc->sc_configaddr = osc->sc_configaddr; 611 612 /* Point the strbuf_ctl at the iommu_state */ 613 pp->pp_sb.sb_is = sc->sc_is; 614 615 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 616 struct strbuf_ctl *sb = &pp->pp_sb; 617 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 618 619 /* 620 * Initialize the strbuf_ctl. 621 * 622 * The flush sync buffer must be 64-byte aligned. 623 */ 624 sb->sb_flush = (void *)(va & ~0x3f); 625 626 bus_space_subregion(sc->sc_bustag, pci_ctl, 627 offsetof(struct pci_ctl, pci_strbuf), 628 sizeof (struct iommu_strbuf), &sb->sb_sb); 629 630 /* Point our iommu at the strbuf_ctl */ 631 sc->sc_is->is_sb[1] = sb; 632 } 633 iommu_reset(sc->sc_is); 634 } 635 636 /* 637 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 638 */ 639 pba.pba_busname = "pci"; 640 pba.pba_flags = sc->sc_psycho_this->pp_flags; 641 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 642 pba.pba_dmat64 = NULL; 643 pba.pba_iot = sc->sc_psycho_this->pp_iot; 644 pba.pba_memt = sc->sc_psycho_this->pp_memt; 645 646 config_found(self, &pba, psycho_print); 647 } 648 649 static int 650 psycho_print(aux, p) 651 void *aux; 652 const char *p; 653 { 654 655 if (p == NULL) 656 return (UNCONF); 657 return (QUIET); 658 } 659 660 static void 661 psycho_set_intr(sc, ipl, handler, mapper, clearer) 662 struct psycho_softc *sc; 663 int ipl; 664 void *handler; 665 u_int64_t *mapper; 666 u_int64_t *clearer; 667 { 668 struct intrhand *ih; 669 670 ih = (struct intrhand *)malloc(sizeof(struct intrhand), 671 M_DEVBUF, M_NOWAIT); 672 ih->ih_arg = sc; 673 ih->ih_map = mapper; 674 ih->ih_clr = clearer; 675 ih->ih_fun = handler; 676 ih->ih_pil = (1<<ipl); 677 ih->ih_number = INTVEC(*(ih->ih_map)); 678 intr_establish(ipl, ih); 679 *(ih->ih_map) |= INTMAP_V; 680 } 681 682 /* 683 * power button handlers 684 */ 685 static void 686 psycho_register_power_button(struct psycho_softc *sc) 687 { 688 sysmon_task_queue_init(); 689 690 sc->sc_powerpressed = 0; 691 sc->sc_smcontext = malloc(sizeof(struct sysmon_pswitch), M_DEVBUF, 0); 692 if (!sc->sc_smcontext) { 693 printf("%s: could not allocate power button context\n", 694 sc->sc_dev.dv_xname); 695 return; 696 } 697 memset(sc->sc_smcontext, 0, sizeof(struct sysmon_pswitch)); 698 sc->sc_smcontext->smpsw_name = sc->sc_dev.dv_xname; 699 sc->sc_smcontext->smpsw_type = PSWITCH_TYPE_POWER; 700 if (sysmon_pswitch_register(sc->sc_smcontext) != 0) 701 printf("%s: unable to register power button with sysmon\n", 702 sc->sc_dev.dv_xname); 703 } 704 705 static void 706 psycho_power_button_pressed(void *arg) 707 { 708 struct psycho_softc *sc = arg; 709 710 sysmon_pswitch_event(sc->sc_smcontext, PSWITCH_EVENT_PRESSED); 711 sc->sc_powerpressed = 0; 712 } 713 714 /* 715 * PCI bus support 716 */ 717 718 /* 719 * allocate a PCI chipset tag and set it's cookie. 720 */ 721 static pci_chipset_tag_t 722 psycho_alloc_chipset(pp, node, pc) 723 struct psycho_pbm *pp; 724 int node; 725 pci_chipset_tag_t pc; 726 { 727 pci_chipset_tag_t npc; 728 729 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 730 if (npc == NULL) 731 panic("could not allocate pci_chipset_tag_t"); 732 memcpy(npc, pc, sizeof *pc); 733 npc->cookie = pp; 734 npc->rootnode = node; 735 736 return (npc); 737 } 738 739 /* 740 * create extent for free bus space, then allocate assigned regions. 741 */ 742 static struct extent * 743 psycho_alloc_extent(pp, node, ss, name) 744 struct psycho_pbm *pp; 745 int node; 746 int ss; 747 char *name; 748 { 749 struct psycho_registers *pa = NULL; 750 struct psycho_ranges *pr; 751 struct extent *ex; 752 bus_addr_t baddr, addr; 753 bus_size_t bsize, size; 754 int i, num; 755 756 /* get bus space size */ 757 pr = get_psychorange(pp, ss); 758 if (pr == NULL) { 759 printf("psycho_alloc_extent: get_psychorange failed\n"); 760 return NULL; 761 } 762 baddr = 0x00000000; 763 bsize = BUS_ADDR(pr->size_hi, pr->size_lo); 764 765 /* get available lists */ 766 num = 0; 767 if (prom_getprop(node, "available", sizeof(*pa), &num, &pa)) { 768 printf("psycho_alloc_extent: prom_getprop failed\n"); 769 return NULL; 770 } 771 772 /* create extent */ 773 ex = extent_create(name, baddr, bsize - baddr - 1, M_DEVBUF, 0, 0, 774 EX_NOWAIT); 775 if (ex == NULL) { 776 printf("psycho_alloc_extent: extent_create failed\n"); 777 goto ret; 778 } 779 780 /* allocate assigned regions */ 781 for (i = 0; i < num; i++) 782 if (((pa[i].phys_hi >> 24) & 0x03) == ss) { 783 /* allocate bus space */ 784 addr = BUS_ADDR(pa[i].phys_mid, pa[i].phys_lo); 785 size = BUS_ADDR(pa[i].size_hi, pa[i].size_lo); 786 if (extent_alloc_region(ex, baddr, addr - baddr, 787 EX_NOWAIT)) { 788 printf("psycho_alloc_extent: " 789 "extent_alloc_region %" PRIx64 "-%" 790 PRIx64 " failed\n", baddr, addr); 791 extent_destroy(ex); 792 ex = NULL; 793 goto ret; 794 } 795 baddr = addr + size; 796 } 797 /* allocate left region if available */ 798 if (baddr < bsize) 799 if (extent_alloc_region(ex, baddr, bsize - baddr, EX_NOWAIT)) { 800 printf("psycho_alloc_extent: extent_alloc_region %" 801 PRIx64 "-%" PRIx64 " failed\n", baddr, bsize); 802 extent_destroy(ex); 803 ex = NULL; 804 goto ret; 805 } 806 807 #ifdef DEBUG 808 /* print extent */ 809 extent_print(ex); 810 #endif 811 812 ret: 813 /* return extent */ 814 free(pa, M_DEVBUF); 815 return ex; 816 } 817 818 /* 819 * grovel the OBP for various psycho properties 820 */ 821 static void 822 psycho_get_bus_range(node, brp) 823 int node; 824 int *brp; 825 { 826 int n, error; 827 828 n = 2; 829 error = prom_getprop(node, "bus-range", sizeof(*brp), &n, &brp); 830 if (error) 831 panic("could not get psycho bus-range, error %d", error); 832 if (n != 2) 833 panic("broken psycho bus-range"); 834 DPRINTF(PDB_PROM, ("psycho debug: got `bus-range' for node %08x: %u - %u\n", 835 node, brp[0], brp[1])); 836 } 837 838 static void 839 psycho_get_ranges(node, rp, np) 840 int node; 841 struct psycho_ranges **rp; 842 int *np; 843 { 844 845 if (prom_getprop(node, "ranges", sizeof(**rp), np, rp)) 846 panic("could not get psycho ranges"); 847 DPRINTF(PDB_PROM, ("psycho debug: got `ranges' for node %08x: %d entries\n", node, *np)); 848 } 849 850 /* 851 * Interrupt handlers. 852 */ 853 854 static int 855 psycho_ue(arg) 856 void *arg; 857 { 858 struct psycho_softc *sc = (struct psycho_softc *)arg; 859 struct psychoreg *regs = sc->sc_regs; 860 long long afsr = regs->psy_ue_afsr; 861 long long afar = regs->psy_ue_afar; 862 long size = PAGE_SIZE<<(sc->sc_is->is_tsbsize); 863 struct iommu_state *is = sc->sc_is; 864 char bits[128]; 865 866 /* 867 * It's uncorrectable. Dump the regs and panic. 868 */ 869 printf("%s: uncorrectable DMA error AFAR %llx pa %llx AFSR %llx:\n%s\n", 870 sc->sc_dev.dv_xname, afar, 871 (long long)iommu_extract(is, (vaddr_t)afar), afsr, 872 bitmask_snprintf(afsr, PSYCHO_UE_AFSR_BITS, 873 bits, sizeof(bits))); 874 875 /* Sometimes the AFAR points to an IOTSB entry */ 876 if (afar >= is->is_ptsb && afar < is->is_ptsb + size) { 877 printf("IOVA %llx IOTTE %llx\n", 878 (long long)((afar - is->is_ptsb) * PAGE_SIZE + is->is_dvmabase), 879 (long long)ldxa(afar, ASI_PHYS_CACHED)); 880 } 881 #ifdef DDB 882 Debugger(); 883 #endif 884 regs->psy_ue_afar = 0; 885 regs->psy_ue_afsr = 0; 886 return (1); 887 } 888 static int 889 psycho_ce(arg) 890 void *arg; 891 { 892 struct psycho_softc *sc = (struct psycho_softc *)arg; 893 struct psychoreg *regs = sc->sc_regs; 894 895 /* 896 * It's correctable. Dump the regs and continue. 897 */ 898 899 printf("%s: correctable DMA error AFAR %llx AFSR %llx\n", 900 sc->sc_dev.dv_xname, 901 (long long)regs->psy_ce_afar, (long long)regs->psy_ce_afsr); 902 return (1); 903 } 904 static int 905 psycho_bus_a(arg) 906 void *arg; 907 { 908 struct psycho_softc *sc = (struct psycho_softc *)arg; 909 struct psychoreg *regs = sc->sc_regs; 910 911 /* 912 * It's uncorrectable. Dump the regs and panic. 913 */ 914 915 panic("%s: PCI bus A error AFAR %llx AFSR %llx", 916 sc->sc_dev.dv_xname, 917 (long long)regs->psy_pcictl[0].pci_afar, 918 (long long)regs->psy_pcictl[0].pci_afsr); 919 return (1); 920 } 921 static int 922 psycho_bus_b(arg) 923 void *arg; 924 { 925 struct psycho_softc *sc = (struct psycho_softc *)arg; 926 struct psychoreg *regs = sc->sc_regs; 927 928 /* 929 * It's uncorrectable. Dump the regs and panic. 930 */ 931 932 panic("%s: PCI bus B error AFAR %llx AFSR %llx", 933 sc->sc_dev.dv_xname, 934 (long long)regs->psy_pcictl[0].pci_afar, 935 (long long)regs->psy_pcictl[0].pci_afsr); 936 return (1); 937 } 938 939 static int 940 psycho_powerfail(arg) 941 void *arg; 942 { 943 struct psycho_softc *sc = (struct psycho_softc *)arg; 944 945 /* 946 * We lost power. Queue a callback with thread context to 947 * handle all the real work. 948 */ 949 if (sc->sc_powerpressed == 0 && sc->sc_smcontext != NULL) { 950 sc->sc_powerpressed = 1; 951 sysmon_task_queue_sched(0, psycho_power_button_pressed, sc); 952 } 953 return (1); 954 } 955 956 static 957 int psycho_wakeup(arg) 958 void *arg; 959 { 960 struct psycho_softc *sc = (struct psycho_softc *)arg; 961 962 /* 963 * Gee, we don't really have a framework to deal with this 964 * properly. 965 */ 966 printf("%s: power management wakeup\n", sc->sc_dev.dv_xname); 967 return (1); 968 } 969 970 971 972 /* 973 * initialise the IOMMU.. 974 */ 975 void 976 psycho_iommu_init(sc, tsbsize) 977 struct psycho_softc *sc; 978 int tsbsize; 979 { 980 char *name; 981 struct iommu_state *is = sc->sc_is; 982 u_int32_t iobase = -1; 983 int *vdma = NULL; 984 int nitem; 985 986 /* punch in our copies */ 987 is->is_bustag = sc->sc_bustag; 988 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 989 offsetof(struct psychoreg, psy_iommu), 990 sizeof (struct iommureg), 991 &is->is_iommu); 992 993 /* 994 * Separate the men from the boys. Get the `virtual-dma' 995 * property for sabre and use that to make sure the damn 996 * iommu works. 997 * 998 * We could query the `#virtual-dma-size-cells' and 999 * `#virtual-dma-addr-cells' and DTRT, but I'm lazy. 1000 */ 1001 nitem = 0; 1002 if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 1003 &vdma)) { 1004 /* Damn. Gotta use these values. */ 1005 iobase = vdma[0]; 1006 #define TSBCASE(x) case 1<<((x)+23): tsbsize = (x); break 1007 switch (vdma[1]) { 1008 TSBCASE(1); TSBCASE(2); TSBCASE(3); 1009 TSBCASE(4); TSBCASE(5); TSBCASE(6); 1010 default: 1011 printf("bogus tsb size %x, using 7\n", vdma[1]); 1012 TSBCASE(7); 1013 } 1014 #undef TSBCASE 1015 } 1016 1017 /* give us a nice name.. */ 1018 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 1019 if (name == 0) 1020 panic("couldn't malloc iommu name"); 1021 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 1022 1023 iommu_init(name, is, tsbsize, iobase); 1024 } 1025 1026 /* 1027 * below here is bus space and bus DMA support 1028 */ 1029 bus_space_tag_t 1030 psycho_alloc_bus_tag(pp, type) 1031 struct psycho_pbm *pp; 1032 int type; 1033 { 1034 struct psycho_softc *sc = pp->pp_sc; 1035 bus_space_tag_t bt; 1036 1037 bt = (bus_space_tag_t) 1038 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 1039 if (bt == NULL) 1040 panic("could not allocate psycho bus tag"); 1041 1042 memset(bt, 0, sizeof *bt); 1043 bt->cookie = pp; 1044 bt->parent = sc->sc_bustag; 1045 bt->type = type; 1046 bt->sparc_bus_map = _psycho_bus_map; 1047 bt->sparc_bus_mmap = psycho_bus_mmap; 1048 bt->sparc_intr_establish = psycho_intr_establish; 1049 return (bt); 1050 } 1051 1052 bus_dma_tag_t 1053 psycho_alloc_dma_tag(pp) 1054 struct psycho_pbm *pp; 1055 { 1056 struct psycho_softc *sc = pp->pp_sc; 1057 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 1058 1059 dt = (bus_dma_tag_t) 1060 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 1061 if (dt == NULL) 1062 panic("could not allocate psycho DMA tag"); 1063 1064 memset(dt, 0, sizeof *dt); 1065 dt->_cookie = pp; 1066 dt->_parent = pdt; 1067 #define PCOPY(x) dt->x = pdt->x 1068 PCOPY(_dmamap_create); 1069 PCOPY(_dmamap_destroy); 1070 dt->_dmamap_load = psycho_dmamap_load; 1071 PCOPY(_dmamap_load_mbuf); 1072 PCOPY(_dmamap_load_uio); 1073 dt->_dmamap_load_raw = psycho_dmamap_load_raw; 1074 dt->_dmamap_unload = psycho_dmamap_unload; 1075 dt->_dmamap_sync = psycho_dmamap_sync; 1076 dt->_dmamem_alloc = psycho_dmamem_alloc; 1077 dt->_dmamem_free = psycho_dmamem_free; 1078 dt->_dmamem_map = psycho_dmamem_map; 1079 dt->_dmamem_unmap = psycho_dmamem_unmap; 1080 PCOPY(_dmamem_mmap); 1081 #undef PCOPY 1082 return (dt); 1083 } 1084 1085 /* 1086 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 1087 * PCI physical addresses. 1088 */ 1089 1090 static int 1091 get_childspace(type) 1092 int type; 1093 { 1094 int ss; 1095 1096 switch (type) { 1097 case PCI_CONFIG_BUS_SPACE: 1098 ss = 0x00; 1099 break; 1100 case PCI_IO_BUS_SPACE: 1101 ss = 0x01; 1102 break; 1103 case PCI_MEMORY_BUS_SPACE: 1104 ss = 0x02; 1105 break; 1106 #if 0 1107 /* we don't do 64 bit memory space */ 1108 case PCI_MEMORY64_BUS_SPACE: 1109 ss = 0x03; 1110 break; 1111 #endif 1112 default: 1113 panic("get_childspace: unknown bus type"); 1114 } 1115 1116 return (ss); 1117 } 1118 1119 static struct psycho_ranges * 1120 get_psychorange(pp, ss) 1121 struct psycho_pbm *pp; 1122 int ss; 1123 { 1124 int i; 1125 1126 for (i = 0; i < pp->pp_nrange; i++) { 1127 if (((pp->pp_range[i].cspace >> 24) & 0x03) == ss) 1128 return (&pp->pp_range[i]); 1129 } 1130 /* not found */ 1131 return (NULL); 1132 } 1133 1134 static int 1135 _psycho_bus_map(t, offset, size, flags, unused, hp) 1136 bus_space_tag_t t; 1137 bus_addr_t offset; 1138 bus_size_t size; 1139 int flags; 1140 vaddr_t unused; 1141 bus_space_handle_t *hp; 1142 { 1143 struct psycho_pbm *pp = t->cookie; 1144 struct psycho_softc *sc = pp->pp_sc; 1145 struct psycho_ranges *pr; 1146 bus_addr_t paddr; 1147 int ss; 1148 1149 DPRINTF(PDB_BUSMAP, 1150 ("_psycho_bus_map: type %d off %qx sz %qx flags %d", 1151 t->type, (unsigned long long)offset, 1152 (unsigned long long)size, flags)); 1153 1154 ss = get_childspace(t->type); 1155 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 1156 1157 pr = get_psychorange(pp, ss); 1158 if (pr != NULL) { 1159 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1160 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr " 1161 "space %lx offset %lx paddr %qx\n", 1162 (long)ss, (long)offset, 1163 (unsigned long long)paddr)); 1164 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 1165 flags, 0, hp)); 1166 } 1167 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 1168 return (EINVAL); 1169 } 1170 1171 static paddr_t 1172 psycho_bus_mmap(t, paddr, off, prot, flags) 1173 bus_space_tag_t t; 1174 bus_addr_t paddr; 1175 off_t off; 1176 int prot; 1177 int flags; 1178 { 1179 bus_addr_t offset = paddr; 1180 struct psycho_pbm *pp = t->cookie; 1181 struct psycho_softc *sc = pp->pp_sc; 1182 struct psycho_ranges *pr; 1183 int ss; 1184 1185 ss = get_childspace(t->type); 1186 1187 DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: prot %x flags %d pa %qx\n", 1188 prot, flags, (unsigned long long)paddr)); 1189 1190 pr = get_psychorange(pp, ss); 1191 if (pr != NULL) { 1192 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1193 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr " 1194 "space %lx offset %lx paddr %qx\n", 1195 (long)ss, (long)offset, 1196 (unsigned long long)paddr)); 1197 return (bus_space_mmap(sc->sc_bustag, paddr, off, 1198 prot, flags)); 1199 } 1200 1201 return (-1); 1202 } 1203 1204 /* 1205 * Get a PCI offset address from bus_space_handle_t. 1206 */ 1207 bus_addr_t 1208 psycho_bus_offset(t, hp) 1209 bus_space_tag_t t; 1210 bus_space_handle_t *hp; 1211 { 1212 struct psycho_pbm *pp = t->cookie; 1213 struct psycho_ranges *pr; 1214 bus_addr_t addr, offset; 1215 vaddr_t va; 1216 int ss; 1217 1218 addr = hp->_ptr; 1219 ss = get_childspace(t->type); 1220 DPRINTF(PDB_BUSMAP, ("psycho_bus_offset: type %d addr %" PRIx64 1221 " cspace %d", t->type, addr, ss)); 1222 1223 pr = get_psychorange(pp, ss); 1224 if (pr != NULL) { 1225 if (!PHYS_ASI(hp->_asi)) { 1226 va = trunc_page((vaddr_t)addr); 1227 if (pmap_extract(pmap_kernel(), va, &addr) == FALSE) { 1228 DPRINTF(PDB_BUSMAP, 1229 ("\n pmap_extract FAILED\n")); 1230 return (-1); 1231 } 1232 addr += hp->_ptr & PGOFSET; 1233 } 1234 offset = BUS_ADDR_PADDR(addr) - pr->phys_lo; 1235 DPRINTF(PDB_BUSMAP, ("\npsycho_bus_offset: paddr %" PRIx64 1236 " offset %" PRIx64 "\n", addr, offset)); 1237 return (offset); 1238 } 1239 DPRINTF(PDB_BUSMAP, ("\n FAILED\n")); 1240 return (-1); 1241 } 1242 1243 1244 /* 1245 * install an interrupt handler for a PCI device 1246 */ 1247 void * 1248 psycho_intr_establish(t, ihandle, level, handler, arg, fastvec) 1249 bus_space_tag_t t; 1250 int ihandle; 1251 int level; 1252 int (*handler) __P((void *)); 1253 void *arg; 1254 void (*fastvec) __P((void)); /* ignored */ 1255 { 1256 struct psycho_pbm *pp = t->cookie; 1257 struct psycho_softc *sc = pp->pp_sc; 1258 struct intrhand *ih; 1259 volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL; 1260 int64_t intrmap = 0; 1261 int ino; 1262 long vec = INTVEC(ihandle); 1263 1264 ih = (struct intrhand *) 1265 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 1266 if (ih == NULL) 1267 return (NULL); 1268 1269 /* 1270 * Hunt through all the interrupt mapping regs to look for our 1271 * interrupt vector. 1272 * 1273 * XXX We only compare INOs rather than IGNs since the firmware may 1274 * not provide the IGN and the IGN is constant for all device on that 1275 * PCI controller. This could cause problems for the FFB/external 1276 * interrupt which has a full vector that can be set arbitrarily. 1277 */ 1278 1279 DPRINTF(PDB_INTR, ("\npsycho_intr_establish: ihandle %x vec %lx", ihandle, vec)); 1280 ino = INTINO(vec); 1281 DPRINTF(PDB_INTR, (" ino %x", ino)); 1282 1283 /* If the device didn't ask for an IPL, use the one encoded. */ 1284 if (level == IPL_NONE) level = INTLEV(vec); 1285 /* If it still has no level, print a warning and assign IPL 2 */ 1286 if (level == IPL_NONE) { 1287 printf("ERROR: no IPL, setting IPL 2.\n"); 1288 level = 2; 1289 } 1290 1291 DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %p\nHunting for IRQ...\n", 1292 (long)ino, intrlev[ino])); 1293 1294 /* Hunt thru obio first */ 1295 for (intrmapptr = &sc->sc_regs->scsi_int_map, 1296 intrclrptr = &sc->sc_regs->scsi_clr_int; 1297 intrmapptr < &sc->sc_regs->ue_int_map; 1298 intrmapptr++, intrclrptr++) { 1299 if (INTINO(*intrmapptr) == ino) 1300 goto found; 1301 } 1302 1303 /* Now do PCI interrupts */ 1304 for (intrmapptr = &sc->sc_regs->pcia_slot0_int, 1305 intrclrptr = &sc->sc_regs->pcia0_clr_int[0]; 1306 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 1307 intrmapptr++, intrclrptr += 4) { 1308 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 1309 (intrmapptr == &sc->sc_regs->pcia_slot2_int || 1310 intrmapptr == &sc->sc_regs->pcia_slot3_int)) 1311 continue; 1312 if (((*intrmapptr ^ vec) & 0x3c) == 0) { 1313 intrclrptr += vec & 0x3; 1314 goto found; 1315 } 1316 } 1317 1318 /* Finally check the two FFB slots */ 1319 intrclrptr = NULL; /* XXX? */ 1320 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 1321 intrmapptr <= &sc->sc_regs->ffb1_int_map; 1322 intrmapptr++) { 1323 if (INTVEC(*intrmapptr) == ino) 1324 goto found; 1325 } 1326 1327 printf("Cannot find interrupt vector %lx\n", vec); 1328 return (NULL); 1329 1330 found: 1331 /* Register the map and clear intr registers */ 1332 ih->ih_map = intrmapptr; 1333 ih->ih_clr = intrclrptr; 1334 1335 ih->ih_fun = handler; 1336 ih->ih_arg = arg; 1337 ih->ih_pil = level; 1338 ih->ih_number = ino | sc->sc_ign; 1339 1340 DPRINTF(PDB_INTR, ( 1341 "; installing handler %p arg %p with ino %u pil %u\n", 1342 handler, arg, (u_int)ino, (u_int)ih->ih_pil)); 1343 1344 intr_establish(ih->ih_pil, ih); 1345 1346 /* 1347 * Enable the interrupt now we have the handler installed. 1348 * Read the current value as we can't change it besides the 1349 * valid bit so so make sure only this bit is changed. 1350 * 1351 * XXXX --- we really should use bus_space for this. 1352 */ 1353 if (intrmapptr) { 1354 intrmap = *intrmapptr; 1355 DPRINTF(PDB_INTR, ("; read intrmap = %016qx", 1356 (unsigned long long)intrmap)); 1357 1358 /* Enable the interrupt */ 1359 intrmap |= INTMAP_V; 1360 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 1361 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", 1362 (unsigned long long)intrmap)); 1363 *intrmapptr = intrmap; 1364 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", 1365 (unsigned long long)(intrmap = *intrmapptr))); 1366 } 1367 return (ih); 1368 } 1369 1370 /* 1371 * hooks into the iommu dvma calls. 1372 */ 1373 int 1374 psycho_dmamap_load(t, map, buf, buflen, p, flags) 1375 bus_dma_tag_t t; 1376 bus_dmamap_t map; 1377 void *buf; 1378 bus_size_t buflen; 1379 struct proc *p; 1380 int flags; 1381 { 1382 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1383 1384 return (iommu_dvmamap_load(t, &pp->pp_sb, map, buf, buflen, p, flags)); 1385 } 1386 1387 void 1388 psycho_dmamap_unload(t, map) 1389 bus_dma_tag_t t; 1390 bus_dmamap_t map; 1391 { 1392 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1393 1394 iommu_dvmamap_unload(t, &pp->pp_sb, map); 1395 } 1396 1397 int 1398 psycho_dmamap_load_raw(t, map, segs, nsegs, size, flags) 1399 bus_dma_tag_t t; 1400 bus_dmamap_t map; 1401 bus_dma_segment_t *segs; 1402 int nsegs; 1403 bus_size_t size; 1404 int flags; 1405 { 1406 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1407 1408 return (iommu_dvmamap_load_raw(t, &pp->pp_sb, map, segs, nsegs, flags, size)); 1409 } 1410 1411 void 1412 psycho_dmamap_sync(t, map, offset, len, ops) 1413 bus_dma_tag_t t; 1414 bus_dmamap_t map; 1415 bus_addr_t offset; 1416 bus_size_t len; 1417 int ops; 1418 { 1419 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1420 1421 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 1422 /* Flush the CPU then the IOMMU */ 1423 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1424 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1425 } 1426 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 1427 /* Flush the IOMMU then the CPU */ 1428 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1429 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1430 } 1431 1432 } 1433 1434 int 1435 psycho_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 1436 bus_dma_tag_t t; 1437 bus_size_t size; 1438 bus_size_t alignment; 1439 bus_size_t boundary; 1440 bus_dma_segment_t *segs; 1441 int nsegs; 1442 int *rsegs; 1443 int flags; 1444 { 1445 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1446 1447 return (iommu_dvmamem_alloc(t, &pp->pp_sb, size, alignment, boundary, 1448 segs, nsegs, rsegs, flags)); 1449 } 1450 1451 void 1452 psycho_dmamem_free(t, segs, nsegs) 1453 bus_dma_tag_t t; 1454 bus_dma_segment_t *segs; 1455 int nsegs; 1456 { 1457 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1458 1459 iommu_dvmamem_free(t, &pp->pp_sb, segs, nsegs); 1460 } 1461 1462 int 1463 psycho_dmamem_map(t, segs, nsegs, size, kvap, flags) 1464 bus_dma_tag_t t; 1465 bus_dma_segment_t *segs; 1466 int nsegs; 1467 size_t size; 1468 caddr_t *kvap; 1469 int flags; 1470 { 1471 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1472 1473 return (iommu_dvmamem_map(t, &pp->pp_sb, segs, nsegs, size, kvap, flags)); 1474 } 1475 1476 void 1477 psycho_dmamem_unmap(t, kva, size) 1478 bus_dma_tag_t t; 1479 caddr_t kva; 1480 size_t size; 1481 { 1482 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1483 1484 iommu_dvmamem_unmap(t, &pp->pp_sb, kva, size); 1485 } 1486