1 /* $NetBSD: psycho.c,v 1.73 2004/08/30 15:05:19 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Eduardo E. Horvath 5 * Copyright (c) 1999, 2000 Matthew R. Green 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 26 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 27 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: psycho.c,v 1.73 2004/08/30 15:05:19 drochner Exp $"); 34 35 #include "opt_ddb.h" 36 37 /* 38 * Support for `psycho' and `psycho+' UPA to PCI bridge and 39 * UltraSPARC IIi and IIe `sabre' PCI controllers. 40 */ 41 42 #ifdef DEBUG 43 #define PDB_PROM 0x01 44 #define PDB_BUSMAP 0x02 45 #define PDB_INTR 0x04 46 int psycho_debug = 0x0; 47 #define DPRINTF(l, s) do { if (psycho_debug & l) printf s; } while (0) 48 #else 49 #define DPRINTF(l, s) 50 #endif 51 52 #include <sys/param.h> 53 #include <sys/device.h> 54 #include <sys/errno.h> 55 #include <sys/extent.h> 56 #include <sys/malloc.h> 57 #include <sys/systm.h> 58 #include <sys/time.h> 59 #include <sys/reboot.h> 60 61 #include <uvm/uvm.h> 62 63 #define _SPARC_BUS_DMA_PRIVATE 64 #include <machine/bus.h> 65 #include <machine/autoconf.h> 66 #include <machine/psl.h> 67 68 #include <dev/pci/pcivar.h> 69 #include <dev/pci/pcireg.h> 70 #include <dev/sysmon/sysmon_taskq.h> 71 72 #include <sparc64/dev/iommureg.h> 73 #include <sparc64/dev/iommuvar.h> 74 #include <sparc64/dev/psychoreg.h> 75 #include <sparc64/dev/psychovar.h> 76 #include <sparc64/sparc64/cache.h> 77 78 #include "ioconf.h" 79 80 static pci_chipset_tag_t psycho_alloc_chipset __P((struct psycho_pbm *, int, 81 pci_chipset_tag_t)); 82 static struct extent *psycho_alloc_extent __P((struct psycho_pbm *, int, int, 83 char *)); 84 static void psycho_get_bus_range __P((int, int *)); 85 static void psycho_get_ranges __P((int, struct psycho_ranges **, int *)); 86 static void psycho_set_intr __P((struct psycho_softc *, int, void *, 87 u_int64_t *, u_int64_t *)); 88 89 /* Interrupt handlers */ 90 static int psycho_ue __P((void *)); 91 static int psycho_ce __P((void *)); 92 static int psycho_bus_a __P((void *)); 93 static int psycho_bus_b __P((void *)); 94 static int psycho_powerfail __P((void *)); 95 static int psycho_wakeup __P((void *)); 96 97 98 /* IOMMU support */ 99 static void psycho_iommu_init __P((struct psycho_softc *, int)); 100 101 /* 102 * bus space and bus DMA support for UltraSPARC `psycho'. note that most 103 * of the bus DMA support is provided by the iommu dvma controller. 104 */ 105 static int get_childspace __P((int)); 106 static struct psycho_ranges *get_psychorange __P((struct psycho_pbm *, int)); 107 108 static paddr_t psycho_bus_mmap __P((bus_space_tag_t, bus_addr_t, off_t, 109 int, int)); 110 static int _psycho_bus_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, 111 vaddr_t, bus_space_handle_t *)); 112 static void *psycho_intr_establish __P((bus_space_tag_t, int, int, 113 int (*) __P((void *)), void *, void(*)__P((void)))); 114 115 static int psycho_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *, 116 bus_size_t, struct proc *, int)); 117 static void psycho_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t)); 118 static int psycho_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t, 119 bus_dma_segment_t *, int, bus_size_t, int)); 120 static void psycho_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 121 bus_size_t, int)); 122 int psycho_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 123 bus_dma_segment_t *, int, int *, int)); 124 void psycho_dmamem_free __P((bus_dma_tag_t, bus_dma_segment_t *, int)); 125 int psycho_dmamem_map __P((bus_dma_tag_t, bus_dma_segment_t *, int, size_t, 126 caddr_t *, int)); 127 void psycho_dmamem_unmap __P((bus_dma_tag_t, caddr_t, size_t)); 128 129 /* base pci_chipset */ 130 extern struct sparc_pci_chipset _sparc_pci_chipset; 131 132 /* power button handlers */ 133 static void psycho_register_power_button(struct psycho_softc *sc); 134 static void psycho_power_button_pressed(void *arg); 135 136 /* 137 * autoconfiguration 138 */ 139 static int psycho_match __P((struct device *, struct cfdata *, void *)); 140 static void psycho_attach __P((struct device *, struct device *, void *)); 141 static int psycho_print __P((void *aux, const char *p)); 142 143 CFATTACH_DECL(psycho, sizeof(struct psycho_softc), 144 psycho_match, psycho_attach, NULL, NULL); 145 146 /* 147 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a 148 * single PCI bus and does not have a streaming buffer. It often has an APB 149 * (advanced PCI bridge) connected to it, which was designed specifically for 150 * the IIi. The APB let's the IIi handle two independednt PCI buses, and 151 * appears as two "simba"'s underneath the sabre. 152 * 153 * "psycho" and "psycho+" is a dual UPA to PCI bridge. It sits on the UPA bus 154 * and manages two PCI buses. "psycho" has two 64-bit 33MHz buses, while 155 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 156 * will usually find a "psycho+" since I don't think the original "psycho" 157 * ever shipped, and if it did it would be in the U30. 158 * 159 * Each "psycho" PCI bus appears as a separate OFW node, but since they are 160 * both part of the same IC, they only have a single register space. As such, 161 * they need to be configured together, even though the autoconfiguration will 162 * attach them separately. 163 * 164 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often 165 * as pci1 and pci2, although they have been implemented with other PCI bus 166 * numbers on some machines. 167 * 168 * On UltraII machines, there can be any number of "psycho+" ICs, each 169 * providing two PCI buses. 170 * 171 * 172 * XXXX The psycho/sabre node has an `interrupts' attribute. They contain 173 * the values of the following interrupts in this order: 174 * 175 * PCI Bus Error (30) 176 * DMA UE (2e) 177 * DMA CE (2f) 178 * Power Fail (25) 179 * 180 * We really should attach handlers for each. 181 * 182 */ 183 184 #define ROM_PCI_NAME "pci" 185 186 struct psycho_names { 187 char *p_name; 188 int p_type; 189 } psycho_names[] = { 190 { "SUNW,psycho", PSYCHO_MODE_PSYCHO }, 191 { "pci108e,8000", PSYCHO_MODE_PSYCHO }, 192 { "SUNW,sabre", PSYCHO_MODE_SABRE }, 193 { "pci108e,a000", PSYCHO_MODE_SABRE }, 194 { "pci108e,a001", PSYCHO_MODE_SABRE }, 195 { NULL, 0 } 196 }; 197 198 static int 199 psycho_match(parent, match, aux) 200 struct device *parent; 201 struct cfdata *match; 202 void *aux; 203 { 204 struct mainbus_attach_args *ma = aux; 205 char *model = prom_getpropstring(ma->ma_node, "model"); 206 int i; 207 208 /* match on a name of "pci" and a sabre or a psycho */ 209 if (strcmp(ma->ma_name, ROM_PCI_NAME) == 0) { 210 for (i=0; psycho_names[i].p_name; i++) 211 if (strcmp(model, psycho_names[i].p_name) == 0) 212 return (1); 213 214 model = prom_getpropstring(ma->ma_node, "compatible"); 215 for (i=0; psycho_names[i].p_name; i++) 216 if (strcmp(model, psycho_names[i].p_name) == 0) 217 return (1); 218 } 219 return (0); 220 } 221 222 #ifdef DEBUG 223 static void psycho_dump_intmap(struct psycho_softc *sc); 224 static void 225 psycho_dump_intmap(struct psycho_softc *sc) 226 { 227 volatile u_int64_t *intrmapptr = NULL; 228 229 printf("psycho_dump_intmap: OBIO\n"); 230 231 for (intrmapptr = &sc->sc_regs->scsi_int_map; 232 intrmapptr < &sc->sc_regs->ue_int_map; 233 intrmapptr++) 234 printf("%p: %llx\n", intrmapptr, 235 (unsigned long long)*intrmapptr); 236 237 printf("\tintmap:pci\n"); 238 for (intrmapptr = &sc->sc_regs->pcia_slot0_int; 239 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 240 intrmapptr++) 241 printf("%p: %llx\n", intrmapptr, 242 (unsigned long long)*intrmapptr); 243 244 printf("\tintmap:ffb\n"); 245 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 246 intrmapptr <= &sc->sc_regs->ffb1_int_map; 247 intrmapptr++) 248 printf("%p: %llx\n", intrmapptr, 249 (unsigned long long)*intrmapptr); 250 } 251 #endif 252 253 /* 254 * SUNW,psycho initialisation .. 255 * - find the per-psycho registers 256 * - figure out the IGN. 257 * - find our partner psycho 258 * - configure ourselves 259 * - bus range, bus, 260 * - get interrupt-map and interrupt-map-mask 261 * - setup the chipsets. 262 * - if we're the first of the pair, initialise the IOMMU, otherwise 263 * just copy it's tags and addresses. 264 */ 265 static void 266 psycho_attach(parent, self, aux) 267 struct device *parent, *self; 268 void *aux; 269 { 270 struct psycho_softc *sc = (struct psycho_softc *)self; 271 struct psycho_softc *osc = NULL; 272 struct psycho_pbm *pp; 273 struct pcibus_attach_args pba; 274 struct mainbus_attach_args *ma = aux; 275 bus_space_handle_t bh; 276 u_int64_t csr; 277 int psycho_br[2], n, i; 278 bus_space_handle_t pci_ctl; 279 char *model = prom_getpropstring(ma->ma_node, "model"); 280 281 printf("\n"); 282 283 sc->sc_node = ma->ma_node; 284 sc->sc_bustag = ma->ma_bustag; 285 sc->sc_dmatag = ma->ma_dmatag; 286 287 /* 288 * Identify the device. 289 */ 290 for (i=0; psycho_names[i].p_name; i++) 291 if (strcmp(model, psycho_names[i].p_name) == 0) { 292 sc->sc_mode = psycho_names[i].p_type; 293 goto found; 294 } 295 296 model = prom_getpropstring(ma->ma_node, "compatible"); 297 for (i=0; psycho_names[i].p_name; i++) 298 if (strcmp(model, psycho_names[i].p_name) == 0) { 299 sc->sc_mode = psycho_names[i].p_type; 300 goto found; 301 } 302 303 panic("unknown psycho model %s", model); 304 found: 305 306 /* 307 * The psycho gets three register banks: 308 * (0) per-PBM configuration and status registers 309 * (1) per-PBM PCI configuration space, containing only the 310 * PBM 256-byte PCI header 311 * (2) the shared psycho configuration registers (struct psychoreg) 312 */ 313 314 /* Register layouts are different. stuupid. */ 315 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 316 sc->sc_basepaddr = (paddr_t)ma->ma_reg[2].ur_paddr; 317 318 if (ma->ma_naddress > 2) { 319 sparc_promaddr_to_handle(sc->sc_bustag, 320 ma->ma_address[2], &sc->sc_bh); 321 sparc_promaddr_to_handle(sc->sc_bustag, 322 ma->ma_address[0], &pci_ctl); 323 324 sc->sc_regs = (struct psychoreg *) 325 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 326 } else if (ma->ma_nreg > 2) { 327 328 /* We need to map this in ourselves. */ 329 if (bus_space_map(sc->sc_bustag, 330 ma->ma_reg[2].ur_paddr, 331 ma->ma_reg[2].ur_len, BUS_SPACE_MAP_LINEAR, 332 &sc->sc_bh)) 333 panic("psycho_attach: cannot map regs"); 334 sc->sc_regs = (struct psychoreg *) 335 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 336 337 if (bus_space_map(sc->sc_bustag, 338 ma->ma_reg[0].ur_paddr, 339 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 340 &pci_ctl)) 341 panic("psycho_attach: cannot map ctl"); 342 } else 343 panic("psycho_attach: %d not enough registers", 344 ma->ma_nreg); 345 346 } else { 347 sc->sc_basepaddr = (paddr_t)ma->ma_reg[0].ur_paddr; 348 349 if (ma->ma_naddress) { 350 sparc_promaddr_to_handle(sc->sc_bustag, 351 ma->ma_address[0], &sc->sc_bh); 352 sc->sc_regs = (struct psychoreg *) 353 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 354 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 355 offsetof(struct psychoreg, psy_pcictl), 356 sizeof(struct pci_ctl), &pci_ctl); 357 } else if (ma->ma_nreg) { 358 359 /* We need to map this in ourselves. */ 360 if (bus_space_map(sc->sc_bustag, 361 ma->ma_reg[0].ur_paddr, 362 ma->ma_reg[0].ur_len, BUS_SPACE_MAP_LINEAR, 363 &sc->sc_bh)) 364 panic("psycho_attach: cannot map regs"); 365 sc->sc_regs = (struct psychoreg *) 366 bus_space_vaddr(sc->sc_bustag, sc->sc_bh); 367 368 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 369 offsetof(struct psychoreg, psy_pcictl), 370 sizeof(struct pci_ctl), &pci_ctl); 371 } else 372 panic("psycho_attach: %d not enough registers", 373 ma->ma_nreg); 374 } 375 376 377 csr = bus_space_read_8(sc->sc_bustag, sc->sc_bh, 378 offsetof(struct psychoreg, psy_csr)); 379 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 380 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) 381 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; 382 383 printf("%s: impl %d, version %d: ign %x ", 384 model, PSYCHO_GCSR_IMPL(csr), PSYCHO_GCSR_VERS(csr), 385 sc->sc_ign); 386 /* 387 * Match other psycho's that are already configured against 388 * the base physical address. This will be the same for a 389 * pair of devices that share register space. 390 */ 391 for (n = 0; n < psycho_cd.cd_ndevs; n++) { 392 393 struct psycho_softc *asc = 394 (struct psycho_softc *)psycho_cd.cd_devs[n]; 395 396 if (asc == NULL || asc == sc) 397 /* This entry is not there or it is me */ 398 continue; 399 400 if (asc->sc_basepaddr != sc->sc_basepaddr) 401 /* This is an unrelated psycho */ 402 continue; 403 404 /* Found partner */ 405 osc = asc; 406 break; 407 } 408 409 410 /* Oh, dear. OK, lets get started */ 411 412 /* 413 * Setup the PCI control register 414 */ 415 csr = bus_space_read_8(sc->sc_bustag, pci_ctl, 416 offsetof(struct pci_ctl, pci_csr)); 417 csr |= PCICTL_MRLM | 418 PCICTL_ARB_PARK | 419 PCICTL_ERRINTEN | 420 PCICTL_4ENABLE; 421 csr &= ~(PCICTL_SERR | 422 PCICTL_CPU_PRIO | 423 PCICTL_ARB_PRIO | 424 PCICTL_RTRYWAIT); 425 bus_space_write_8(sc->sc_bustag, pci_ctl, 426 offsetof(struct pci_ctl, pci_csr), csr); 427 428 429 /* 430 * Allocate our psycho_pbm 431 */ 432 pp = sc->sc_psycho_this = malloc(sizeof *pp, M_DEVBUF, 433 M_NOWAIT | M_ZERO); 434 if (pp == NULL) 435 panic("could not allocate psycho pbm"); 436 437 pp->pp_sc = sc; 438 439 /* grab the psycho ranges */ 440 psycho_get_ranges(sc->sc_node, &pp->pp_range, &pp->pp_nrange); 441 442 /* get the bus-range for the psycho */ 443 psycho_get_bus_range(sc->sc_node, psycho_br); 444 445 pba.pba_bus = psycho_br[0]; 446 pba.pba_bridgetag = NULL; 447 pp->pp_busmax = psycho_br[1]; 448 449 printf("bus range %u to %u", psycho_br[0], psycho_br[1]); 450 printf("; PCI bus %d", psycho_br[0]); 451 452 pp->pp_pcictl = pci_ctl; 453 454 /* allocate our tags */ 455 pp->pp_memt = psycho_alloc_mem_tag(pp); 456 pp->pp_iot = psycho_alloc_io_tag(pp); 457 pp->pp_dmat = psycho_alloc_dma_tag(pp); 458 pp->pp_flags = (pp->pp_memt ? PCI_FLAGS_MEM_ENABLED : 0) | 459 (pp->pp_iot ? PCI_FLAGS_IO_ENABLED : 0); 460 461 /* allocate a chipset for this */ 462 pp->pp_pc = psycho_alloc_chipset(pp, sc->sc_node, &_sparc_pci_chipset); 463 464 /* setup the rest of the psycho pbm */ 465 pba.pba_pc = psycho_alloc_chipset(pp, sc->sc_node, pp->pp_pc); 466 467 switch((ma->ma_reg[0].ur_paddr) & 0xf000) { 468 case 0x2000: 469 pp->pp_id = PSYCHO_PBM_A; 470 break; 471 case 0x4000: 472 pp->pp_id = PSYCHO_PBM_B; 473 break; 474 } 475 476 printf("\n"); 477 478 /* allocate extents for free bus space */ 479 pp->pp_exmem = psycho_alloc_extent(pp, sc->sc_node, 0x02, "psycho mem"); 480 pp->pp_exio = psycho_alloc_extent(pp, sc->sc_node, 0x01, "psycho io"); 481 482 #ifdef DEBUG 483 if (psycho_debug & PDB_INTR) 484 psycho_dump_intmap(sc); 485 #endif 486 487 /* 488 * And finally, if we're a sabre or the first of a pair of psycho's to 489 * arrive here, start up the IOMMU and get a config space tag. 490 */ 491 if (osc == NULL) { 492 uint64_t timeo; 493 494 /* 495 * Establish handlers for interesting interrupts.... 496 * 497 * XXX We need to remember these and remove this to support 498 * hotplug on the UPA/FHC bus. 499 * 500 * XXX Not all controllers have these, but installing them 501 * is better than trying to sort through this mess. 502 */ 503 psycho_set_intr(sc, 15, psycho_ue, 504 &sc->sc_regs->ue_int_map, 505 &sc->sc_regs->ue_clr_int); 506 psycho_set_intr(sc, 1, psycho_ce, 507 &sc->sc_regs->ce_int_map, 508 &sc->sc_regs->ce_clr_int); 509 psycho_set_intr(sc, 15, psycho_bus_a, 510 &sc->sc_regs->pciaerr_int_map, 511 &sc->sc_regs->pciaerr_clr_int); 512 psycho_set_intr(sc, 15, psycho_powerfail, 513 &sc->sc_regs->power_int_map, 514 &sc->sc_regs->power_clr_int); 515 psycho_register_power_button(sc); 516 if (sc->sc_mode != PSYCHO_MODE_SABRE) { 517 /* sabre doesn't have these interrups */ 518 psycho_set_intr(sc, 15, psycho_bus_b, 519 &sc->sc_regs->pciberr_int_map, 520 &sc->sc_regs->pciberr_clr_int); 521 psycho_set_intr(sc, 1, psycho_wakeup, 522 &sc->sc_regs->pwrmgt_int_map, 523 &sc->sc_regs->pwrmgt_clr_int); 524 } 525 526 /* 527 * Apparently a number of machines with psycho and psycho+ 528 * controllers have interrupt latency issues. We'll try 529 * setting the interrupt retry timeout to 0xff which gives us 530 * a retry of 3-6 usec (which is what sysio is set to) for the 531 * moment, which seems to help alleviate this problem. 532 */ 533 timeo = sc->sc_regs->intr_retry_timer; 534 if (timeo > 0xfff) { 535 #ifdef DEBUG 536 printf("decreasing interrupt retry timeout " 537 "from %lx to 0xff\n", (long)timeo); 538 #endif 539 sc->sc_regs->intr_retry_timer = 0xff; 540 } 541 542 /* 543 * Allocate bus node, this contains a prom node per bus. 544 */ 545 pp->pp_busnode = malloc(sizeof(*pp->pp_busnode), M_DEVBUF, 546 M_NOWAIT | M_ZERO); 547 if (pp->pp_busnode == NULL) 548 panic("psycho_attach: malloc pp->pp_busnode"); 549 550 /* 551 * Setup IOMMU and PCI configuration if we're the first 552 * of a pair of psycho's to arrive here. 553 * 554 * We should calculate a TSB size based on amount of RAM 555 * and number of bus controllers and number an type of 556 * child devices. 557 * 558 * For the moment, 32KB should be more than enough. 559 */ 560 sc->sc_is = malloc(sizeof(struct iommu_state), 561 M_DEVBUF, M_NOWAIT); 562 if (sc->sc_is == NULL) 563 panic("psycho_attach: malloc iommu_state"); 564 565 /* Point the strbuf_ctl at the iommu_state */ 566 pp->pp_sb.sb_is = sc->sc_is; 567 568 sc->sc_is->is_sb[0] = sc->sc_is->is_sb[1] = NULL; 569 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 570 struct strbuf_ctl *sb = &pp->pp_sb; 571 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 572 573 /* 574 * Initialize the strbuf_ctl. 575 * 576 * The flush sync buffer must be 64-byte aligned. 577 */ 578 sb->sb_flush = (void *)(va & ~0x3f); 579 580 bus_space_subregion(sc->sc_bustag, pci_ctl, 581 offsetof(struct pci_ctl, pci_strbuf), 582 sizeof (struct iommu_strbuf), &sb->sb_sb); 583 584 /* Point our iommu at the strbuf_ctl */ 585 sc->sc_is->is_sb[0] = sb; 586 } 587 588 psycho_iommu_init(sc, 2); 589 590 sc->sc_configtag = psycho_alloc_config_tag(sc->sc_psycho_this); 591 592 /* 593 * XXX This is a really ugly hack because PCI config space 594 * is explicitly handled with unmapped accesses. 595 */ 596 i = sc->sc_bustag->type; 597 sc->sc_bustag->type = PCI_CONFIG_BUS_SPACE; 598 if (bus_space_map(sc->sc_bustag, sc->sc_basepaddr + 0x01000000, 599 0x01000000, 0, &bh)) 600 panic("could not map psycho PCI configuration space"); 601 sc->sc_bustag->type = i; 602 sc->sc_configaddr = bh; 603 } else { 604 /* Share bus numbers with the pair of mine */ 605 pp->pp_busnode = osc->sc_psycho_this->pp_busnode; 606 607 /* Just copy IOMMU state, config tag and address */ 608 sc->sc_is = osc->sc_is; 609 sc->sc_configtag = osc->sc_configtag; 610 sc->sc_configaddr = osc->sc_configaddr; 611 612 /* Point the strbuf_ctl at the iommu_state */ 613 pp->pp_sb.sb_is = sc->sc_is; 614 615 if (prom_getproplen(sc->sc_node, "no-streaming-cache") < 0) { 616 struct strbuf_ctl *sb = &pp->pp_sb; 617 vaddr_t va = (vaddr_t)&pp->pp_flush[0x40]; 618 619 /* 620 * Initialize the strbuf_ctl. 621 * 622 * The flush sync buffer must be 64-byte aligned. 623 */ 624 sb->sb_flush = (void *)(va & ~0x3f); 625 626 bus_space_subregion(sc->sc_bustag, pci_ctl, 627 offsetof(struct pci_ctl, pci_strbuf), 628 sizeof (struct iommu_strbuf), &sb->sb_sb); 629 630 /* Point our iommu at the strbuf_ctl */ 631 sc->sc_is->is_sb[1] = sb; 632 } 633 iommu_reset(sc->sc_is); 634 } 635 636 /* 637 * attach the pci.. note we pass PCI A tags, etc., for the sabre here. 638 */ 639 pba.pba_flags = sc->sc_psycho_this->pp_flags; 640 pba.pba_dmat = sc->sc_psycho_this->pp_dmat; 641 pba.pba_dmat64 = NULL; 642 pba.pba_iot = sc->sc_psycho_this->pp_iot; 643 pba.pba_memt = sc->sc_psycho_this->pp_memt; 644 645 config_found_ia(self, "pcibus", &pba, psycho_print); 646 } 647 648 static int 649 psycho_print(aux, p) 650 void *aux; 651 const char *p; 652 { 653 654 if (p == NULL) 655 return (UNCONF); 656 return (QUIET); 657 } 658 659 static void 660 psycho_set_intr(sc, ipl, handler, mapper, clearer) 661 struct psycho_softc *sc; 662 int ipl; 663 void *handler; 664 u_int64_t *mapper; 665 u_int64_t *clearer; 666 { 667 struct intrhand *ih; 668 669 ih = (struct intrhand *)malloc(sizeof(struct intrhand), 670 M_DEVBUF, M_NOWAIT); 671 ih->ih_arg = sc; 672 ih->ih_map = mapper; 673 ih->ih_clr = clearer; 674 ih->ih_fun = handler; 675 ih->ih_pil = (1<<ipl); 676 ih->ih_number = INTVEC(*(ih->ih_map)); 677 intr_establish(ipl, ih); 678 *(ih->ih_map) |= INTMAP_V; 679 } 680 681 /* 682 * power button handlers 683 */ 684 static void 685 psycho_register_power_button(struct psycho_softc *sc) 686 { 687 sysmon_task_queue_init(); 688 689 sc->sc_powerpressed = 0; 690 sc->sc_smcontext = malloc(sizeof(struct sysmon_pswitch), M_DEVBUF, 0); 691 if (!sc->sc_smcontext) { 692 printf("%s: could not allocate power button context\n", 693 sc->sc_dev.dv_xname); 694 return; 695 } 696 memset(sc->sc_smcontext, 0, sizeof(struct sysmon_pswitch)); 697 sc->sc_smcontext->smpsw_name = sc->sc_dev.dv_xname; 698 sc->sc_smcontext->smpsw_type = PSWITCH_TYPE_POWER; 699 if (sysmon_pswitch_register(sc->sc_smcontext) != 0) 700 printf("%s: unable to register power button with sysmon\n", 701 sc->sc_dev.dv_xname); 702 } 703 704 static void 705 psycho_power_button_pressed(void *arg) 706 { 707 struct psycho_softc *sc = arg; 708 709 sysmon_pswitch_event(sc->sc_smcontext, PSWITCH_EVENT_PRESSED); 710 sc->sc_powerpressed = 0; 711 } 712 713 /* 714 * PCI bus support 715 */ 716 717 /* 718 * allocate a PCI chipset tag and set it's cookie. 719 */ 720 static pci_chipset_tag_t 721 psycho_alloc_chipset(pp, node, pc) 722 struct psycho_pbm *pp; 723 int node; 724 pci_chipset_tag_t pc; 725 { 726 pci_chipset_tag_t npc; 727 728 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 729 if (npc == NULL) 730 panic("could not allocate pci_chipset_tag_t"); 731 memcpy(npc, pc, sizeof *pc); 732 npc->cookie = pp; 733 npc->rootnode = node; 734 735 return (npc); 736 } 737 738 /* 739 * create extent for free bus space, then allocate assigned regions. 740 */ 741 static struct extent * 742 psycho_alloc_extent(pp, node, ss, name) 743 struct psycho_pbm *pp; 744 int node; 745 int ss; 746 char *name; 747 { 748 struct psycho_registers *pa = NULL; 749 struct psycho_ranges *pr; 750 struct extent *ex; 751 bus_addr_t baddr, addr; 752 bus_size_t bsize, size; 753 int i, num; 754 755 /* get bus space size */ 756 pr = get_psychorange(pp, ss); 757 if (pr == NULL) { 758 printf("psycho_alloc_extent: get_psychorange failed\n"); 759 return NULL; 760 } 761 baddr = 0x00000000; 762 bsize = BUS_ADDR(pr->size_hi, pr->size_lo); 763 764 /* get available lists */ 765 num = 0; 766 if (prom_getprop(node, "available", sizeof(*pa), &num, &pa)) { 767 printf("psycho_alloc_extent: prom_getprop failed\n"); 768 return NULL; 769 } 770 771 /* create extent */ 772 ex = extent_create(name, baddr, bsize - baddr - 1, M_DEVBUF, 0, 0, 773 EX_NOWAIT); 774 if (ex == NULL) { 775 printf("psycho_alloc_extent: extent_create failed\n"); 776 goto ret; 777 } 778 779 /* allocate assigned regions */ 780 for (i = 0; i < num; i++) 781 if (((pa[i].phys_hi >> 24) & 0x03) == ss) { 782 /* allocate bus space */ 783 addr = BUS_ADDR(pa[i].phys_mid, pa[i].phys_lo); 784 size = BUS_ADDR(pa[i].size_hi, pa[i].size_lo); 785 if (extent_alloc_region(ex, baddr, addr - baddr, 786 EX_NOWAIT)) { 787 printf("psycho_alloc_extent: " 788 "extent_alloc_region %" PRIx64 "-%" 789 PRIx64 " failed\n", baddr, addr); 790 extent_destroy(ex); 791 ex = NULL; 792 goto ret; 793 } 794 baddr = addr + size; 795 } 796 /* allocate left region if available */ 797 if (baddr < bsize) 798 if (extent_alloc_region(ex, baddr, bsize - baddr, EX_NOWAIT)) { 799 printf("psycho_alloc_extent: extent_alloc_region %" 800 PRIx64 "-%" PRIx64 " failed\n", baddr, bsize); 801 extent_destroy(ex); 802 ex = NULL; 803 goto ret; 804 } 805 806 #ifdef DEBUG 807 /* print extent */ 808 extent_print(ex); 809 #endif 810 811 ret: 812 /* return extent */ 813 free(pa, M_DEVBUF); 814 return ex; 815 } 816 817 /* 818 * grovel the OBP for various psycho properties 819 */ 820 static void 821 psycho_get_bus_range(node, brp) 822 int node; 823 int *brp; 824 { 825 int n, error; 826 827 n = 2; 828 error = prom_getprop(node, "bus-range", sizeof(*brp), &n, &brp); 829 if (error) 830 panic("could not get psycho bus-range, error %d", error); 831 if (n != 2) 832 panic("broken psycho bus-range"); 833 DPRINTF(PDB_PROM, ("psycho debug: got `bus-range' for node %08x: %u - %u\n", 834 node, brp[0], brp[1])); 835 } 836 837 static void 838 psycho_get_ranges(node, rp, np) 839 int node; 840 struct psycho_ranges **rp; 841 int *np; 842 { 843 844 if (prom_getprop(node, "ranges", sizeof(**rp), np, rp)) 845 panic("could not get psycho ranges"); 846 DPRINTF(PDB_PROM, ("psycho debug: got `ranges' for node %08x: %d entries\n", node, *np)); 847 } 848 849 /* 850 * Interrupt handlers. 851 */ 852 853 static int 854 psycho_ue(arg) 855 void *arg; 856 { 857 struct psycho_softc *sc = (struct psycho_softc *)arg; 858 struct psychoreg *regs = sc->sc_regs; 859 long long afsr = regs->psy_ue_afsr; 860 long long afar = regs->psy_ue_afar; 861 long size = PAGE_SIZE<<(sc->sc_is->is_tsbsize); 862 struct iommu_state *is = sc->sc_is; 863 char bits[128]; 864 865 /* 866 * It's uncorrectable. Dump the regs and panic. 867 */ 868 printf("%s: uncorrectable DMA error AFAR %llx pa %llx AFSR %llx:\n%s\n", 869 sc->sc_dev.dv_xname, afar, 870 (long long)iommu_extract(is, (vaddr_t)afar), afsr, 871 bitmask_snprintf(afsr, PSYCHO_UE_AFSR_BITS, 872 bits, sizeof(bits))); 873 874 /* Sometimes the AFAR points to an IOTSB entry */ 875 if (afar >= is->is_ptsb && afar < is->is_ptsb + size) { 876 printf("IOVA %llx IOTTE %llx\n", 877 (long long)((afar - is->is_ptsb) * PAGE_SIZE + is->is_dvmabase), 878 (long long)ldxa(afar, ASI_PHYS_CACHED)); 879 } 880 #ifdef DDB 881 Debugger(); 882 #endif 883 regs->psy_ue_afar = 0; 884 regs->psy_ue_afsr = 0; 885 return (1); 886 } 887 static int 888 psycho_ce(arg) 889 void *arg; 890 { 891 struct psycho_softc *sc = (struct psycho_softc *)arg; 892 struct psychoreg *regs = sc->sc_regs; 893 894 /* 895 * It's correctable. Dump the regs and continue. 896 */ 897 898 printf("%s: correctable DMA error AFAR %llx AFSR %llx\n", 899 sc->sc_dev.dv_xname, 900 (long long)regs->psy_ce_afar, (long long)regs->psy_ce_afsr); 901 return (1); 902 } 903 static int 904 psycho_bus_a(arg) 905 void *arg; 906 { 907 struct psycho_softc *sc = (struct psycho_softc *)arg; 908 struct psychoreg *regs = sc->sc_regs; 909 910 /* 911 * It's uncorrectable. Dump the regs and panic. 912 */ 913 914 panic("%s: PCI bus A error AFAR %llx AFSR %llx", 915 sc->sc_dev.dv_xname, 916 (long long)regs->psy_pcictl[0].pci_afar, 917 (long long)regs->psy_pcictl[0].pci_afsr); 918 return (1); 919 } 920 static int 921 psycho_bus_b(arg) 922 void *arg; 923 { 924 struct psycho_softc *sc = (struct psycho_softc *)arg; 925 struct psychoreg *regs = sc->sc_regs; 926 927 /* 928 * It's uncorrectable. Dump the regs and panic. 929 */ 930 931 panic("%s: PCI bus B error AFAR %llx AFSR %llx", 932 sc->sc_dev.dv_xname, 933 (long long)regs->psy_pcictl[0].pci_afar, 934 (long long)regs->psy_pcictl[0].pci_afsr); 935 return (1); 936 } 937 938 static int 939 psycho_powerfail(arg) 940 void *arg; 941 { 942 struct psycho_softc *sc = (struct psycho_softc *)arg; 943 944 /* 945 * We lost power. Queue a callback with thread context to 946 * handle all the real work. 947 */ 948 if (sc->sc_powerpressed == 0 && sc->sc_smcontext != NULL) { 949 sc->sc_powerpressed = 1; 950 sysmon_task_queue_sched(0, psycho_power_button_pressed, sc); 951 } 952 return (1); 953 } 954 955 static 956 int psycho_wakeup(arg) 957 void *arg; 958 { 959 struct psycho_softc *sc = (struct psycho_softc *)arg; 960 961 /* 962 * Gee, we don't really have a framework to deal with this 963 * properly. 964 */ 965 printf("%s: power management wakeup\n", sc->sc_dev.dv_xname); 966 return (1); 967 } 968 969 970 971 /* 972 * initialise the IOMMU.. 973 */ 974 void 975 psycho_iommu_init(sc, tsbsize) 976 struct psycho_softc *sc; 977 int tsbsize; 978 { 979 char *name; 980 struct iommu_state *is = sc->sc_is; 981 u_int32_t iobase = -1; 982 int *vdma = NULL; 983 int nitem; 984 985 /* punch in our copies */ 986 is->is_bustag = sc->sc_bustag; 987 bus_space_subregion(sc->sc_bustag, sc->sc_bh, 988 offsetof(struct psychoreg, psy_iommu), 989 sizeof (struct iommureg), 990 &is->is_iommu); 991 992 /* 993 * Separate the men from the boys. Get the `virtual-dma' 994 * property for sabre and use that to make sure the damn 995 * iommu works. 996 * 997 * We could query the `#virtual-dma-size-cells' and 998 * `#virtual-dma-addr-cells' and DTRT, but I'm lazy. 999 */ 1000 nitem = 0; 1001 if (!prom_getprop(sc->sc_node, "virtual-dma", sizeof(vdma), &nitem, 1002 &vdma)) { 1003 /* Damn. Gotta use these values. */ 1004 iobase = vdma[0]; 1005 #define TSBCASE(x) case 1<<((x)+23): tsbsize = (x); break 1006 switch (vdma[1]) { 1007 TSBCASE(1); TSBCASE(2); TSBCASE(3); 1008 TSBCASE(4); TSBCASE(5); TSBCASE(6); 1009 default: 1010 printf("bogus tsb size %x, using 7\n", vdma[1]); 1011 TSBCASE(7); 1012 } 1013 #undef TSBCASE 1014 } 1015 1016 /* give us a nice name.. */ 1017 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 1018 if (name == 0) 1019 panic("couldn't malloc iommu name"); 1020 snprintf(name, 32, "%s dvma", sc->sc_dev.dv_xname); 1021 1022 iommu_init(name, is, tsbsize, iobase); 1023 } 1024 1025 /* 1026 * below here is bus space and bus DMA support 1027 */ 1028 bus_space_tag_t 1029 psycho_alloc_bus_tag(pp, type) 1030 struct psycho_pbm *pp; 1031 int type; 1032 { 1033 struct psycho_softc *sc = pp->pp_sc; 1034 bus_space_tag_t bt; 1035 1036 bt = (bus_space_tag_t) 1037 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 1038 if (bt == NULL) 1039 panic("could not allocate psycho bus tag"); 1040 1041 memset(bt, 0, sizeof *bt); 1042 bt->cookie = pp; 1043 bt->parent = sc->sc_bustag; 1044 bt->type = type; 1045 bt->sparc_bus_map = _psycho_bus_map; 1046 bt->sparc_bus_mmap = psycho_bus_mmap; 1047 bt->sparc_intr_establish = psycho_intr_establish; 1048 return (bt); 1049 } 1050 1051 bus_dma_tag_t 1052 psycho_alloc_dma_tag(pp) 1053 struct psycho_pbm *pp; 1054 { 1055 struct psycho_softc *sc = pp->pp_sc; 1056 bus_dma_tag_t dt, pdt = sc->sc_dmatag; 1057 1058 dt = (bus_dma_tag_t) 1059 malloc(sizeof(struct sparc_bus_dma_tag), M_DEVBUF, M_NOWAIT); 1060 if (dt == NULL) 1061 panic("could not allocate psycho DMA tag"); 1062 1063 memset(dt, 0, sizeof *dt); 1064 dt->_cookie = pp; 1065 dt->_parent = pdt; 1066 #define PCOPY(x) dt->x = pdt->x 1067 PCOPY(_dmamap_create); 1068 PCOPY(_dmamap_destroy); 1069 dt->_dmamap_load = psycho_dmamap_load; 1070 PCOPY(_dmamap_load_mbuf); 1071 PCOPY(_dmamap_load_uio); 1072 dt->_dmamap_load_raw = psycho_dmamap_load_raw; 1073 dt->_dmamap_unload = psycho_dmamap_unload; 1074 dt->_dmamap_sync = psycho_dmamap_sync; 1075 dt->_dmamem_alloc = psycho_dmamem_alloc; 1076 dt->_dmamem_free = psycho_dmamem_free; 1077 dt->_dmamem_map = psycho_dmamem_map; 1078 dt->_dmamem_unmap = psycho_dmamem_unmap; 1079 PCOPY(_dmamem_mmap); 1080 #undef PCOPY 1081 return (dt); 1082 } 1083 1084 /* 1085 * bus space support. <sparc64/dev/psychoreg.h> has a discussion about 1086 * PCI physical addresses. 1087 */ 1088 1089 static int 1090 get_childspace(type) 1091 int type; 1092 { 1093 int ss; 1094 1095 switch (type) { 1096 case PCI_CONFIG_BUS_SPACE: 1097 ss = 0x00; 1098 break; 1099 case PCI_IO_BUS_SPACE: 1100 ss = 0x01; 1101 break; 1102 case PCI_MEMORY_BUS_SPACE: 1103 ss = 0x02; 1104 break; 1105 #if 0 1106 /* we don't do 64 bit memory space */ 1107 case PCI_MEMORY64_BUS_SPACE: 1108 ss = 0x03; 1109 break; 1110 #endif 1111 default: 1112 panic("get_childspace: unknown bus type"); 1113 } 1114 1115 return (ss); 1116 } 1117 1118 static struct psycho_ranges * 1119 get_psychorange(pp, ss) 1120 struct psycho_pbm *pp; 1121 int ss; 1122 { 1123 int i; 1124 1125 for (i = 0; i < pp->pp_nrange; i++) { 1126 if (((pp->pp_range[i].cspace >> 24) & 0x03) == ss) 1127 return (&pp->pp_range[i]); 1128 } 1129 /* not found */ 1130 return (NULL); 1131 } 1132 1133 static int 1134 _psycho_bus_map(t, offset, size, flags, unused, hp) 1135 bus_space_tag_t t; 1136 bus_addr_t offset; 1137 bus_size_t size; 1138 int flags; 1139 vaddr_t unused; 1140 bus_space_handle_t *hp; 1141 { 1142 struct psycho_pbm *pp = t->cookie; 1143 struct psycho_softc *sc = pp->pp_sc; 1144 struct psycho_ranges *pr; 1145 bus_addr_t paddr; 1146 int ss; 1147 1148 DPRINTF(PDB_BUSMAP, 1149 ("_psycho_bus_map: type %d off %qx sz %qx flags %d", 1150 t->type, (unsigned long long)offset, 1151 (unsigned long long)size, flags)); 1152 1153 ss = get_childspace(t->type); 1154 DPRINTF(PDB_BUSMAP, (" cspace %d", ss)); 1155 1156 pr = get_psychorange(pp, ss); 1157 if (pr != NULL) { 1158 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1159 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_map: mapping paddr " 1160 "space %lx offset %lx paddr %qx\n", 1161 (long)ss, (long)offset, 1162 (unsigned long long)paddr)); 1163 return ((*sc->sc_bustag->sparc_bus_map)(t, paddr, size, 1164 flags, 0, hp)); 1165 } 1166 DPRINTF(PDB_BUSMAP, (" FAILED\n")); 1167 return (EINVAL); 1168 } 1169 1170 static paddr_t 1171 psycho_bus_mmap(t, paddr, off, prot, flags) 1172 bus_space_tag_t t; 1173 bus_addr_t paddr; 1174 off_t off; 1175 int prot; 1176 int flags; 1177 { 1178 bus_addr_t offset = paddr; 1179 struct psycho_pbm *pp = t->cookie; 1180 struct psycho_softc *sc = pp->pp_sc; 1181 struct psycho_ranges *pr; 1182 int ss; 1183 1184 ss = get_childspace(t->type); 1185 1186 DPRINTF(PDB_BUSMAP, ("_psycho_bus_mmap: prot %x flags %d pa %qx\n", 1187 prot, flags, (unsigned long long)paddr)); 1188 1189 pr = get_psychorange(pp, ss); 1190 if (pr != NULL) { 1191 paddr = BUS_ADDR(pr->phys_hi, pr->phys_lo + offset); 1192 DPRINTF(PDB_BUSMAP, ("\n_psycho_bus_mmap: mapping paddr " 1193 "space %lx offset %lx paddr %qx\n", 1194 (long)ss, (long)offset, 1195 (unsigned long long)paddr)); 1196 return (bus_space_mmap(sc->sc_bustag, paddr, off, 1197 prot, flags)); 1198 } 1199 1200 return (-1); 1201 } 1202 1203 /* 1204 * Get a PCI offset address from bus_space_handle_t. 1205 */ 1206 bus_addr_t 1207 psycho_bus_offset(t, hp) 1208 bus_space_tag_t t; 1209 bus_space_handle_t *hp; 1210 { 1211 struct psycho_pbm *pp = t->cookie; 1212 struct psycho_ranges *pr; 1213 bus_addr_t addr, offset; 1214 vaddr_t va; 1215 int ss; 1216 1217 addr = hp->_ptr; 1218 ss = get_childspace(t->type); 1219 DPRINTF(PDB_BUSMAP, ("psycho_bus_offset: type %d addr %" PRIx64 1220 " cspace %d", t->type, addr, ss)); 1221 1222 pr = get_psychorange(pp, ss); 1223 if (pr != NULL) { 1224 if (!PHYS_ASI(hp->_asi)) { 1225 va = trunc_page((vaddr_t)addr); 1226 if (pmap_extract(pmap_kernel(), va, &addr) == FALSE) { 1227 DPRINTF(PDB_BUSMAP, 1228 ("\n pmap_extract FAILED\n")); 1229 return (-1); 1230 } 1231 addr += hp->_ptr & PGOFSET; 1232 } 1233 offset = BUS_ADDR_PADDR(addr) - pr->phys_lo; 1234 DPRINTF(PDB_BUSMAP, ("\npsycho_bus_offset: paddr %" PRIx64 1235 " offset %" PRIx64 "\n", addr, offset)); 1236 return (offset); 1237 } 1238 DPRINTF(PDB_BUSMAP, ("\n FAILED\n")); 1239 return (-1); 1240 } 1241 1242 1243 /* 1244 * install an interrupt handler for a PCI device 1245 */ 1246 void * 1247 psycho_intr_establish(t, ihandle, level, handler, arg, fastvec) 1248 bus_space_tag_t t; 1249 int ihandle; 1250 int level; 1251 int (*handler) __P((void *)); 1252 void *arg; 1253 void (*fastvec) __P((void)); /* ignored */ 1254 { 1255 struct psycho_pbm *pp = t->cookie; 1256 struct psycho_softc *sc = pp->pp_sc; 1257 struct intrhand *ih; 1258 volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL; 1259 int64_t intrmap = 0; 1260 int ino; 1261 long vec = INTVEC(ihandle); 1262 1263 ih = (struct intrhand *) 1264 malloc(sizeof(struct intrhand), M_DEVBUF, M_NOWAIT); 1265 if (ih == NULL) 1266 return (NULL); 1267 1268 /* 1269 * Hunt through all the interrupt mapping regs to look for our 1270 * interrupt vector. 1271 * 1272 * XXX We only compare INOs rather than IGNs since the firmware may 1273 * not provide the IGN and the IGN is constant for all device on that 1274 * PCI controller. This could cause problems for the FFB/external 1275 * interrupt which has a full vector that can be set arbitrarily. 1276 */ 1277 1278 DPRINTF(PDB_INTR, ("\npsycho_intr_establish: ihandle %x vec %lx", ihandle, vec)); 1279 ino = INTINO(vec); 1280 DPRINTF(PDB_INTR, (" ino %x", ino)); 1281 1282 /* If the device didn't ask for an IPL, use the one encoded. */ 1283 if (level == IPL_NONE) level = INTLEV(vec); 1284 /* If it still has no level, print a warning and assign IPL 2 */ 1285 if (level == IPL_NONE) { 1286 printf("ERROR: no IPL, setting IPL 2.\n"); 1287 level = 2; 1288 } 1289 1290 DPRINTF(PDB_INTR, ("\npsycho: intr %lx: %p\nHunting for IRQ...\n", 1291 (long)ino, intrlev[ino])); 1292 1293 /* Hunt thru obio first */ 1294 for (intrmapptr = &sc->sc_regs->scsi_int_map, 1295 intrclrptr = &sc->sc_regs->scsi_clr_int; 1296 intrmapptr < &sc->sc_regs->ue_int_map; 1297 intrmapptr++, intrclrptr++) { 1298 if (INTINO(*intrmapptr) == ino) 1299 goto found; 1300 } 1301 1302 /* Now do PCI interrupts */ 1303 for (intrmapptr = &sc->sc_regs->pcia_slot0_int, 1304 intrclrptr = &sc->sc_regs->pcia0_clr_int[0]; 1305 intrmapptr <= &sc->sc_regs->pcib_slot3_int; 1306 intrmapptr++, intrclrptr += 4) { 1307 if (sc->sc_mode == PSYCHO_MODE_PSYCHO && 1308 (intrmapptr == &sc->sc_regs->pcia_slot2_int || 1309 intrmapptr == &sc->sc_regs->pcia_slot3_int)) 1310 continue; 1311 if (((*intrmapptr ^ vec) & 0x3c) == 0) { 1312 intrclrptr += vec & 0x3; 1313 goto found; 1314 } 1315 } 1316 1317 /* Finally check the two FFB slots */ 1318 intrclrptr = NULL; /* XXX? */ 1319 for (intrmapptr = &sc->sc_regs->ffb0_int_map; 1320 intrmapptr <= &sc->sc_regs->ffb1_int_map; 1321 intrmapptr++) { 1322 if (INTVEC(*intrmapptr) == ino) 1323 goto found; 1324 } 1325 1326 printf("Cannot find interrupt vector %lx\n", vec); 1327 return (NULL); 1328 1329 found: 1330 /* Register the map and clear intr registers */ 1331 ih->ih_map = intrmapptr; 1332 ih->ih_clr = intrclrptr; 1333 1334 ih->ih_fun = handler; 1335 ih->ih_arg = arg; 1336 ih->ih_pil = level; 1337 ih->ih_number = ino | sc->sc_ign; 1338 1339 DPRINTF(PDB_INTR, ( 1340 "; installing handler %p arg %p with ino %u pil %u\n", 1341 handler, arg, (u_int)ino, (u_int)ih->ih_pil)); 1342 1343 intr_establish(ih->ih_pil, ih); 1344 1345 /* 1346 * Enable the interrupt now we have the handler installed. 1347 * Read the current value as we can't change it besides the 1348 * valid bit so so make sure only this bit is changed. 1349 * 1350 * XXXX --- we really should use bus_space for this. 1351 */ 1352 if (intrmapptr) { 1353 intrmap = *intrmapptr; 1354 DPRINTF(PDB_INTR, ("; read intrmap = %016qx", 1355 (unsigned long long)intrmap)); 1356 1357 /* Enable the interrupt */ 1358 intrmap |= INTMAP_V; 1359 DPRINTF(PDB_INTR, ("; addr of intrmapptr = %p", intrmapptr)); 1360 DPRINTF(PDB_INTR, ("; writing intrmap = %016qx\n", 1361 (unsigned long long)intrmap)); 1362 *intrmapptr = intrmap; 1363 DPRINTF(PDB_INTR, ("; reread intrmap = %016qx", 1364 (unsigned long long)(intrmap = *intrmapptr))); 1365 } 1366 return (ih); 1367 } 1368 1369 /* 1370 * hooks into the iommu dvma calls. 1371 */ 1372 int 1373 psycho_dmamap_load(t, map, buf, buflen, p, flags) 1374 bus_dma_tag_t t; 1375 bus_dmamap_t map; 1376 void *buf; 1377 bus_size_t buflen; 1378 struct proc *p; 1379 int flags; 1380 { 1381 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1382 1383 return (iommu_dvmamap_load(t, &pp->pp_sb, map, buf, buflen, p, flags)); 1384 } 1385 1386 void 1387 psycho_dmamap_unload(t, map) 1388 bus_dma_tag_t t; 1389 bus_dmamap_t map; 1390 { 1391 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1392 1393 iommu_dvmamap_unload(t, &pp->pp_sb, map); 1394 } 1395 1396 int 1397 psycho_dmamap_load_raw(t, map, segs, nsegs, size, flags) 1398 bus_dma_tag_t t; 1399 bus_dmamap_t map; 1400 bus_dma_segment_t *segs; 1401 int nsegs; 1402 bus_size_t size; 1403 int flags; 1404 { 1405 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1406 1407 return (iommu_dvmamap_load_raw(t, &pp->pp_sb, map, segs, nsegs, flags, size)); 1408 } 1409 1410 void 1411 psycho_dmamap_sync(t, map, offset, len, ops) 1412 bus_dma_tag_t t; 1413 bus_dmamap_t map; 1414 bus_addr_t offset; 1415 bus_size_t len; 1416 int ops; 1417 { 1418 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1419 1420 if (ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) { 1421 /* Flush the CPU then the IOMMU */ 1422 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1423 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1424 } 1425 if (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) { 1426 /* Flush the IOMMU then the CPU */ 1427 iommu_dvmamap_sync(t, &pp->pp_sb, map, offset, len, ops); 1428 bus_dmamap_sync(t->_parent, map, offset, len, ops); 1429 } 1430 1431 } 1432 1433 int 1434 psycho_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags) 1435 bus_dma_tag_t t; 1436 bus_size_t size; 1437 bus_size_t alignment; 1438 bus_size_t boundary; 1439 bus_dma_segment_t *segs; 1440 int nsegs; 1441 int *rsegs; 1442 int flags; 1443 { 1444 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1445 1446 return (iommu_dvmamem_alloc(t, &pp->pp_sb, size, alignment, boundary, 1447 segs, nsegs, rsegs, flags)); 1448 } 1449 1450 void 1451 psycho_dmamem_free(t, segs, nsegs) 1452 bus_dma_tag_t t; 1453 bus_dma_segment_t *segs; 1454 int nsegs; 1455 { 1456 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1457 1458 iommu_dvmamem_free(t, &pp->pp_sb, segs, nsegs); 1459 } 1460 1461 int 1462 psycho_dmamem_map(t, segs, nsegs, size, kvap, flags) 1463 bus_dma_tag_t t; 1464 bus_dma_segment_t *segs; 1465 int nsegs; 1466 size_t size; 1467 caddr_t *kvap; 1468 int flags; 1469 { 1470 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1471 1472 return (iommu_dvmamem_map(t, &pp->pp_sb, segs, nsegs, size, kvap, flags)); 1473 } 1474 1475 void 1476 psycho_dmamem_unmap(t, kva, size) 1477 bus_dma_tag_t t; 1478 caddr_t kva; 1479 size_t size; 1480 { 1481 struct psycho_pbm *pp = (struct psycho_pbm *)t->_cookie; 1482 1483 iommu_dvmamem_unmap(t, &pp->pp_sb, kva, size); 1484 } 1485