xref: /netbsd-src/sys/arch/sparc64/dev/pckbc_ebus.c (revision bdc22b2e01993381dcefeff2bc9b56ca75a4235c)
1 /*	$NetBSD: pckbc_ebus.c,v 1.2 2015/08/14 10:59:27 nakayama Exp $ */
2 
3 /*
4  * Copyright (c) 2002 Valeriy E. Ushakov
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <sys/cdefs.h>
31 __KERNEL_RCSID(0, "$NetBSD: pckbc_ebus.c,v 1.2 2015/08/14 10:59:27 nakayama Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/device.h>
37 #include <sys/malloc.h>
38 #include <sys/bus.h>
39 #include <sys/intr.h>
40 
41 #include <machine/autoconf.h>
42 
43 #include <dev/ic/i8042reg.h>
44 #include <dev/ic/pckbcvar.h>
45 #include <dev/pckbport/pckbportvar.h>
46 
47 #include <dev/ebus/ebusreg.h>
48 #include <dev/ebus/ebusvar.h>
49 
50 struct pckbc_ebus_softc {
51 	struct pckbc_softc psc_pckbc;	/* real "pckbc" softc */
52 	uint32_t psc_intr[PCKBC_NSLOTS];
53 };
54 
55 static int	pckbc_ebus_match(device_t, cfdata_t, void *);
56 static void	pckbc_ebus_attach(device_t, device_t, void *);
57 
58 static void	pckbc_ebus_intr_establish(struct pckbc_softc *, pckbport_slot_t);
59 
60 #define PCKBC_PROM_DEVICE_NAME "8042"
61 #define PCKBC_PROM_DEVICE_NAME2 "kb_ps2"
62 
63 CFATTACH_DECL_NEW(pckbc_ebus, sizeof(struct pckbc_ebus_softc),
64     pckbc_ebus_match, pckbc_ebus_attach, NULL, NULL);
65 
66 
67 static int
68 pckbc_ebus_match(device_t parent, cfdata_t cf, void *aux)
69 {
70 	struct ebus_attach_args *ea = aux;
71 
72 	if (strcmp(ea->ea_name, PCKBC_PROM_DEVICE_NAME) == 0 ||
73 	    strcmp(ea->ea_name, PCKBC_PROM_DEVICE_NAME2) == 0)
74 		return 1;
75 	return 0;
76 }
77 
78 static void
79 pckbc_ebus_attach(device_t parent, device_t self, void *aux)
80 {
81 	struct pckbc_ebus_softc *sc = device_private(self);
82 	struct pckbc_softc *psc = (struct pckbc_softc *) sc;
83 	struct ebus_attach_args *ea = aux;
84 	struct pckbc_internal *t;
85 	bus_space_tag_t iot;
86 	bus_addr_t ioaddr;
87 	int stdin_node, node;
88 	int isconsole, i;
89 
90 	psc->sc_dv = self;
91 	iot = ea->ea_bustag;
92 	ioaddr = EBUS_ADDR_FROM_REG(&ea->ea_reg[0]);
93 
94 	stdin_node = prom_instance_to_package(prom_stdin());
95 	isconsole = 0;
96 	for (node = prom_firstchild(ea->ea_node);
97 	     node != 0; node = prom_nextsibling(node))
98 		if (node == stdin_node) {
99 			isconsole = 1;
100 			break;
101 		}
102 
103 	psc->intr_establish = pckbc_ebus_intr_establish;
104 
105 	if (ea->ea_nintr < PCKBC_NSLOTS) {
106 		aprint_error(": no intr %d", ea->ea_nintr);
107 
108 		/*
109 		 * XXX OpenBIOS doesn't provide interrupts for pckbc
110 		 * currently, so use the interrupt numbers described in
111 		 * QEMU's hw/sparc64/sun4u.c::isa_irq_handler.
112 		 */
113 		if (strcmp(machine_model, "OpenBiosTeam,OpenBIOS") == 0) {
114 			sc->psc_intr[PCKBC_KBD_SLOT] = 0x29;
115 			sc->psc_intr[PCKBC_AUX_SLOT] = 0x2a;
116 		} else {
117 			aprint_error("\n");
118 			return;
119 		}
120 	} else {
121 		for (i = 0; i < PCKBC_NSLOTS; i++)
122 			sc->psc_intr[i] = ea->ea_intr[i];
123 	}
124 
125 	if (isconsole) {
126 		int status;
127 
128 		status = pckbc_cnattach(iot, ioaddr, KBCMDP, 0,
129 		    PCKBC_NEED_AUXWRITE | PCKBC_CANT_TRANSLATE);
130 		if (status == 0)
131 			aprint_normal(": cnattach ok");
132 		else
133 			aprint_error(": cnattach %d", status);
134 	}
135 
136 	if (pckbc_is_console(iot, ioaddr)) {
137 		t = &pckbc_consdata;
138 		pckbc_console_attached = 1;
139 	} else {
140 		bus_space_handle_t ioh_d, ioh_c;
141 
142 		if (bus_space_map(iot, ioaddr + KBDATAP, 1, 0, &ioh_d) != 0) {
143 			aprint_error(": unable to map data register\n");
144 			return;
145 		}
146 
147 		if (bus_space_map(iot, ioaddr + KBCMDP,  1, 0, &ioh_c) != 0) {
148 			bus_space_unmap(iot, ioh_d, 1);
149 			aprint_error(": unable to map cmd register\n");
150 			return;
151 		}
152 
153 		t = malloc(sizeof(struct pckbc_internal), M_DEVBUF, M_WAITOK);
154 		memset(t, 0, sizeof(struct pckbc_internal));
155 		t->t_iot = iot;
156 		t->t_ioh_d = ioh_d;
157 		t->t_ioh_c = ioh_c;
158 		t->t_addr = ioaddr;
159 		t->t_cmdbyte = KC8_CPU; /* initial command: enable ports */
160 		callout_init(&t->t_cleanup, 0);
161 
162 		(void) pckbc_poll_data1(t, PCKBC_KBD_SLOT); /* flush */
163 
164 		if (pckbc_send_cmd(iot, ioh_c, KBC_SELFTEST) == 0)
165 			aprint_error(": unable to request self test");
166 		else {
167 			int response;
168 
169 			response = pckbc_poll_data1(t, PCKBC_KBD_SLOT);
170 			if (response == 0x55)
171 				aprint_normal(": selftest ok");
172 			else
173 				aprint_error(": selftest failed (0x%02x)",
174 				    response);
175 		}
176 	}
177 
178 	/* crosslink */
179 	t->t_sc = psc;
180 	psc->id = t;
181 
182 	/* finish off the attach */
183 	aprint_normal("\n");
184 	pckbc_attach(psc);
185 }
186 
187 
188 static void
189 pckbc_ebus_intr_establish(struct pckbc_softc *sc, pckbport_slot_t slot)
190 {
191 	struct pckbc_ebus_softc *psc = (struct pckbc_ebus_softc *)sc;
192 	void *res;
193 
194 	/* We assume that interrupt order is the same as slot order. */
195 	res = bus_intr_establish(sc->id->t_iot, psc->psc_intr[slot],
196 				 IPL_TTY, pckbcintr, sc);
197 	if (res == NULL)
198 		aprint_error_dev(sc->sc_dv,
199 		    "unable to establish %s slot interrupt\n",
200 		    pckbc_slot_names[slot]);
201 
202 	return;
203 }
204