1 /* $NetBSD: lom.c,v 1.8 2011/06/19 21:37:10 nakayama Exp $ */ 2 /* $OpenBSD: lom.c,v 1.21 2010/02/28 20:44:39 kettenis Exp $ */ 3 /* 4 * Copyright (c) 2009 Mark Kettenis 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <sys/cdefs.h> 20 __KERNEL_RCSID(0, "$NetBSD: lom.c,v 1.8 2011/06/19 21:37:10 nakayama Exp $"); 21 22 #include <sys/param.h> 23 #include <sys/device.h> 24 #include <sys/kernel.h> 25 #include <sys/proc.h> 26 #include <sys/envsys.h> 27 #include <sys/systm.h> 28 #include <sys/callout.h> 29 #include <sys/sysctl.h> 30 31 #include <machine/autoconf.h> 32 33 #include <dev/ebus/ebusreg.h> 34 #include <dev/ebus/ebusvar.h> 35 #include <dev/sysmon/sysmonvar.h> 36 37 /* 38 * LOMlite is a so far unidentified microcontroller. 39 */ 40 #define LOM1_STATUS 0x00 /* R */ 41 #define LOM1_STATUS_BUSY 0x80 42 #define LOM1_CMD 0x00 /* W */ 43 #define LOM1_DATA 0x01 /* R/W */ 44 45 /* 46 * LOMlite2 is implemented as a H8/3437 microcontroller which has its 47 * on-chip host interface hooked up to EBus. 48 */ 49 #define LOM2_DATA 0x00 /* R/W */ 50 #define LOM2_CMD 0x01 /* W */ 51 #define LOM2_STATUS 0x01 /* R */ 52 #define LOM2_STATUS_OBF 0x01 /* Output Buffer Full */ 53 #define LOM2_STATUS_IBF 0x02 /* Input Buffer Full */ 54 55 #define LOM_IDX_CMD 0x00 56 #define LOM_IDX_CMD_GENERIC 0x00 57 #define LOM_IDX_CMD_TEMP 0x04 58 #define LOM_IDX_CMD_FAN 0x05 59 60 #define LOM_IDX_FW_REV 0x01 /* Firmware revision */ 61 62 #define LOM_IDX_FAN1 0x04 /* Fan speed */ 63 #define LOM_IDX_FAN2 0x05 64 #define LOM_IDX_FAN3 0x06 65 #define LOM_IDX_FAN4 0x07 66 #define LOM_IDX_PSU1 0x08 /* PSU status */ 67 #define LOM_IDX_PSU2 0x09 68 #define LOM_IDX_PSU3 0x0a 69 #define LOM_PSU_INPUTA 0x01 70 #define LOM_PSU_INPUTB 0x02 71 #define LOM_PSU_OUTPUT 0x04 72 #define LOM_PSU_PRESENT 0x08 73 #define LOM_PSU_STANDBY 0x10 74 75 #define LOM_IDX_TEMP1 0x18 /* Temperature */ 76 #define LOM_IDX_TEMP2 0x19 77 #define LOM_IDX_TEMP3 0x1a 78 #define LOM_IDX_TEMP4 0x1b 79 #define LOM_IDX_TEMP5 0x1c 80 #define LOM_IDX_TEMP6 0x1d 81 #define LOM_IDX_TEMP7 0x1e 82 #define LOM_IDX_TEMP8 0x1f 83 84 #define LOM_IDX_LED1 0x25 85 86 #define LOM_IDX_ALARM 0x30 87 #define LOM_ALARM_1 0x01 88 #define LOM_ALARM_2 0x02 89 #define LOM_ALARM_3 0x04 90 #define LOM_ALARM_FAULT 0xf0 91 #define LOM_IDX_WDOG_CTL 0x31 92 #define LOM_WDOG_ENABLE 0x01 93 #define LOM_WDOG_RESET 0x02 94 #define LOM_WDOG_AL3_WDOG 0x04 95 #define LOM_WDOG_AL3_FANPSU 0x08 96 #define LOM_IDX_WDOG_TIME 0x32 97 #define LOM_WDOG_TIME_MAX 126 98 99 #define LOM1_IDX_HOSTNAME1 0x33 100 #define LOM1_IDX_HOSTNAME2 0x34 101 #define LOM1_IDX_HOSTNAME3 0x35 102 #define LOM1_IDX_HOSTNAME4 0x36 103 #define LOM1_IDX_HOSTNAME5 0x37 104 #define LOM1_IDX_HOSTNAME6 0x38 105 #define LOM1_IDX_HOSTNAME7 0x39 106 #define LOM1_IDX_HOSTNAME8 0x3a 107 #define LOM1_IDX_HOSTNAME9 0x3b 108 #define LOM1_IDX_HOSTNAME10 0x3c 109 #define LOM1_IDX_HOSTNAME11 0x3d 110 #define LOM1_IDX_HOSTNAME12 0x3e 111 112 #define LOM2_IDX_HOSTNAMELEN 0x38 113 #define LOM2_IDX_HOSTNAME 0x39 114 115 #define LOM_IDX_CONFIG 0x5d 116 #define LOM_IDX_FAN1_CAL 0x5e 117 #define LOM_IDX_FAN2_CAL 0x5f 118 #define LOM_IDX_FAN3_CAL 0x60 119 #define LOM_IDX_FAN4_CAL 0x61 120 #define LOM_IDX_FAN1_LOW 0x62 121 #define LOM_IDX_FAN2_LOW 0x63 122 #define LOM_IDX_FAN3_LOW 0x64 123 #define LOM_IDX_FAN4_LOW 0x65 124 125 #define LOM_IDX_CONFIG2 0x66 126 #define LOM_IDX_CONFIG3 0x67 127 128 #define LOM_IDX_PROBE55 0x7e /* Always returns 0x55 */ 129 #define LOM_IDX_PROBEAA 0x7f /* Always returns 0xaa */ 130 131 #define LOM_IDX_WRITE 0x80 132 133 #define LOM_IDX4_TEMP_NAME_START 0x40 134 #define LOM_IDX4_TEMP_NAME_END 0xff 135 136 #define LOM_IDX5_FAN_NAME_START 0x40 137 #define LOM_IDX5_FAN_NAME_END 0xff 138 139 #define LOM_MAX_ALARM 4 140 #define LOM_MAX_FAN 4 141 #define LOM_MAX_PSU 3 142 #define LOM_MAX_TEMP 8 143 144 struct lom_cmd { 145 uint8_t lc_cmd; 146 uint8_t lc_data; 147 148 TAILQ_ENTRY(lom_cmd) lc_next; 149 }; 150 151 struct lom_softc { 152 device_t sc_dev; 153 bus_space_tag_t sc_iot; 154 bus_space_handle_t sc_ioh; 155 156 int sc_type; 157 #define LOM_LOMLITE 0 158 #define LOM_LOMLITE2 2 159 int sc_space; 160 161 struct sysmon_envsys *sc_sme; 162 envsys_data_t sc_alarm[LOM_MAX_ALARM]; 163 envsys_data_t sc_fan[LOM_MAX_FAN]; 164 envsys_data_t sc_psu[LOM_MAX_PSU]; 165 envsys_data_t sc_temp[LOM_MAX_TEMP]; 166 167 int sc_num_alarm; 168 int sc_num_fan; 169 int sc_num_psu; 170 int sc_num_temp; 171 172 int32_t sc_sysctl_num[LOM_MAX_ALARM]; 173 174 struct timeval sc_alarm_lastread; 175 uint8_t sc_alarm_lastval; 176 struct timeval sc_fan_lastread[LOM_MAX_FAN]; 177 struct timeval sc_psu_lastread[LOM_MAX_PSU]; 178 struct timeval sc_temp_lastread[LOM_MAX_TEMP]; 179 180 uint8_t sc_fan_cal[LOM_MAX_FAN]; 181 uint8_t sc_fan_low[LOM_MAX_FAN]; 182 183 char sc_hostname[MAXHOSTNAMELEN]; 184 185 struct sysmon_wdog sc_smw; 186 int sc_wdog_period; 187 uint8_t sc_wdog_ctl; 188 struct lom_cmd sc_wdog_pat; 189 190 TAILQ_HEAD(, lom_cmd) sc_queue; 191 kmutex_t sc_queue_mtx; 192 struct callout sc_state_to; 193 int sc_state; 194 #define LOM_STATE_IDLE 0 195 #define LOM_STATE_CMD 1 196 #define LOM_STATE_DATA 2 197 int sc_retry; 198 }; 199 200 static int lom_match(device_t, cfdata_t, void *); 201 static void lom_attach(device_t, device_t, void *); 202 203 CFATTACH_DECL_NEW(lom, sizeof(struct lom_softc), 204 lom_match, lom_attach, NULL, NULL); 205 206 static int lom_read(struct lom_softc *, uint8_t, uint8_t *); 207 static int lom_write(struct lom_softc *, uint8_t, uint8_t); 208 static void lom_queue_cmd(struct lom_softc *, struct lom_cmd *); 209 static void lom_dequeue_cmd(struct lom_softc *, struct lom_cmd *); 210 static int lom1_read(struct lom_softc *, uint8_t, uint8_t *); 211 static int lom1_write(struct lom_softc *, uint8_t, uint8_t); 212 static int lom1_read_polled(struct lom_softc *, uint8_t, uint8_t *); 213 static int lom1_write_polled(struct lom_softc *, uint8_t, uint8_t); 214 static void lom1_queue_cmd(struct lom_softc *, struct lom_cmd *); 215 static void lom1_process_queue(void *); 216 static void lom1_process_queue_locked(struct lom_softc *); 217 static int lom2_read(struct lom_softc *, uint8_t, uint8_t *); 218 static int lom2_write(struct lom_softc *, uint8_t, uint8_t); 219 static int lom2_read_polled(struct lom_softc *, uint8_t, uint8_t *); 220 static int lom2_write_polled(struct lom_softc *, uint8_t, uint8_t); 221 static void lom2_queue_cmd(struct lom_softc *, struct lom_cmd *); 222 static int lom2_intr(void *); 223 224 static int lom_init_desc(struct lom_softc *); 225 static void lom_refresh(struct sysmon_envsys *, envsys_data_t *); 226 static void lom_refresh_alarm(struct lom_softc *, envsys_data_t *, uint32_t); 227 static void lom_refresh_fan(struct lom_softc *, envsys_data_t *, uint32_t); 228 static void lom_refresh_psu(struct lom_softc *, envsys_data_t *, uint32_t); 229 static void lom_refresh_temp(struct lom_softc *, envsys_data_t *, uint32_t); 230 static void lom1_write_hostname(struct lom_softc *); 231 static void lom2_write_hostname(struct lom_softc *); 232 233 static int lom_wdog_tickle(struct sysmon_wdog *); 234 static int lom_wdog_setmode(struct sysmon_wdog *); 235 236 static bool lom_shutdown(device_t, int); 237 238 SYSCTL_SETUP_PROTO(sysctl_lom_setup); 239 static int lom_sysctl_alarm(SYSCTLFN_PROTO); 240 241 static int hw_node = CTL_EOL; 242 static const char *nodename[LOM_MAX_ALARM] = 243 { "fault_led", "alarm1", "alarm2", "alarm3" }; 244 #ifdef SYSCTL_INCLUDE_DESCR 245 static const char *nodedesc[LOM_MAX_ALARM] = 246 { "Fault LED status", "Alarm1 status", "Alarm2 status ", "Alarm3 status" }; 247 #endif 248 static const struct timeval refresh_interval = { 1, 0 }; 249 250 static int 251 lom_match(device_t parent, cfdata_t match, void *aux) 252 { 253 struct ebus_attach_args *ea = aux; 254 255 if (strcmp(ea->ea_name, "SUNW,lom") == 0 || 256 strcmp(ea->ea_name, "SUNW,lomh") == 0) 257 return (1); 258 259 return (0); 260 } 261 262 static void 263 lom_attach(device_t parent, device_t self, void *aux) 264 { 265 struct lom_softc *sc = device_private(self); 266 struct ebus_attach_args *ea = aux; 267 uint8_t reg, fw_rev, config, config2, config3; 268 uint8_t cal, low; 269 int i; 270 const struct sysctlnode *node = NULL, *newnode; 271 272 if (strcmp(ea->ea_name, "SUNW,lomh") == 0) { 273 if (ea->ea_nintr < 1) { 274 aprint_error(": no interrupt\n"); 275 return; 276 } 277 sc->sc_type = LOM_LOMLITE2; 278 } 279 280 sc->sc_dev = self; 281 sc->sc_iot = ea->ea_bustag; 282 if (bus_space_map(sc->sc_iot, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]), 283 ea->ea_reg[0].size, 0, &sc->sc_ioh) != 0) { 284 aprint_error(": can't map register space\n"); 285 return; 286 } 287 288 if (sc->sc_type < LOM_LOMLITE2) { 289 /* XXX Magic */ 290 (void)bus_space_read_1(sc->sc_iot, sc->sc_ioh, 0); 291 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 3, 0xca); 292 } 293 294 if (lom_read(sc, LOM_IDX_PROBE55, ®) || reg != 0x55 || 295 lom_read(sc, LOM_IDX_PROBEAA, ®) || reg != 0xaa || 296 lom_read(sc, LOM_IDX_FW_REV, &fw_rev) || 297 lom_read(sc, LOM_IDX_CONFIG, &config)) 298 { 299 aprint_error(": not responding\n"); 300 return; 301 } 302 303 aprint_normal(": %s: %s rev %d.%d\n", ea->ea_name, 304 sc->sc_type < LOM_LOMLITE2 ? "LOMlite" : "LOMlite2", 305 fw_rev >> 4, fw_rev & 0x0f); 306 307 TAILQ_INIT(&sc->sc_queue); 308 mutex_init(&sc->sc_queue_mtx, MUTEX_DEFAULT, IPL_BIO); 309 310 config2 = config3 = 0; 311 if (sc->sc_type < LOM_LOMLITE2) { 312 /* 313 * LOMlite doesn't do interrupts so we limp along on 314 * timeouts. 315 */ 316 callout_init(&sc->sc_state_to, 0); 317 callout_setfunc(&sc->sc_state_to, lom1_process_queue, sc); 318 } else { 319 lom_read(sc, LOM_IDX_CONFIG2, &config2); 320 lom_read(sc, LOM_IDX_CONFIG3, &config3); 321 322 bus_intr_establish(sc->sc_iot, ea->ea_intr[0], 323 IPL_BIO, lom2_intr, sc); 324 } 325 326 sc->sc_num_alarm = LOM_MAX_ALARM; 327 sc->sc_num_fan = min((config >> 5) & 0x7, LOM_MAX_FAN); 328 sc->sc_num_psu = min((config >> 3) & 0x3, LOM_MAX_PSU); 329 sc->sc_num_temp = min((config2 >> 4) & 0xf, LOM_MAX_TEMP); 330 331 aprint_verbose_dev(self, "%d fan(s), %d PSU(s), %d temp sensor(s)\n", 332 sc->sc_num_fan, sc->sc_num_psu, sc->sc_num_temp); 333 334 for (i = 0; i < sc->sc_num_fan; i++) { 335 if (lom_read(sc, LOM_IDX_FAN1_CAL + i, &cal) || 336 lom_read(sc, LOM_IDX_FAN1_LOW + i, &low)) { 337 aprint_error_dev(self, "can't read fan information\n"); 338 return; 339 } 340 sc->sc_fan_cal[i] = cal; 341 sc->sc_fan_low[i] = low; 342 } 343 344 /* Setup our sysctl subtree, hw.lomN */ 345 if (hw_node != CTL_EOL) 346 sysctl_createv(NULL, 0, NULL, &node, 347 0, CTLTYPE_NODE, device_xname(self), NULL, 348 NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); 349 350 /* Initialize sensor data. */ 351 sc->sc_sme = sysmon_envsys_create(); 352 for (i = 0; i < sc->sc_num_alarm; i++) { 353 sc->sc_alarm[i].units = ENVSYS_INDICATOR; 354 snprintf(sc->sc_alarm[i].desc, sizeof(sc->sc_alarm[i].desc), 355 i == 0 ? "Fault LED" : "Alarm%d", i); 356 if (sysmon_envsys_sensor_attach(sc->sc_sme, &sc->sc_alarm[i])) { 357 sysmon_envsys_destroy(sc->sc_sme); 358 aprint_error_dev(self, "can't attach alarm sensor\n"); 359 return; 360 } 361 if (node != NULL) { 362 sysctl_createv(NULL, 0, NULL, &newnode, 363 CTLFLAG_READWRITE, CTLTYPE_INT, nodename[i], 364 SYSCTL_DESCR(nodedesc[i]), 365 lom_sysctl_alarm, 0, sc, 0, 366 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL); 367 if (newnode != NULL) 368 sc->sc_sysctl_num[i] = newnode->sysctl_num; 369 else 370 sc->sc_sysctl_num[i] = 0; 371 } 372 } 373 for (i = 0; i < sc->sc_num_fan; i++) { 374 sc->sc_fan[i].units = ENVSYS_SFANRPM; 375 snprintf(sc->sc_fan[i].desc, sizeof(sc->sc_fan[i].desc), 376 "fan%d", i + 1); 377 if (sysmon_envsys_sensor_attach(sc->sc_sme, &sc->sc_fan[i])) { 378 sysmon_envsys_destroy(sc->sc_sme); 379 aprint_error_dev(self, "can't attach fan sensor\n"); 380 return; 381 } 382 } 383 for (i = 0; i < sc->sc_num_psu; i++) { 384 sc->sc_psu[i].units = ENVSYS_INDICATOR; 385 snprintf(sc->sc_psu[i].desc, sizeof(sc->sc_psu[i].desc), 386 "PSU%d", i + 1); 387 if (sysmon_envsys_sensor_attach(sc->sc_sme, &sc->sc_psu[i])) { 388 sysmon_envsys_destroy(sc->sc_sme); 389 aprint_error_dev(self, "can't attach PSU sensor\n"); 390 return; 391 } 392 } 393 for (i = 0; i < sc->sc_num_temp; i++) { 394 sc->sc_temp[i].units = ENVSYS_STEMP; 395 snprintf(sc->sc_temp[i].desc, sizeof(sc->sc_temp[i].desc), 396 "temp%d", i + 1); 397 if (sysmon_envsys_sensor_attach(sc->sc_sme, &sc->sc_temp[i])) { 398 sysmon_envsys_destroy(sc->sc_sme); 399 aprint_error_dev(self, "can't attach temp sensor\n"); 400 return; 401 } 402 } 403 if (lom_init_desc(sc)) { 404 aprint_error_dev(self, "can't read sensor names\n"); 405 sysmon_envsys_destroy(sc->sc_sme); 406 return; 407 } 408 409 sc->sc_sme->sme_name = device_xname(self); 410 sc->sc_sme->sme_cookie = sc; 411 sc->sc_sme->sme_refresh = lom_refresh; 412 if (sysmon_envsys_register(sc->sc_sme)) { 413 aprint_error_dev(self, 414 "unable to register envsys with sysmon\n"); 415 sysmon_envsys_destroy(sc->sc_sme); 416 return; 417 } 418 419 /* Initialize watchdog. */ 420 lom_write(sc, LOM_IDX_WDOG_TIME, LOM_WDOG_TIME_MAX); 421 lom_read(sc, LOM_IDX_WDOG_CTL, &sc->sc_wdog_ctl); 422 sc->sc_wdog_ctl &= ~(LOM_WDOG_ENABLE|LOM_WDOG_RESET); 423 lom_write(sc, LOM_IDX_WDOG_CTL, sc->sc_wdog_ctl); 424 425 sc->sc_wdog_period = LOM_WDOG_TIME_MAX; 426 427 sc->sc_smw.smw_name = device_xname(self); 428 sc->sc_smw.smw_cookie = sc; 429 sc->sc_smw.smw_setmode = lom_wdog_setmode; 430 sc->sc_smw.smw_tickle = lom_wdog_tickle; 431 sc->sc_smw.smw_period = sc->sc_wdog_period; 432 if (sysmon_wdog_register(&sc->sc_smw)) { 433 aprint_error_dev(self, 434 "unable to register wdog with sysmon\n"); 435 return; 436 } 437 438 aprint_verbose_dev(self, "Watchdog timer configured.\n"); 439 440 if (!pmf_device_register1(self, NULL, NULL, lom_shutdown)) 441 aprint_error_dev(self, "unable to register power handler\n"); 442 } 443 444 static int 445 lom_read(struct lom_softc *sc, uint8_t reg, uint8_t *val) 446 { 447 if (sc->sc_type < LOM_LOMLITE2) 448 return lom1_read(sc, reg, val); 449 else 450 return lom2_read(sc, reg, val); 451 } 452 453 static int 454 lom_write(struct lom_softc *sc, uint8_t reg, uint8_t val) 455 { 456 if (sc->sc_type < LOM_LOMLITE2) 457 return lom1_write(sc, reg, val); 458 else 459 return lom2_write(sc, reg, val); 460 } 461 462 static void 463 lom_queue_cmd(struct lom_softc *sc, struct lom_cmd *lc) 464 { 465 if (sc->sc_type < LOM_LOMLITE2) 466 return lom1_queue_cmd(sc, lc); 467 else 468 return lom2_queue_cmd(sc, lc); 469 } 470 471 static void 472 lom_dequeue_cmd(struct lom_softc *sc, struct lom_cmd *lc) 473 { 474 struct lom_cmd *lcp; 475 476 mutex_enter(&sc->sc_queue_mtx); 477 TAILQ_FOREACH(lcp, &sc->sc_queue, lc_next) { 478 if (lcp == lc) { 479 TAILQ_REMOVE(&sc->sc_queue, lc, lc_next); 480 break; 481 } 482 } 483 mutex_exit(&sc->sc_queue_mtx); 484 } 485 486 static int 487 lom1_read(struct lom_softc *sc, uint8_t reg, uint8_t *val) 488 { 489 struct lom_cmd lc; 490 int error; 491 492 if (cold) 493 return lom1_read_polled(sc, reg, val); 494 495 lc.lc_cmd = reg; 496 lc.lc_data = 0xff; 497 lom1_queue_cmd(sc, &lc); 498 499 error = tsleep(&lc, PZERO, "lomrd", hz); 500 if (error) 501 lom_dequeue_cmd(sc, &lc); 502 503 *val = lc.lc_data; 504 505 return (error); 506 } 507 508 static int 509 lom1_write(struct lom_softc *sc, uint8_t reg, uint8_t val) 510 { 511 struct lom_cmd lc; 512 int error; 513 514 if (cold) 515 return lom1_write_polled(sc, reg, val); 516 517 lc.lc_cmd = reg | LOM_IDX_WRITE; 518 lc.lc_data = val; 519 lom1_queue_cmd(sc, &lc); 520 521 error = tsleep(&lc, PZERO, "lomwr", 2 * hz); 522 if (error) 523 lom_dequeue_cmd(sc, &lc); 524 525 return (error); 526 } 527 528 static int 529 lom1_read_polled(struct lom_softc *sc, uint8_t reg, uint8_t *val) 530 { 531 uint8_t str; 532 int i; 533 534 /* Wait for input buffer to become available. */ 535 for (i = 30; i > 0; i--) { 536 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_STATUS); 537 delay(1000); 538 if ((str & LOM1_STATUS_BUSY) == 0) 539 break; 540 } 541 if (i == 0) 542 return (ETIMEDOUT); 543 544 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_CMD, reg); 545 546 /* Wait until the microcontroller fills output buffer. */ 547 for (i = 30; i > 0; i--) { 548 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_STATUS); 549 delay(1000); 550 if ((str & LOM1_STATUS_BUSY) == 0) 551 break; 552 } 553 if (i == 0) 554 return (ETIMEDOUT); 555 556 *val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA); 557 return (0); 558 } 559 560 static int 561 lom1_write_polled(struct lom_softc *sc, uint8_t reg, uint8_t val) 562 { 563 uint8_t str; 564 int i; 565 566 /* Wait for input buffer to become available. */ 567 for (i = 30; i > 0; i--) { 568 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_STATUS); 569 delay(1000); 570 if ((str & LOM1_STATUS_BUSY) == 0) 571 break; 572 } 573 if (i == 0) 574 return (ETIMEDOUT); 575 576 reg |= LOM_IDX_WRITE; 577 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_CMD, reg); 578 579 /* Wait until the microcontroller fills output buffer. */ 580 for (i = 30; i > 0; i--) { 581 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_STATUS); 582 delay(1000); 583 if ((str & LOM1_STATUS_BUSY) == 0) 584 break; 585 } 586 if (i == 0) 587 return (ETIMEDOUT); 588 589 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA, val); 590 591 return (0); 592 } 593 594 static void 595 lom1_queue_cmd(struct lom_softc *sc, struct lom_cmd *lc) 596 { 597 mutex_enter(&sc->sc_queue_mtx); 598 TAILQ_INSERT_TAIL(&sc->sc_queue, lc, lc_next); 599 if (sc->sc_state == LOM_STATE_IDLE) { 600 sc->sc_state = LOM_STATE_CMD; 601 lom1_process_queue_locked(sc); 602 } 603 mutex_exit(&sc->sc_queue_mtx); 604 } 605 606 static void 607 lom1_process_queue(void *arg) 608 { 609 struct lom_softc *sc = arg; 610 611 mutex_enter(&sc->sc_queue_mtx); 612 lom1_process_queue_locked(sc); 613 mutex_exit(&sc->sc_queue_mtx); 614 } 615 616 static void 617 lom1_process_queue_locked(struct lom_softc *sc) 618 { 619 struct lom_cmd *lc; 620 uint8_t str; 621 622 lc = TAILQ_FIRST(&sc->sc_queue); 623 if (lc == NULL) { 624 sc->sc_state = LOM_STATE_IDLE; 625 return; 626 } 627 628 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_STATUS); 629 if (str & LOM1_STATUS_BUSY) { 630 if (sc->sc_retry++ < 30) { 631 callout_schedule(&sc->sc_state_to, mstohz(1)); 632 return; 633 } 634 635 /* 636 * Looks like the microcontroller got wedged. Unwedge 637 * it by writing this magic value. Give it some time 638 * to recover. 639 */ 640 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA, 0xac); 641 callout_schedule(&sc->sc_state_to, mstohz(1000)); 642 sc->sc_state = LOM_STATE_CMD; 643 return; 644 } 645 646 sc->sc_retry = 0; 647 648 if (sc->sc_state == LOM_STATE_CMD) { 649 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_CMD, lc->lc_cmd); 650 sc->sc_state = LOM_STATE_DATA; 651 callout_schedule(&sc->sc_state_to, mstohz(250)); 652 return; 653 } 654 655 KASSERT(sc->sc_state == LOM_STATE_DATA); 656 if ((lc->lc_cmd & LOM_IDX_WRITE) == 0) 657 lc->lc_data = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA); 658 else 659 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM1_DATA, lc->lc_data); 660 661 TAILQ_REMOVE(&sc->sc_queue, lc, lc_next); 662 663 wakeup(lc); 664 665 if (!TAILQ_EMPTY(&sc->sc_queue)) { 666 sc->sc_state = LOM_STATE_CMD; 667 callout_schedule(&sc->sc_state_to, mstohz(1)); 668 return; 669 } 670 671 sc->sc_state = LOM_STATE_IDLE; 672 } 673 674 static int 675 lom2_read(struct lom_softc *sc, uint8_t reg, uint8_t *val) 676 { 677 struct lom_cmd lc; 678 int error; 679 680 if (cold) 681 return lom2_read_polled(sc, reg, val); 682 683 lc.lc_cmd = reg; 684 lc.lc_data = 0xff; 685 lom2_queue_cmd(sc, &lc); 686 687 error = tsleep(&lc, PZERO, "lom2rd", hz); 688 if (error) 689 lom_dequeue_cmd(sc, &lc); 690 691 *val = lc.lc_data; 692 693 return (error); 694 } 695 696 static int 697 lom2_read_polled(struct lom_softc *sc, uint8_t reg, uint8_t *val) 698 { 699 uint8_t str; 700 int i; 701 702 /* Wait for input buffer to become available. */ 703 for (i = 1000; i > 0; i--) { 704 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 705 delay(10); 706 if ((str & LOM2_STATUS_IBF) == 0) 707 break; 708 } 709 if (i == 0) 710 return (ETIMEDOUT); 711 712 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM2_CMD, reg); 713 714 /* Wait until the microcontroller fills output buffer. */ 715 for (i = 1000; i > 0; i--) { 716 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 717 delay(10); 718 if (str & LOM2_STATUS_OBF) 719 break; 720 } 721 if (i == 0) 722 return (ETIMEDOUT); 723 724 *val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA); 725 return (0); 726 } 727 728 static int 729 lom2_write(struct lom_softc *sc, uint8_t reg, uint8_t val) 730 { 731 struct lom_cmd lc; 732 int error; 733 734 if (cold) 735 return lom2_write_polled(sc, reg, val); 736 737 lc.lc_cmd = reg | LOM_IDX_WRITE; 738 lc.lc_data = val; 739 lom2_queue_cmd(sc, &lc); 740 741 error = tsleep(&lc, PZERO, "lom2wr", hz); 742 if (error) 743 lom_dequeue_cmd(sc, &lc); 744 745 return (error); 746 } 747 748 static int 749 lom2_write_polled(struct lom_softc *sc, uint8_t reg, uint8_t val) 750 { 751 uint8_t str; 752 int i; 753 754 /* Wait for input buffer to become available. */ 755 for (i = 1000; i > 0; i--) { 756 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 757 delay(10); 758 if ((str & LOM2_STATUS_IBF) == 0) 759 break; 760 } 761 if (i == 0) 762 return (ETIMEDOUT); 763 764 if (sc->sc_space == LOM_IDX_CMD_GENERIC && reg != LOM_IDX_CMD) 765 reg |= LOM_IDX_WRITE; 766 767 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM2_CMD, reg); 768 769 /* Wait until the microcontroller fills output buffer. */ 770 for (i = 1000; i > 0; i--) { 771 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 772 delay(10); 773 if (str & LOM2_STATUS_OBF) 774 break; 775 } 776 if (i == 0) 777 return (ETIMEDOUT); 778 779 (void)bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA); 780 781 /* Wait for input buffer to become available. */ 782 for (i = 1000; i > 0; i--) { 783 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 784 delay(10); 785 if ((str & LOM2_STATUS_IBF) == 0) 786 break; 787 } 788 if (i == 0) 789 return (ETIMEDOUT); 790 791 bus_space_write_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA, val); 792 793 /* Wait until the microcontroller fills output buffer. */ 794 for (i = 1000; i > 0; i--) { 795 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 796 delay(10); 797 if (str & LOM2_STATUS_OBF) 798 break; 799 } 800 if (i == 0) 801 return (ETIMEDOUT); 802 803 (void)bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA); 804 805 /* If we switched spaces, remember the one we're in now. */ 806 if (reg == LOM_IDX_CMD) 807 sc->sc_space = val; 808 809 return (0); 810 } 811 812 static void 813 lom2_queue_cmd(struct lom_softc *sc, struct lom_cmd *lc) 814 { 815 uint8_t str; 816 817 mutex_enter(&sc->sc_queue_mtx); 818 TAILQ_INSERT_TAIL(&sc->sc_queue, lc, lc_next); 819 if (sc->sc_state == LOM_STATE_IDLE) { 820 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 821 if ((str & LOM2_STATUS_IBF) == 0) { 822 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 823 LOM2_CMD, lc->lc_cmd); 824 sc->sc_state = LOM_STATE_DATA; 825 } 826 } 827 mutex_exit(&sc->sc_queue_mtx); 828 } 829 830 static int 831 lom2_intr(void *arg) 832 { 833 struct lom_softc *sc = arg; 834 struct lom_cmd *lc; 835 uint8_t str, obr; 836 837 mutex_enter(&sc->sc_queue_mtx); 838 839 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 840 obr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_DATA); 841 842 lc = TAILQ_FIRST(&sc->sc_queue); 843 if (lc == NULL) { 844 mutex_exit(&sc->sc_queue_mtx); 845 return (0); 846 } 847 848 if (lc->lc_cmd & LOM_IDX_WRITE) { 849 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 850 LOM2_DATA, lc->lc_data); 851 lc->lc_cmd &= ~LOM_IDX_WRITE; 852 mutex_exit(&sc->sc_queue_mtx); 853 return (1); 854 } 855 856 KASSERT(sc->sc_state = LOM_STATE_DATA); 857 lc->lc_data = obr; 858 859 TAILQ_REMOVE(&sc->sc_queue, lc, lc_next); 860 861 wakeup(lc); 862 863 sc->sc_state = LOM_STATE_IDLE; 864 865 if (!TAILQ_EMPTY(&sc->sc_queue)) { 866 str = bus_space_read_1(sc->sc_iot, sc->sc_ioh, LOM2_STATUS); 867 if ((str & LOM2_STATUS_IBF) == 0) { 868 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 869 LOM2_CMD, lc->lc_cmd); 870 sc->sc_state = LOM_STATE_DATA; 871 } 872 } 873 874 mutex_exit(&sc->sc_queue_mtx); 875 876 return (1); 877 } 878 879 static int 880 lom_init_desc(struct lom_softc *sc) 881 { 882 uint8_t val; 883 int i, j, k; 884 int error; 885 886 /* LOMlite doesn't provide sensor descriptions. */ 887 if (sc->sc_type < LOM_LOMLITE2) 888 return (0); 889 890 /* 891 * Read temperature sensor names. 892 */ 893 error = lom_write(sc, LOM_IDX_CMD, LOM_IDX_CMD_TEMP); 894 if (error) 895 return (error); 896 897 i = 0; 898 j = 0; 899 k = LOM_IDX4_TEMP_NAME_START; 900 while (k <= LOM_IDX4_TEMP_NAME_END) { 901 error = lom_read(sc, k++, &val); 902 if (error) 903 goto fail; 904 905 if (val == 0xff) 906 break; 907 908 if (j < sizeof (sc->sc_temp[i].desc) - 1) 909 sc->sc_temp[i].desc[j++] = val; 910 911 if (val == '\0') { 912 i++; 913 j = 0; 914 if (i < sc->sc_num_temp) 915 continue; 916 917 break; 918 } 919 } 920 921 /* 922 * Read fan names. 923 */ 924 error = lom_write(sc, LOM_IDX_CMD, LOM_IDX_CMD_FAN); 925 if (error) 926 return (error); 927 928 i = 0; 929 j = 0; 930 k = LOM_IDX5_FAN_NAME_START; 931 while (k <= LOM_IDX5_FAN_NAME_END) { 932 error = lom_read(sc, k++, &val); 933 if (error) 934 goto fail; 935 936 if (val == 0xff) 937 break; 938 939 if (j < sizeof (sc->sc_fan[i].desc) - 1) 940 sc->sc_fan[i].desc[j++] = val; 941 942 if (val == '\0') { 943 i++; 944 j = 0; 945 if (i < sc->sc_num_fan) 946 continue; 947 948 break; 949 } 950 } 951 952 fail: 953 lom_write(sc, LOM_IDX_CMD, LOM_IDX_CMD_GENERIC); 954 return (error); 955 } 956 957 static void 958 lom_refresh(struct sysmon_envsys *sme, envsys_data_t *edata) 959 { 960 struct lom_softc *sc = sme->sme_cookie; 961 uint32_t i; 962 963 /* Sensor number */ 964 i = edata->sensor; 965 966 /* Sensor type */ 967 switch (edata->units) { 968 case ENVSYS_INDICATOR: 969 if (i < sc->sc_num_alarm) 970 lom_refresh_alarm(sc, edata, i); 971 else 972 lom_refresh_psu(sc, edata, 973 i - sc->sc_num_alarm - sc->sc_num_fan); 974 break; 975 case ENVSYS_SFANRPM: 976 lom_refresh_fan(sc, edata, i - sc->sc_num_alarm); 977 break; 978 case ENVSYS_STEMP: 979 lom_refresh_temp(sc, edata, 980 i - sc->sc_num_alarm - sc->sc_num_fan - sc->sc_num_psu); 981 break; 982 default: 983 edata->state = ENVSYS_SINVALID; 984 break; 985 } 986 987 /* 988 * If our hostname is set and differs from what's stored in 989 * the LOM, write the new hostname back to the LOM. Note that 990 * we include the terminating NUL when writing the hostname 991 * back to the LOM, otherwise the LOM will print any trailing 992 * garbage. 993 */ 994 if (i == 0 && hostnamelen > 0 && 995 strncmp(sc->sc_hostname, hostname, sizeof(hostname)) != 0) { 996 if (sc->sc_type < LOM_LOMLITE2) 997 lom1_write_hostname(sc); 998 else 999 lom2_write_hostname(sc); 1000 strlcpy(sc->sc_hostname, hostname, sizeof(hostname)); 1001 } 1002 } 1003 1004 static void 1005 lom_refresh_alarm(struct lom_softc *sc, envsys_data_t *edata, uint32_t i) 1006 { 1007 uint8_t val; 1008 1009 /* Fault LED or Alarms */ 1010 KASSERT(i < sc->sc_num_alarm); 1011 1012 /* Read new value at most once every second. */ 1013 if (ratecheck(&sc->sc_alarm_lastread, &refresh_interval)) { 1014 if (lom_read(sc, LOM_IDX_ALARM, &val)) { 1015 edata->state = ENVSYS_SINVALID; 1016 return; 1017 } 1018 sc->sc_alarm_lastval = val; 1019 } else { 1020 val = sc->sc_alarm_lastval; 1021 } 1022 1023 if (i == 0) { 1024 /* Fault LED */ 1025 if ((val & LOM_ALARM_FAULT) == LOM_ALARM_FAULT) 1026 edata->value_cur = 0; 1027 else 1028 edata->value_cur = 1; 1029 } else { 1030 /* Alarms */ 1031 if ((val & (LOM_ALARM_1 << (i - 1))) == 0) 1032 edata->value_cur = 0; 1033 else 1034 edata->value_cur = 1; 1035 } 1036 edata->state = ENVSYS_SVALID; 1037 } 1038 1039 static void 1040 lom_refresh_fan(struct lom_softc *sc, envsys_data_t *edata, uint32_t i) 1041 { 1042 uint8_t val; 1043 1044 /* Fan speed */ 1045 KASSERT(i < sc->sc_num_fan); 1046 1047 /* Read new value at most once every second. */ 1048 if (!ratecheck(&sc->sc_fan_lastread[i], &refresh_interval)) 1049 return; 1050 1051 if (lom_read(sc, LOM_IDX_FAN1 + i, &val)) { 1052 edata->state = ENVSYS_SINVALID; 1053 } else { 1054 edata->value_cur = (60 * sc->sc_fan_cal[i] * val) / 100; 1055 if (val < sc->sc_fan_low[i]) 1056 edata->state = ENVSYS_SCRITICAL; 1057 else 1058 edata->state = ENVSYS_SVALID; 1059 } 1060 } 1061 1062 static void 1063 lom_refresh_psu(struct lom_softc *sc, envsys_data_t *edata, uint32_t i) 1064 { 1065 uint8_t val; 1066 1067 /* PSU status */ 1068 KASSERT(i < sc->sc_num_psu); 1069 1070 /* Read new value at most once every second. */ 1071 if (!ratecheck(&sc->sc_psu_lastread[i], &refresh_interval)) 1072 return; 1073 1074 if (lom_read(sc, LOM_IDX_PSU1 + i, &val) || 1075 !ISSET(val, LOM_PSU_PRESENT)) { 1076 edata->state = ENVSYS_SINVALID; 1077 } else { 1078 if (val & LOM_PSU_STANDBY) { 1079 edata->value_cur = 0; 1080 edata->state = ENVSYS_SVALID; 1081 } else { 1082 edata->value_cur = 1; 1083 if (ISSET(val, LOM_PSU_INPUTA) && 1084 ISSET(val, LOM_PSU_INPUTB) && 1085 ISSET(val, LOM_PSU_OUTPUT)) 1086 edata->state = ENVSYS_SVALID; 1087 else 1088 edata->state = ENVSYS_SCRITICAL; 1089 } 1090 } 1091 } 1092 1093 static void 1094 lom_refresh_temp(struct lom_softc *sc, envsys_data_t *edata, uint32_t i) 1095 { 1096 uint8_t val; 1097 1098 /* Temperature */ 1099 KASSERT(i < sc->sc_num_temp); 1100 1101 /* Read new value at most once every second. */ 1102 if (!ratecheck(&sc->sc_temp_lastread[i], &refresh_interval)) 1103 return; 1104 1105 if (lom_read(sc, LOM_IDX_TEMP1 + i, &val)) { 1106 edata->state = ENVSYS_SINVALID; 1107 } else { 1108 edata->value_cur = val * 1000000 + 273150000; 1109 edata->state = ENVSYS_SVALID; 1110 } 1111 } 1112 1113 static void 1114 lom1_write_hostname(struct lom_softc *sc) 1115 { 1116 char name[(LOM1_IDX_HOSTNAME12 - LOM1_IDX_HOSTNAME1 + 1) + 1]; 1117 char *p; 1118 int i; 1119 1120 /* 1121 * LOMlite generally doesn't have enough space to store the 1122 * fully qualified hostname. If the hostname is too long, 1123 * strip off the domain name. 1124 */ 1125 strlcpy(name, hostname, sizeof(name)); 1126 if (hostnamelen >= sizeof(name)) { 1127 p = strchr(name, '.'); 1128 if (p) 1129 *p = '\0'; 1130 } 1131 1132 for (i = 0; i < strlen(name) + 1; i++) 1133 if (lom_write(sc, LOM1_IDX_HOSTNAME1 + i, name[i])) 1134 break; 1135 } 1136 1137 static void 1138 lom2_write_hostname(struct lom_softc *sc) 1139 { 1140 int i; 1141 1142 lom_write(sc, LOM2_IDX_HOSTNAMELEN, hostnamelen + 1); 1143 for (i = 0; i < hostnamelen + 1; i++) 1144 lom_write(sc, LOM2_IDX_HOSTNAME, hostname[i]); 1145 } 1146 1147 static int 1148 lom_wdog_tickle(struct sysmon_wdog *smw) 1149 { 1150 struct lom_softc *sc = smw->smw_cookie; 1151 1152 /* Pat the dog. */ 1153 sc->sc_wdog_pat.lc_cmd = LOM_IDX_WDOG_CTL | LOM_IDX_WRITE; 1154 sc->sc_wdog_pat.lc_data = sc->sc_wdog_ctl; 1155 lom_queue_cmd(sc, &sc->sc_wdog_pat); 1156 1157 return 0; 1158 } 1159 1160 static int 1161 lom_wdog_setmode(struct sysmon_wdog *smw) 1162 { 1163 struct lom_softc *sc = smw->smw_cookie; 1164 1165 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 1166 /* disable watchdog */ 1167 sc->sc_wdog_ctl &= ~(LOM_WDOG_ENABLE|LOM_WDOG_RESET); 1168 lom_write(sc, LOM_IDX_WDOG_CTL, sc->sc_wdog_ctl); 1169 } else { 1170 if (smw->smw_period == WDOG_PERIOD_DEFAULT) 1171 smw->smw_period = sc->sc_wdog_period; 1172 else if (smw->smw_period == 0 || 1173 smw->smw_period > LOM_WDOG_TIME_MAX) 1174 return EINVAL; 1175 lom_write(sc, LOM_IDX_WDOG_TIME, smw->smw_period); 1176 1177 /* enable watchdog */ 1178 lom_dequeue_cmd(sc, &sc->sc_wdog_pat); 1179 sc->sc_wdog_ctl |= LOM_WDOG_ENABLE|LOM_WDOG_RESET; 1180 sc->sc_wdog_pat.lc_cmd = LOM_IDX_WDOG_CTL | LOM_IDX_WRITE; 1181 sc->sc_wdog_pat.lc_data = sc->sc_wdog_ctl; 1182 lom_queue_cmd(sc, &sc->sc_wdog_pat); 1183 } 1184 1185 return 0; 1186 } 1187 1188 static bool 1189 lom_shutdown(device_t dev, int how) 1190 { 1191 struct lom_softc *sc = device_private(dev); 1192 1193 sc->sc_wdog_ctl &= ~LOM_WDOG_ENABLE; 1194 lom_write(sc, LOM_IDX_WDOG_CTL, sc->sc_wdog_ctl); 1195 return true; 1196 } 1197 1198 SYSCTL_SETUP(sysctl_lom_setup, "sysctl hw.lom subtree setup") 1199 { 1200 const struct sysctlnode *node; 1201 1202 if (sysctl_createv(clog, 0, NULL, &node, 1203 CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL, 1204 NULL, 0, NULL, 0, CTL_HW, CTL_EOL) != 0) 1205 return; 1206 1207 hw_node = node->sysctl_num; 1208 } 1209 1210 static int 1211 lom_sysctl_alarm(SYSCTLFN_ARGS) 1212 { 1213 struct sysctlnode node; 1214 struct lom_softc *sc; 1215 int i, tmp, error; 1216 uint8_t val; 1217 1218 node = *rnode; 1219 sc = node.sysctl_data; 1220 1221 for (i = 0; i < sc->sc_num_alarm; i++) { 1222 if (node.sysctl_num == sc->sc_sysctl_num[i]) { 1223 lom_refresh_alarm(sc, &sc->sc_alarm[i], i); 1224 tmp = sc->sc_alarm[i].value_cur; 1225 node.sysctl_data = &tmp; 1226 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 1227 if (error || newp == NULL) 1228 return error; 1229 if (tmp < 0 || tmp > 1) 1230 return EINVAL; 1231 1232 if (lom_read(sc, LOM_IDX_ALARM, &val)) 1233 return EINVAL; 1234 if (i == 0) { 1235 /* Fault LED */ 1236 if (tmp != 0) 1237 val &= ~LOM_ALARM_FAULT; 1238 else 1239 val |= LOM_ALARM_FAULT; 1240 } else { 1241 /* Alarms */ 1242 if (tmp != 0) 1243 val |= LOM_ALARM_1 << (i - 1); 1244 else 1245 val &= ~(LOM_ALARM_1 << (i - 1)); 1246 } 1247 if (lom_write(sc, LOM_IDX_ALARM, val)) 1248 return EINVAL; 1249 1250 sc->sc_alarm[i].value_cur = tmp; 1251 return 0; 1252 } 1253 } 1254 1255 return ENOENT; 1256 } 1257