xref: /netbsd-src/sys/arch/sparc64/dev/ebus_mainbus.c (revision 4391d5e9d4f291db41e3b3ba26a01b5e51364aae)
1 /*	$NetBSD: ebus_mainbus.c,v 1.11 2013/09/12 19:51:09 martin Exp $	*/
2 /*	$OpenBSD: ebus_mainbus.c,v 1.7 2010/11/11 17:58:23 miod Exp $	*/
3 
4 /*
5  * Copyright (c) 2007 Mark Kettenis
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include <sys/cdefs.h>
21 __KERNEL_RCSID(0, "$NetBSD: ebus_mainbus.c,v 1.11 2013/09/12 19:51:09 martin Exp $");
22 
23 #ifdef DEBUG
24 #define	EDB_PROM	0x01
25 #define EDB_CHILD	0x02
26 #define	EDB_INTRMAP	0x04
27 #define EDB_BUSMAP	0x08
28 #define EDB_BUSDMA	0x10
29 #define EDB_INTR	0x20
30 extern int ebus_debug;
31 #define DPRINTF(l, s)   do { if (ebus_debug & l) printf s; } while (0)
32 #else
33 #define DPRINTF(l, s)
34 #endif
35 
36 #include <sys/param.h>
37 #include <sys/conf.h>
38 #include <sys/device.h>
39 #include <sys/errno.h>
40 #include <sys/extent.h>
41 #include <sys/malloc.h>
42 #include <sys/systm.h>
43 #include <sys/time.h>
44 
45 #define _SPARC_BUS_DMA_PRIVATE
46 #include <sys/bus.h>
47 #include <machine/autoconf.h>
48 #include <machine/openfirm.h>
49 
50 #include <dev/pci/pcivar.h>
51 
52 #include <sparc64/dev/iommureg.h>
53 #include <sparc64/dev/iommuvar.h>
54 #include <sparc64/dev/pyrovar.h>
55 #include <dev/ebus/ebusreg.h>
56 #include <dev/ebus/ebusvar.h>
57 #include <sparc64/dev/ebusvar.h>
58 
59 int	ebus_mainbus_match(device_t, cfdata_t, void *);
60 void	ebus_mainbus_attach(device_t, device_t, void *);
61 
62 CFATTACH_DECL_NEW(ebus_mainbus, sizeof(struct ebus_softc),
63     ebus_mainbus_match, ebus_mainbus_attach, NULL, NULL);
64 
65 static int ebus_mainbus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
66 	vaddr_t, bus_space_handle_t *);
67 static void *ebus_mainbus_intr_establish(bus_space_tag_t, int, int,
68 	int (*)(void *), void *, void (*)(void));
69 static bus_space_tag_t ebus_mainbus_alloc_bus_tag(struct ebus_softc *,
70 	bus_space_tag_t, int);
71 #ifdef SUN4V
72 static void ebus_mainbus_intr_ack(struct intrhand *);
73 #endif
74 
75 int
76 ebus_mainbus_match(device_t parent, cfdata_t cf, void *aux)
77 {
78 	struct mainbus_attach_args *ma = aux;
79 
80 	if (strcmp(ma->ma_name, "ebus") == 0)
81 		return (1);
82 	return (0);
83 }
84 
85 void
86 ebus_mainbus_attach(device_t parent, device_t self, void *aux)
87 {
88 	struct ebus_softc *sc = device_private(self);
89 	struct mainbus_attach_args *ma = aux;
90 	struct ebus_attach_args eba;
91 	struct ebus_interrupt_map_mask *immp;
92 	int node, nmapmask, error;
93 	struct pyro_softc *psc;
94 	int i;
95 
96 	sc->sc_dev = self;
97 	sc->sc_node = node = ma->ma_node;
98 	sc->sc_ign = INTIGN((ma->ma_upaid) << INTMAP_IGN_SHIFT);
99 
100 	if (CPU_ISSUN4U) {
101 		printf(": ign %x", sc->sc_ign);
102 		/* XXX */
103 		extern struct cfdriver pyro_cd;
104 
105 		for (i = 0; i < pyro_cd.cd_ndevs; i++) {
106 			device_t dt = pyro_cd.cd_devs[i];
107 			psc = device_private(dt);
108 			if (psc && psc->sc_ign == sc->sc_ign) {
109 				sc->sc_bust = psc->sc_bustag;
110 				sc->sc_csr = psc->sc_csr;
111 				sc->sc_csrh = psc->sc_csrh;
112 				break;
113 			}
114 		}
115 
116 		if (sc->sc_csr == 0) {
117 			printf(": can't find matching host bridge leaf\n");
118 			return;
119 		}
120 	}
121 
122 	printf("\n");
123 
124 	sc->sc_memtag = ebus_mainbus_alloc_bus_tag(sc, ma->ma_bustag,
125 						   PCI_MEMORY_BUS_SPACE);
126 	sc->sc_iotag = ebus_mainbus_alloc_bus_tag(sc, ma->ma_bustag,
127 						  PCI_IO_BUS_SPACE);
128 	sc->sc_childbustag = sc->sc_memtag;
129 	sc->sc_dmatag = ma->ma_dmatag;
130 
131 	/*
132 	 * fill in our softc with information from the prom
133 	 */
134 	sc->sc_intmap = NULL;
135 	sc->sc_range = NULL;
136 	error = prom_getprop(node, "interrupt-map",
137 			sizeof(struct ebus_interrupt_map),
138 			&sc->sc_nintmap, (void **)&sc->sc_intmap);
139 	switch (error) {
140 	case 0:
141 		immp = &sc->sc_intmapmask;
142 		nmapmask = 1;
143 		error = prom_getprop(node, "interrupt-map-mask",
144 			    sizeof(struct ebus_interrupt_map_mask), &nmapmask,
145 			    (void **)&immp);
146 		if (error)
147 			panic("could not get ebus interrupt-map-mask: error %d",
148 			      error);
149 		if (nmapmask != 1)
150 			panic("ebus interrupt-map-mask is broken");
151 		break;
152 	case ENOENT:
153 		break;
154 	default:
155 		panic("ebus interrupt-map: error %d", error);
156 		break;
157 	}
158 
159 	error = prom_getprop(node, "ranges", sizeof(struct ebus_mainbus_ranges),
160 	    &sc->sc_nrange, (void **)&sc->sc_range);
161 	if (error)
162 		panic("ebus ranges: error %d", error);
163 
164 	/*
165 	 * now attach all our children
166 	 */
167 	DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node));
168 	for (node = firstchild(node); node; node = nextsibling(node)) {
169 		if (ebus_setup_attach_args(sc, node, &eba) != 0) {
170 			DPRINTF(EDB_CHILD,
171 			    ("ebus_mainbus_attach: %s: incomplete\n",
172 			    prom_getpropstring(node, "name")));
173 			continue;
174 		} else {
175 			DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n",
176 			    eba.ea_name));
177 			(void)config_found(self, &eba, ebus_print);
178 		}
179 		ebus_destroy_attach_args(&eba);
180 	}
181 }
182 
183 static bus_space_tag_t
184 ebus_mainbus_alloc_bus_tag(struct ebus_softc *sc,
185 			   bus_space_tag_t parent,
186 			   int type)
187 {
188 	struct sparc_bus_space_tag *bt;
189 
190 	bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO);
191 	if (bt == NULL)
192 		panic("could not allocate ebus bus tag");
193 
194 	bt->cookie = sc;
195 	bt->parent = parent;
196 	bt->type = type;
197 	bt->sparc_bus_map = ebus_mainbus_bus_map;
198 	bt->sparc_bus_mmap = ebus_bus_mmap;
199 	bt->sparc_intr_establish = ebus_mainbus_intr_establish;
200 
201 	return (bt);
202 }
203 
204 int
205 ebus_mainbus_bus_map(bus_space_tag_t t, bus_addr_t offset, bus_size_t size,
206 	int flags, vaddr_t va, bus_space_handle_t *hp)
207 {
208 	struct ebus_softc *sc = t->cookie;
209 	struct ebus_mainbus_ranges *range;
210 	bus_addr_t hi, lo;
211 	int i;
212 #if 0
213 	int ss;
214 #endif
215 
216 	DPRINTF(EDB_BUSMAP,
217 	    ("\n_ebus_mainbus_bus_map: off %016llx sz %x flags %d",
218 	    (unsigned long long)offset, (int)size, (int)flags));
219 
220 	if (t->parent == 0 || t->parent->sparc_bus_map == 0) {
221 		printf("\n_ebus_mainbus_bus_map: invalid parent");
222 		return (EINVAL);
223 	}
224 
225 	t = t->parent;
226 
227 	hi = offset >> 32UL;
228 	lo = offset & 0xffffffff;
229 	range = (struct ebus_mainbus_ranges *)sc->sc_range;
230 
231 	DPRINTF(EDB_BUSMAP, (" (hi %08x lo %08x)", (u_int)hi, (u_int)lo));
232 	for (i = 0; i < sc->sc_nrange; i++) {
233 		bus_addr_t addr;
234 
235 		if (hi != range[i].child_hi)
236 			continue;
237 		if (lo < range[i].child_lo ||
238 		    (lo + size) > (range[i].child_lo + range[i].size))
239 			continue;
240 
241 #if 0
242 		/* Isolate address space and find the right tag */
243 		ss = (range[i].phys_hi>>24)&3;
244 		switch (ss) {
245 		case 1:	/* I/O space */
246 			t = sc->sc_iotag;
247 			break;
248 		case 2:	/* Memory space */
249 			t = sc->sc_memtag;
250 			break;
251 		case 0:	/* Config space */
252 		case 3:	/* 64-bit Memory space */
253 		default: /* WTF? */
254 			/* We don't handle these */
255 			panic("ebus_mainbus_bus_map: illegal space %x", ss);
256 			break;
257 		}
258 #endif
259 
260 		addr = ((bus_addr_t)range[i].phys_hi << 32UL) |
261 				    range[i].phys_lo;
262 		addr += lo;
263 		DPRINTF(EDB_BUSMAP,
264 		    ("\n_ebus_mainbus_bus_map: paddr offset %qx addr %qx\n",
265 		    (unsigned long long)offset, (unsigned long long)addr));
266 		return (bus_space_map(t, addr, size, flags, hp));
267 	}
268 	DPRINTF(EDB_BUSMAP, (": FAILED\n"));
269 	return (EINVAL);
270 }
271 
272 static void *
273 ebus_mainbus_intr_establish(bus_space_tag_t t, int ihandle, int level,
274 	int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */)
275 {
276 	struct ebus_softc *sc = t->cookie;
277 	struct intrhand *ih = NULL;
278 	volatile u_int64_t *intrmapptr = NULL, *intrclrptr = NULL;
279 	u_int64_t *imap, *iclr;
280 	int ino;
281 
282 #ifdef SUN4V
283 	if (CPU_ISSUN4V) {
284 		struct upa_reg reg;
285 		u_int64_t devhandle, devino = INTINO(ihandle);
286 		u_int64_t sysino;
287 		int node = -1;
288 		int i, err;
289 
290 		for (i = 0; i < sc->sc_nintmap; i++) {
291 			if (sc->sc_intmap[i].cintr == ihandle) {
292 				node = sc->sc_intmap[i].cnode;
293 				break;
294 			}
295 		}
296 		if (node == -1)
297 			return (NULL);
298 
299 		if (OF_getprop(node, "reg", &reg, sizeof(reg)) != sizeof(reg))
300 			return (NULL);
301 		devhandle = (reg.ur_paddr >> 32) & 0x0fffffff;
302 
303 		err = hv_intr_devino_to_sysino(devhandle, devino, &sysino);
304 		if (err != H_EOK)
305 			return (NULL);
306 
307 		KASSERT(sysino == INTVEC(sysino));
308 		ih = bus_intr_allocate(t0, handler, arg, sysino, level,
309 		    NULL, NULL, what);
310 		if (ih == NULL)
311 			return (NULL);
312 
313 		intr_establish(ih->ih_pil, ih);
314 		ih->ih_ack = ebus_mainbus_intr_ack;
315 
316 		err = hv_intr_settarget(sysino, cpus->ci_upaid);
317 		if (err != H_EOK)
318 			return (NULL);
319 
320 		/* Clear pending interrupts. */
321 		err = hv_intr_setstate(sysino, INTR_IDLE);
322 		if (err != H_EOK)
323 			return (NULL);
324 
325 		err = hv_intr_setenabled(sysino, INTR_ENABLED);
326 		if (err != H_EOK)
327 			return (NULL);
328 
329 		return (ih);
330 	}
331 #endif
332 
333 	ihandle |= sc->sc_ign;
334 	ino = INTINO(ihandle);
335 
336 	/* XXX */
337 	imap = (uint64_t *)((uintptr_t)bus_space_vaddr(sc->sc_bustag, sc->sc_csrh) + 0x1000);
338 	iclr = (uint64_t *)((uintptr_t)bus_space_vaddr(sc->sc_bustag, sc->sc_csrh) + 0x1400);
339 	intrmapptr = &imap[ino];
340 	intrclrptr = &iclr[ino];
341 	ino |= INTVEC(ihandle);
342 
343 	ih = malloc(sizeof *ih, M_DEVBUF, M_NOWAIT);
344 	if (ih == NULL)
345 		return (NULL);
346 
347 	/* Register the map and clear intr registers */
348 	ih->ih_map = intrmapptr;
349 	ih->ih_clr = intrclrptr;
350 
351 	ih->ih_ivec = ihandle;
352 	ih->ih_fun = handler;
353 	ih->ih_arg = arg;
354 	ih->ih_pil = level;
355 	ih->ih_number = ino;
356 	ih->ih_pending = 0;
357 
358 	intr_establish(ih->ih_pil, level != IPL_VM, ih);
359 
360 	if (intrmapptr != NULL) {
361 		u_int64_t imapval;
362 
363 		imapval = *intrmapptr;
364 		imapval |= (1LL << 6);
365 		imapval |= INTMAP_V;
366 		*intrmapptr = imapval;
367 		imapval = *intrmapptr;
368 		ih->ih_number |= imapval & INTMAP_INR;
369 	}
370 
371 	return (ih);
372 }
373 
374 #ifdef SUN4V
375 
376 static void
377 ebus_mainbus_intr_ack(struct intrhand *ih)
378 {
379 	hv_intr_setstate(ih->ih_number, INTR_IDLE);
380 }
381 
382 #endif
383