1 /* $NetBSD: ebus.c,v 1.65 2021/01/04 14:48:51 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.65 2021/01/04 14:48:51 thorpej Exp $"); 31 32 #include "opt_ddb.h" 33 34 /* 35 * UltraSPARC 5 and beyond ebus support. 36 * 37 * note that this driver is not complete: 38 * - interrupt establish is written and appears to work 39 * - bus map code is written and appears to work 40 * - ebus2 DMA code is completely unwritten, we just punt to 41 * the iommu. 42 */ 43 44 #ifdef DEBUG 45 #define EDB_PROM 0x01 46 #define EDB_CHILD 0x02 47 #define EDB_INTRMAP 0x04 48 #define EDB_BUSMAP 0x08 49 #define EDB_BUSDMA 0x10 50 #define EDB_INTR 0x20 51 int ebus_debug = 0x0; 52 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 53 #else 54 #define DPRINTF(l, s) 55 #endif 56 57 #include <sys/param.h> 58 #include <sys/conf.h> 59 #include <sys/device.h> 60 #include <sys/errno.h> 61 #include <sys/extent.h> 62 #include <sys/malloc.h> 63 #include <sys/kmem.h> 64 #include <sys/systm.h> 65 #include <sys/time.h> 66 67 #define _SPARC_BUS_DMA_PRIVATE 68 #include <sys/bus.h> 69 #include <machine/autoconf.h> 70 #include <machine/openfirm.h> 71 72 #include <dev/pci/pcivar.h> 73 #include <dev/pci/pcireg.h> 74 #include <dev/pci/pcidevs.h> 75 76 #include <dev/ebus/ebusreg.h> 77 #include <dev/ebus/ebusvar.h> 78 #include <sparc64/dev/ebusvar.h> 79 80 int ebus_match(device_t, cfdata_t, void *); 81 void ebus_attach(device_t, device_t, void *); 82 83 CFATTACH_DECL_NEW(ebus, sizeof(struct ebus_softc), 84 ebus_match, ebus_attach, NULL, NULL); 85 86 /* 87 * here are our bus space and bus DMA routines. 88 */ 89 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, vaddr_t, 90 bus_space_handle_t *); 91 static void *ebus_intr_establish(bus_space_tag_t, int, int, int (*)(void *), 92 void *, void(*)(void)); 93 94 int 95 ebus_match(device_t parent, cfdata_t match, void *aux) 96 { 97 struct pci_attach_args *pa = aux; 98 char *name; 99 int node; 100 101 /* Only attach if there's a PROM node. */ 102 node = PCITAG_NODE(pa->pa_tag); 103 if (node == -1) 104 return (0); 105 106 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE) 107 return (0); 108 109 /* Match a real ebus */ 110 name = prom_getpropstring(node, "name"); 111 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 112 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS && 113 strcmp(name, "ebus") == 0) 114 return (1); 115 116 /* Or a real ebus III */ 117 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 118 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII && 119 strcmp(name, "ebus") == 0) 120 return (1); 121 122 /* Or a PCI-ISA bridge XXX I hope this is on-board. */ 123 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) { 124 return (1); 125 } 126 127 /* Or the Altera bridge on SPARCle */ 128 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALTERA && 129 PCI_PRODUCT(pa->pa_id) == 0 && 130 strcmp(name, "ebus") == 0) 131 return (1); 132 133 return (0); 134 } 135 136 /* 137 * attach an ebus and all its children. this code is modeled 138 * after the sbus code which does similar things. 139 */ 140 void 141 ebus_attach(device_t parent, device_t self, void *aux) 142 { 143 struct ebus_softc *sc = device_private(self); 144 struct pci_attach_args *pa = aux; 145 struct ebus_attach_args eba; 146 struct ebus_interrupt_map_mask *immp; 147 int node, nmapmask, error; 148 char devinfo[256]; 149 150 sc->sc_dev = self; 151 152 aprint_naive("\n"); 153 154 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 155 aprint_normal(": %s, revision 0x%02x\n", devinfo, 156 PCI_REVISION(pa->pa_class)); 157 158 sc->sc_memtag = pa->pa_memt; 159 sc->sc_iotag = pa->pa_iot; 160 sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 161 sc->sc_dmatag = pa->pa_dmat; 162 163 node = PCITAG_NODE(pa->pa_tag); 164 if (node == -1) 165 panic("could not find ebus node"); 166 167 sc->sc_node = node; 168 169 /* 170 * fill in our softc with information from the prom 171 */ 172 sc->sc_intmap = NULL; 173 sc->sc_range = NULL; 174 sc->sc_nintmap = 0; 175 error = prom_getprop(node, "interrupt-map", 176 sizeof(struct ebus_interrupt_map), 177 &sc->sc_nintmap, &sc->sc_intmap); 178 switch (error) { 179 case 0: 180 immp = &sc->sc_intmapmask; 181 nmapmask = sizeof(*immp); 182 error = prom_getprop(node, "interrupt-map-mask", 183 sizeof(struct ebus_interrupt_map_mask), &nmapmask, 184 &immp); 185 if (error) 186 panic("could not get ebus interrupt-map-mask, error %d", 187 error); 188 if (nmapmask != 1) 189 panic("ebus interrupt-map-mask is broken"); 190 break; 191 case ENOENT: 192 break; 193 default: 194 panic("ebus interrupt-map: error %d", error); 195 break; 196 } 197 198 error = prom_getprop(node, "ranges", sizeof(struct ebus_ranges), 199 &sc->sc_nrange, &sc->sc_range); 200 if (error) 201 panic("ebus ranges: error %d", error); 202 203 /* 204 * now attach all our children 205 */ 206 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 207 for (node = firstchild(node); node; node = nextsibling(node)) { 208 char *name = prom_getpropstring(node, "name"); 209 210 if (ebus_setup_attach_args(sc, node, &eba) != 0) { 211 aprint_error("ebus_attach: %s: incomplete\n", name); 212 continue; 213 } else { 214 DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n", 215 eba.ea_name)); 216 (void)config_found(self, &eba, ebus_print); 217 } 218 ebus_destroy_attach_args(&eba); 219 } 220 } 221 222 int ebus_setup_attach_args(struct ebus_softc *, int, 223 struct ebus_attach_args *); 224 int 225 ebus_setup_attach_args(struct ebus_softc *sc, int node, 226 struct ebus_attach_args *ea) 227 { 228 int n, rv; 229 230 memset(ea, 0, sizeof(struct ebus_attach_args)); 231 n = 0; 232 rv = prom_getprop(node, "name", 1, &n, &ea->ea_name); 233 if (rv != 0) 234 return (rv); 235 KASSERT(ea->ea_name[n-1] == '\0'); 236 237 ea->ea_node = node; 238 ea->ea_bustag = sc->sc_childbustag; 239 ea->ea_dmatag = sc->sc_dmatag; 240 241 rv = prom_getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nreg, 242 &ea->ea_reg); 243 if (rv) 244 return (rv); 245 246 rv = prom_getprop(node, "address", sizeof(uint32_t), &ea->ea_nvaddr, 247 &ea->ea_vaddr); 248 if (rv != ENOENT) { 249 if (rv) 250 return (rv); 251 252 if (ea->ea_nreg != ea->ea_nvaddr) 253 printf("ebus loses: device %s: %d regs and %d addrs\n", 254 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 255 } else 256 ea->ea_nvaddr = 0; 257 258 if (prom_getprop(node, "interrupts", sizeof(uint32_t), &ea->ea_nintr, 259 &ea->ea_intr)) 260 ea->ea_nintr = 0; 261 else 262 ebus_find_ino(sc, ea); 263 264 return (0); 265 } 266 267 void 268 ebus_destroy_attach_args(struct ebus_attach_args *ea) 269 { 270 271 if (ea->ea_name) 272 free((void *)ea->ea_name, M_DEVBUF); 273 if (ea->ea_reg) 274 free((void *)ea->ea_reg, M_DEVBUF); 275 if (ea->ea_intr) 276 free((void *)ea->ea_intr, M_DEVBUF); 277 if (ea->ea_vaddr) 278 free((void *)ea->ea_vaddr, M_DEVBUF); 279 } 280 281 int 282 ebus_print(void *aux, const char *p) 283 { 284 struct ebus_attach_args *ea = aux; 285 int i; 286 287 if (p) 288 aprint_normal("%s at %s", ea->ea_name, p); 289 for (i = 0; i < ea->ea_nreg; i++) 290 aprint_normal("%s %x-%x", i == 0 ? " addr" : ",", 291 ea->ea_reg[i].lo, 292 ea->ea_reg[i].lo + ea->ea_reg[i].size - 1); 293 for (i = 0; i < ea->ea_nintr; i++) 294 aprint_normal(" ipl %x", ea->ea_intr[i]); 295 return (UNCONF); 296 } 297 298 299 /* 300 * find the INO values for each interrupt and fill them in. 301 * 302 * for each "reg" property of this device, mask its hi and lo 303 * values with the "interrupt-map-mask"'s hi/lo values, and also 304 * mask the interrupt number with the interrupt mask. search the 305 * "interrupt-map" list for matching values of hi, lo and interrupt 306 * to give the INO for this interrupt. 307 */ 308 void 309 ebus_find_ino(struct ebus_softc *sc, struct ebus_attach_args *ea) 310 { 311 uint32_t hi, lo, intr; 312 int i, j, k; 313 314 if (sc->sc_nintmap == 0) { 315 for (i = 0; i < ea->ea_nintr; i++) { 316 OF_mapintr(ea->ea_node, &ea->ea_intr[i], 317 sizeof(ea->ea_intr[0]), 318 sizeof(ea->ea_intr[0])); 319 } 320 return; 321 } 322 323 DPRINTF(EDB_INTRMAP, 324 ("ebus_find_ino: searching %d interrupts", ea->ea_nintr)); 325 326 for (j = 0; j < ea->ea_nintr; j++) { 327 328 intr = ea->ea_intr[j] & sc->sc_intmapmask.intr; 329 330 DPRINTF(EDB_INTRMAP, 331 ("; intr %x masked to %x", ea->ea_intr[j], intr)); 332 for (i = 0; i < ea->ea_nreg; i++) { 333 hi = ea->ea_reg[i].hi & sc->sc_intmapmask.hi; 334 lo = ea->ea_reg[i].lo & sc->sc_intmapmask.lo; 335 336 DPRINTF(EDB_INTRMAP, 337 ("; reg hi.lo %08x.%08x masked to %08x.%08x", 338 ea->ea_reg[i].hi, ea->ea_reg[i].lo, hi, lo)); 339 for (k = 0; k < sc->sc_nintmap; k++) { 340 DPRINTF(EDB_INTRMAP, 341 ("; checking hi.lo %08x.%08x intr %x", 342 sc->sc_intmap[k].hi, sc->sc_intmap[k].lo, 343 sc->sc_intmap[k].intr)); 344 if (hi == sc->sc_intmap[k].hi && 345 lo == sc->sc_intmap[k].lo && 346 intr == sc->sc_intmap[k].intr) { 347 ea->ea_intr[j] = 348 sc->sc_intmap[k].cintr; 349 DPRINTF(EDB_INTRMAP, 350 ("; FOUND IT! changing to %d\n", 351 sc->sc_intmap[k].cintr)); 352 goto next_intr; 353 } 354 } 355 } 356 next_intr:; 357 } 358 } 359 360 /* 361 * bus space support. <sparc64/dev/psychoreg.h> has a discussion 362 * about PCI physical addresses, which also applies to ebus. 363 */ 364 bus_space_tag_t 365 ebus_alloc_bus_tag(struct ebus_softc *sc, int type) 366 { 367 bus_space_tag_t bt; 368 369 bt = kmem_zalloc(sizeof(*bt), KM_SLEEP); 370 bt->cookie = sc; 371 bt->parent = sc->sc_memtag; 372 bt->type = type; 373 bt->sparc_bus_map = _ebus_bus_map; 374 bt->sparc_bus_mmap = ebus_bus_mmap; 375 bt->sparc_intr_establish = ebus_intr_establish; 376 return (bt); 377 } 378 379 static int 380 _ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags, 381 vaddr_t va, bus_space_handle_t *hp) 382 { 383 struct ebus_softc *sc = t->cookie; 384 paddr_t offset; 385 u_int bar; 386 int i, ss; 387 388 bar = BUS_ADDR_IOSPACE(ba); 389 offset = BUS_ADDR_PADDR(ba); 390 391 DPRINTF(EDB_BUSMAP, 392 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 393 (int)bar, (uint32_t)offset, (uint32_t)size, 394 flags, (void *)va)); 395 396 for (i = 0; i < sc->sc_nrange; i++) { 397 bus_addr_t pciaddr; 398 399 if (bar != sc->sc_range[i].child_hi) 400 continue; 401 if (offset < sc->sc_range[i].child_lo || 402 (offset + size) > 403 (sc->sc_range[i].child_lo + sc->sc_range[i].size)) 404 continue; 405 406 /* Isolate address space and find the right tag */ 407 ss = (sc->sc_range[i].phys_hi>>24)&3; 408 switch (ss) { 409 case 1: /* I/O space */ 410 t = sc->sc_iotag; 411 break; 412 case 2: /* Memory space */ 413 t = sc->sc_memtag; 414 break; 415 case 0: /* Config space */ 416 case 3: /* 64-bit Memory space */ 417 default: /* WTF? */ 418 /* We don't handle these */ 419 panic("_ebus_bus_map: illegal space %x", ss); 420 break; 421 } 422 pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) | 423 sc->sc_range[i].phys_lo; 424 pciaddr += offset; 425 426 DPRINTF(EDB_BUSMAP, 427 ("_ebus_bus_map: mapping to PCI addr %x\n", 428 (uint32_t)pciaddr)); 429 430 /* pass it onto the psycho */ 431 return (bus_space_map(t, pciaddr, size, flags, hp)); 432 } 433 DPRINTF(EDB_BUSMAP, (": FAILED\n")); 434 return (EINVAL); 435 } 436 437 paddr_t 438 ebus_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot, 439 int flags) 440 { 441 bus_addr_t offset = paddr; 442 struct ebus_softc *sc = t->cookie; 443 int i; 444 445 for (i = 0; i < sc->sc_nrange; i++) { 446 bus_addr_t paddr1 = 447 ((bus_addr_t)sc->sc_range[i].child_hi << 32) | 448 sc->sc_range[i].child_lo; 449 450 if (offset != paddr1) 451 continue; 452 453 DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n", 454 (unsigned long long)paddr1)); 455 return (bus_space_mmap(sc->sc_memtag, paddr1, off, 456 prot, flags)); 457 } 458 459 return (-1); 460 } 461 462 /* 463 * install an interrupt handler for a ebus device 464 */ 465 void * 466 ebus_intr_establish(bus_space_tag_t t, int pri, int level, 467 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 468 { 469 470 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 471 } 472