1 /* $NetBSD: ebus.c,v 1.56 2011/03/18 09:52:54 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000, 2001 Matthew R. Green 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: ebus.c,v 1.56 2011/03/18 09:52:54 mrg Exp $"); 31 32 #include "opt_ddb.h" 33 34 /* 35 * UltraSPARC 5 and beyond ebus support. 36 * 37 * note that this driver is not complete: 38 * - interrupt establish is written and appears to work 39 * - bus map code is written and appears to work 40 * - ebus2 DMA code is completely unwritten, we just punt to 41 * the iommu. 42 */ 43 44 #ifdef DEBUG 45 #define EDB_PROM 0x01 46 #define EDB_CHILD 0x02 47 #define EDB_INTRMAP 0x04 48 #define EDB_BUSMAP 0x08 49 #define EDB_BUSDMA 0x10 50 #define EDB_INTR 0x20 51 int ebus_debug = 0x0; 52 #define DPRINTF(l, s) do { if (ebus_debug & l) printf s; } while (0) 53 #else 54 #define DPRINTF(l, s) 55 #endif 56 57 #include <sys/param.h> 58 #include <sys/conf.h> 59 #include <sys/device.h> 60 #include <sys/errno.h> 61 #include <sys/extent.h> 62 #include <sys/malloc.h> 63 #include <sys/systm.h> 64 #include <sys/time.h> 65 66 #define _SPARC_BUS_DMA_PRIVATE 67 #include <machine/bus.h> 68 #include <machine/autoconf.h> 69 #include <machine/openfirm.h> 70 71 #include <dev/pci/pcivar.h> 72 #include <dev/pci/pcireg.h> 73 #include <dev/pci/pcidevs.h> 74 75 #include <dev/ebus/ebusreg.h> 76 #include <dev/ebus/ebusvar.h> 77 #include <sparc64/dev/ebusvar.h> 78 79 int ebus_match(struct device *, struct cfdata *, void *); 80 void ebus_attach(struct device *, struct device *, void *); 81 82 CFATTACH_DECL(ebus, sizeof(struct ebus_softc), 83 ebus_match, ebus_attach, NULL, NULL); 84 85 /* 86 * here are our bus space and bus DMA routines. 87 */ 88 static int _ebus_bus_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, vaddr_t, 89 bus_space_handle_t *); 90 static void *ebus_intr_establish(bus_space_tag_t, int, int, int (*)(void *), 91 void *, void(*)(void)); 92 93 int 94 ebus_match(struct device *parent, struct cfdata *match, void *aux) 95 { 96 struct pci_attach_args *pa = aux; 97 char *name; 98 int node; 99 100 /* Only attach if there's a PROM node. */ 101 node = PCITAG_NODE(pa->pa_tag); 102 if (node == -1) 103 return (0); 104 105 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE) 106 return (0); 107 108 /* Match a real ebus */ 109 name = prom_getpropstring(node, "name"); 110 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 111 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUS && 112 strcmp(name, "ebus") == 0) 113 return (1); 114 115 /* Or a real ebus III */ 116 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN && 117 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_EBUSIII && 118 strcmp(name, "ebus") == 0) 119 return (1); 120 121 /* Or a PCI-ISA bridge XXX I hope this is on-board. */ 122 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) { 123 return (1); 124 } 125 126 return (0); 127 } 128 129 /* 130 * attach an ebus and all it's children. this code is modeled 131 * after the sbus code which does similar things. 132 */ 133 void 134 ebus_attach(struct device *parent, struct device *self, void *aux) 135 { 136 struct ebus_softc *sc = (struct ebus_softc *)self; 137 struct pci_attach_args *pa = aux; 138 struct ebus_attach_args eba; 139 struct ebus_interrupt_map_mask *immp; 140 int node, nmapmask, error; 141 char devinfo[256]; 142 143 aprint_normal("\n"); 144 aprint_naive("\n"); 145 146 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 147 aprint_normal_dev(self, "%s, revision 0x%02x\n", devinfo, 148 PCI_REVISION(pa->pa_class)); 149 150 sc->sc_memtag = pa->pa_memt; 151 sc->sc_iotag = pa->pa_iot; 152 sc->sc_childbustag = ebus_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 153 sc->sc_dmatag = pa->pa_dmat; 154 155 node = PCITAG_NODE(pa->pa_tag); 156 if (node == -1) 157 panic("could not find ebus node"); 158 159 sc->sc_node = node; 160 161 /* 162 * fill in our softc with information from the prom 163 */ 164 sc->sc_intmap = NULL; 165 sc->sc_range = NULL; 166 sc->sc_nintmap = 0; 167 error = prom_getprop(node, "interrupt-map", 168 sizeof(struct ebus_interrupt_map), 169 &sc->sc_nintmap, &sc->sc_intmap); 170 switch (error) { 171 case 0: 172 immp = &sc->sc_intmapmask; 173 nmapmask = sizeof(*immp); 174 error = prom_getprop(node, "interrupt-map-mask", 175 sizeof(struct ebus_interrupt_map_mask), &nmapmask, 176 &immp); 177 if (error) 178 panic("could not get ebus interrupt-map-mask, error %d", 179 error); 180 if (nmapmask != 1) 181 panic("ebus interrupt-map-mask is broken"); 182 break; 183 case ENOENT: 184 break; 185 default: 186 panic("ebus interrupt-map: error %d", error); 187 break; 188 } 189 190 error = prom_getprop(node, "ranges", sizeof(struct ebus_ranges), 191 &sc->sc_nrange, &sc->sc_range); 192 if (error) 193 panic("ebus ranges: error %d", error); 194 195 /* 196 * now attach all our children 197 */ 198 DPRINTF(EDB_CHILD, ("ebus node %08x, searching children...\n", node)); 199 for (node = firstchild(node); node; node = nextsibling(node)) { 200 char *name = prom_getpropstring(node, "name"); 201 202 if (ebus_setup_attach_args(sc, node, &eba) != 0) { 203 aprint_error("ebus_attach: %s: incomplete\n", name); 204 continue; 205 } else { 206 DPRINTF(EDB_CHILD, ("- found child `%s', attaching\n", 207 eba.ea_name)); 208 (void)config_found(self, &eba, ebus_print); 209 } 210 ebus_destroy_attach_args(&eba); 211 } 212 } 213 214 int ebus_setup_attach_args(struct ebus_softc *, int, 215 struct ebus_attach_args *); 216 int 217 ebus_setup_attach_args(struct ebus_softc *sc, int node, 218 struct ebus_attach_args *ea) 219 { 220 int n, rv; 221 222 memset(ea, 0, sizeof(struct ebus_attach_args)); 223 n = 0; 224 rv = prom_getprop(node, "name", 1, &n, &ea->ea_name); 225 if (rv != 0) 226 return (rv); 227 ea->ea_name[n] = '\0'; 228 229 ea->ea_node = node; 230 ea->ea_bustag = sc->sc_childbustag; 231 ea->ea_dmatag = sc->sc_dmatag; 232 233 rv = prom_getprop(node, "reg", sizeof(struct ebus_regs), &ea->ea_nreg, 234 &ea->ea_reg); 235 if (rv) 236 return (rv); 237 238 rv = prom_getprop(node, "address", sizeof(uint32_t), &ea->ea_nvaddr, 239 &ea->ea_vaddr); 240 if (rv != ENOENT) { 241 if (rv) 242 return (rv); 243 244 if (ea->ea_nreg != ea->ea_nvaddr) 245 printf("ebus loses: device %s: %d regs and %d addrs\n", 246 ea->ea_name, ea->ea_nreg, ea->ea_nvaddr); 247 } else 248 ea->ea_nvaddr = 0; 249 250 if (prom_getprop(node, "interrupts", sizeof(uint32_t), &ea->ea_nintr, 251 &ea->ea_intr)) 252 ea->ea_nintr = 0; 253 else 254 ebus_find_ino(sc, ea); 255 256 return (0); 257 } 258 259 void 260 ebus_destroy_attach_args(struct ebus_attach_args *ea) 261 { 262 263 if (ea->ea_name) 264 free((void *)ea->ea_name, M_DEVBUF); 265 if (ea->ea_reg) 266 free((void *)ea->ea_reg, M_DEVBUF); 267 if (ea->ea_intr) 268 free((void *)ea->ea_intr, M_DEVBUF); 269 if (ea->ea_vaddr) 270 free((void *)ea->ea_vaddr, M_DEVBUF); 271 } 272 273 int 274 ebus_print(void *aux, const char *p) 275 { 276 struct ebus_attach_args *ea = aux; 277 int i; 278 279 if (p) 280 aprint_normal("%s at %s", ea->ea_name, p); 281 for (i = 0; i < ea->ea_nreg; i++) 282 aprint_normal("%s %x-%x", i == 0 ? " addr" : ",", 283 ea->ea_reg[i].lo, 284 ea->ea_reg[i].lo + ea->ea_reg[i].size - 1); 285 for (i = 0; i < ea->ea_nintr; i++) 286 aprint_normal(" ipl %d", ea->ea_intr[i]); 287 return (UNCONF); 288 } 289 290 291 /* 292 * find the INO values for each interrupt and fill them in. 293 * 294 * for each "reg" property of this device, mask it's hi and lo 295 * values with the "interrupt-map-mask"'s hi/lo values, and also 296 * mask the interrupt number with the interrupt mask. search the 297 * "interrupt-map" list for matching values of hi, lo and interrupt 298 * to give the INO for this interrupt. 299 */ 300 void 301 ebus_find_ino(struct ebus_softc *sc, struct ebus_attach_args *ea) 302 { 303 uint32_t hi, lo, intr; 304 int i, j, k; 305 306 if (sc->sc_nintmap == 0) { 307 for (i = 0; i < ea->ea_nintr; i++) { 308 OF_mapintr(ea->ea_node, &ea->ea_intr[i], 309 sizeof(ea->ea_intr[0]), 310 sizeof(ea->ea_intr[0])); 311 } 312 return; 313 } 314 315 DPRINTF(EDB_INTRMAP, 316 ("ebus_find_ino: searching %d interrupts", ea->ea_nintr)); 317 318 for (j = 0; j < ea->ea_nintr; j++) { 319 320 intr = ea->ea_intr[j] & sc->sc_intmapmask.intr; 321 322 DPRINTF(EDB_INTRMAP, 323 ("; intr %x masked to %x", ea->ea_intr[j], intr)); 324 for (i = 0; i < ea->ea_nreg; i++) { 325 hi = ea->ea_reg[i].hi & sc->sc_intmapmask.hi; 326 lo = ea->ea_reg[i].lo & sc->sc_intmapmask.lo; 327 328 DPRINTF(EDB_INTRMAP, 329 ("; reg hi.lo %08x.%08x masked to %08x.%08x", 330 ea->ea_reg[i].hi, ea->ea_reg[i].lo, hi, lo)); 331 for (k = 0; k < sc->sc_nintmap; k++) { 332 DPRINTF(EDB_INTRMAP, 333 ("; checking hi.lo %08x.%08x intr %x", 334 sc->sc_intmap[k].hi, sc->sc_intmap[k].lo, 335 sc->sc_intmap[k].intr)); 336 if (hi == sc->sc_intmap[k].hi && 337 lo == sc->sc_intmap[k].lo && 338 intr == sc->sc_intmap[k].intr) { 339 ea->ea_intr[j] = 340 sc->sc_intmap[k].cintr; 341 DPRINTF(EDB_INTRMAP, 342 ("; FOUND IT! changing to %d\n", 343 sc->sc_intmap[k].cintr)); 344 goto next_intr; 345 } 346 } 347 } 348 next_intr:; 349 } 350 } 351 352 /* 353 * bus space support. <sparc64/dev/psychoreg.h> has a discussion 354 * about PCI physical addresses, which also applies to ebus. 355 */ 356 bus_space_tag_t 357 ebus_alloc_bus_tag(struct ebus_softc *sc, int type) 358 { 359 bus_space_tag_t bt; 360 361 bt = (bus_space_tag_t) 362 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 363 if (bt == NULL) 364 panic("could not allocate ebus bus tag"); 365 366 memset(bt, 0, sizeof *bt); 367 bt->cookie = sc; 368 bt->parent = sc->sc_memtag; 369 bt->type = type; 370 bt->sparc_bus_map = _ebus_bus_map; 371 bt->sparc_bus_mmap = ebus_bus_mmap; 372 bt->sparc_intr_establish = ebus_intr_establish; 373 return (bt); 374 } 375 376 static int 377 _ebus_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags, 378 vaddr_t va, bus_space_handle_t *hp) 379 { 380 struct ebus_softc *sc = t->cookie; 381 paddr_t offset; 382 u_int bar; 383 int i, ss; 384 385 bar = BUS_ADDR_IOSPACE(ba); 386 offset = BUS_ADDR_PADDR(ba); 387 388 DPRINTF(EDB_BUSMAP, 389 ("\n_ebus_bus_map: bar %d offset %08x sz %x flags %x va %p\n", 390 (int)bar, (uint32_t)offset, (uint32_t)size, 391 flags, (void *)va)); 392 393 for (i = 0; i < sc->sc_nrange; i++) { 394 bus_addr_t pciaddr; 395 396 if (bar != sc->sc_range[i].child_hi) 397 continue; 398 if (offset < sc->sc_range[i].child_lo || 399 (offset + size) > 400 (sc->sc_range[i].child_lo + sc->sc_range[i].size)) 401 continue; 402 403 /* Isolate address space and find the right tag */ 404 ss = (sc->sc_range[i].phys_hi>>24)&3; 405 switch (ss) { 406 case 1: /* I/O space */ 407 t = sc->sc_iotag; 408 break; 409 case 2: /* Memory space */ 410 t = sc->sc_memtag; 411 break; 412 case 0: /* Config space */ 413 case 3: /* 64-bit Memory space */ 414 default: /* WTF? */ 415 /* We don't handle these */ 416 panic("_ebus_bus_map: illegal space %x", ss); 417 break; 418 } 419 pciaddr = ((bus_addr_t)sc->sc_range[i].phys_mid << 32UL) | 420 sc->sc_range[i].phys_lo; 421 pciaddr += offset; 422 423 DPRINTF(EDB_BUSMAP, 424 ("_ebus_bus_map: mapping to PCI addr %x\n", 425 (uint32_t)pciaddr)); 426 427 /* pass it onto the psycho */ 428 return (bus_space_map(t, pciaddr, size, flags, hp)); 429 } 430 DPRINTF(EDB_BUSMAP, (": FAILED\n")); 431 return (EINVAL); 432 } 433 434 paddr_t 435 ebus_bus_mmap(bus_space_tag_t t, bus_addr_t paddr, off_t off, int prot, 436 int flags) 437 { 438 bus_addr_t offset = paddr; 439 struct ebus_softc *sc = t->cookie; 440 int i; 441 442 for (i = 0; i < sc->sc_nrange; i++) { 443 bus_addr_t paddr1 = 444 ((bus_addr_t)sc->sc_range[i].child_hi << 32) | 445 sc->sc_range[i].child_lo; 446 447 if (offset != paddr1) 448 continue; 449 450 DPRINTF(EDB_BUSMAP, ("\n_ebus_bus_mmap: mapping paddr %qx\n", 451 (unsigned long long)paddr1)); 452 return (bus_space_mmap(sc->sc_memtag, paddr1, off, 453 prot, flags)); 454 } 455 456 return (-1); 457 } 458 459 /* 460 * install an interrupt handler for a ebus device 461 */ 462 void * 463 ebus_intr_establish(bus_space_tag_t t, int pri, int level, 464 int (*handler)(void *), void *arg, void (*fastvec)(void) /* ignored */) 465 { 466 467 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 468 } 469