xref: /netbsd-src/sys/arch/sparc/sparc/intreg.h (revision ce0bb6e8d2e560ecacbe865a848624f94498063b)
1 /*	$NetBSD: intreg.h,v 1.2 1994/11/20 20:54:20 deraadt Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)intreg.h	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * sun4c interrupt enable register.
49  *
50  * The register is a single byte.  C code must use the ienab_bis and
51  * ienab_bic functions found in locore.s.
52  *
53  * The register's physical address is defined here as the register
54  * must be mapped early in the boot process (otherwise NMI handling
55  * will fail).
56  */
57 #define	INT_ENABLE_REG_PHYSADR	0xf5000000	/* phys addr in IOspace */
58 
59 /*
60  * Bits in interrupt enable register.  Software interrupt requests must
61  * be cleared in software.  This is done in locore.s.  The ALLIE bit must
62  * be cleared to clear asynchronous memory error (level 15) interrupts.
63  */
64 #define	IE_L14		0x80	/* enable level 14 (counter 1) interrupts */
65 #define	IE_L10		0x20	/* enable level 10 (counter 0) interrupts */
66 #define	IE_L8		0x10	/* enable level 8 interrupts */
67 #define	IE_L6		0x08	/* request software level 6 interrupt */
68 #define	IE_L4		0x04	/* request software level 4 interrupt */
69 #define	IE_L1		0x02	/* request software level 1 interrupt */
70 #define	IE_ALLIE	0x01	/* enable interrupts */
71 
72 #ifndef LOCORE
73 void	ienab_bis __P((int bis));	/* set given bits */
74 void	ienab_bic __P((int bic));	/* clear given bits */
75 #endif
76