xref: /netbsd-src/sys/arch/sparc/sparc/intreg.h (revision 4b30c543a0b21e3ba94f2c569e9a82b4fdb2075f)
1 /*
2  * Copyright (c) 1992, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * This software was developed by the Computer Systems Engineering group
6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7  * contributed to Berkeley.
8  *
9  * All advertising materials mentioning features or use of this software
10  * must display the following acknowledgement:
11  *	This product includes software developed by the University of
12  *	California, Lawrence Berkeley Laboratory.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  * 3. All advertising materials mentioning features or use of this software
23  *    must display the following acknowledgement:
24  *	This product includes software developed by the University of
25  *	California, Berkeley and its contributors.
26  * 4. Neither the name of the University nor the names of its contributors
27  *    may be used to endorse or promote products derived from this software
28  *    without specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40  * SUCH DAMAGE.
41  *
42  *	@(#)intreg.h	8.1 (Berkeley) 6/11/93
43  *
44  * from: Header: intreg.h,v 1.7 92/11/26 03:04:53 torek Exp  (LBL)
45  * $Id: intreg.h,v 1.1 1993/10/02 10:24:14 deraadt Exp $
46  */
47 
48 /*
49  * sun4c interrupt enable register.
50  *
51  * The register is a single byte.  C code must use the ienab_bis and
52  * ienab_bic functions found in locore.s.
53  *
54  * The register's physical address is defined here as the register
55  * must be mapped early in the boot process (otherwise NMI handling
56  * will fail).
57  */
58 #define	INT_ENABLE_REG_PHYSADR	0xf5000000	/* phys addr in IOspace */
59 
60 /*
61  * Bits in interrupt enable register.  Software interrupt requests must
62  * be cleared in software.  This is done in locore.s.  The ALLIE bit must
63  * be cleared to clear asynchronous memory error (level 15) interrupts.
64  */
65 #define	IE_L14		0x80	/* enable level 14 (counter 1) interrupts */
66 #define	IE_L10		0x20	/* enable level 10 (counter 0) interrupts */
67 #define	IE_L8		0x10	/* enable level 8 interrupts */
68 #define	IE_L6		0x08	/* request software level 6 interrupt */
69 #define	IE_L4		0x04	/* request software level 4 interrupt */
70 #define	IE_L1		0x02	/* request software level 1 interrupt */
71 #define	IE_ALLIE	0x01	/* enable interrupts */
72 
73 #ifndef LOCORE
74 void	ienab_bis __P((int bis));	/* set given bits */
75 void	ienab_bic __P((int bic));	/* clear given bits */
76 #endif
77