xref: /netbsd-src/sys/arch/sparc/include/pte.h (revision ae9172d6cd9432a6a1a56760d86b32c57a66c39c)
1 /*	$NetBSD: pte.h,v 1.7 1994/11/20 20:53:26 deraadt Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)pte.h	8.1 (Berkeley) 6/11/93
45  */
46 
47 /*
48  * Sun-4 (sort of) and 4c (SparcStation) Page Table Entries
49  * (Sun call them `Page Map Entries').
50  */
51 
52 #ifndef LOCORE
53 /*
54  * Segment maps contain `pmeg' (Page Map Entry Group) numbers.
55  * A PMEG is simply an index that names a group of 32 (sun4) or
56  * 64 (sun4c) PTEs.
57  */
58 typedef u_short pmeg_t;		/* 9 bits needed per Sun-4 segmap entry */
59 #endif
60 
61 /*
62  * Address translation works as follows:
63  *
64  *	1. test va<31:29> -- these must be 000 or 111 (or you get a fault)
65  *	2. concatenate context_reg<2:0> and va<29:18> to get a 15 bit number;
66  *	   use this to index the segment maps, yeilding a 7 or 9 bit value.
67  * (for sun4c)
68  *	3. take the value from (2) above and concatenate va<17:12> to
69  *	   get a `page map entry' index.  This gives a 32-bit PTE.
70  * (for sun4)
71  *	3. take the value from (2) above and concatenate va<17:13> to
72  *	   get a `page map entry' index.  This gives a 32-bit PTE.
73  *
74  * In other words:
75  *
76  *	struct sun4_virtual_addr {
77  *		u_int	:2,		(required to be the same as bit 29)
78  *			va_seg:12,	(virtual segment)
79  *			va_pg:5,	(virtual page within segment)
80  *			va_off:13;	(offset within page)
81  *	};
82  *	struct sun4c_virtual_addr {
83  *		u_int	:2,		(required to be the same as bit 29)
84  *			va_seg:12,	(virtual segment)
85  *			va_pg:6,	(virtual page within segment)
86  *			va_off:12;	(offset within page)
87  *	};
88  *
89  * Then, given any `va':
90  *
91  *	extern pmeg_t segmap[8][1<<12];		([16][1<<12] for sun4)
92  *	extern int ptetable[128][1<<6];		([512][1<<5] for sun4)
93  *
94  * (the above being in the hardware, accessed as Alternate Address Spaces)
95  *
96  *	physseg = segmap[curr_ctx][va.va_seg];
97  *	pte = ptetable[physseg][va.va_pg];
98  *	if (!(pte & PG_V)) TRAP();
99  *	if (writing && !pte.pg_w) TRAP();
100  *	if (usermode && pte.pg_s) TRAP();
101  *	if (pte & PG_NC) DO_NOT_USE_CACHE_FOR_THIS_ACCESS();
102  *	pte |= PG_U;					(mark used/accessed)
103  *	if (writing) pte |= PG_M;			(mark modified)
104  *	ptetable[physseg][va.va_pg] = pte;
105  *	physadr = ((pte & PG_PFNUM) << PGSHIFT) | va.va_off;
106  */
107 
108 #define	NBPSG	(1 << 18)	/* bytes per segment */
109 #define	SGSHIFT	18		/* log2(NBPSG) */
110 #define	SGOFSET	(NBPSG - 1)	/* mask for segment offset */
111 
112 /* number of PTEs that map one segment (not number that fit in one segment!) */
113 #if defined(SUN4) && defined(SUN4C)
114 extern int nptesg;
115 #define	NPTESG	nptesg		/* (which someone will have to initialize) */
116 #else
117 #define	NPTESG	(NBPSG / NBPG)
118 #endif
119 
120 /* virtual address to virtual segment number */
121 #define	VA_VSEG(va)	(((int)(va) >> SGSHIFT) & 0xfff)
122 
123 /* virtual address to virtual page number, for Sun-4 and Sun-4c */
124 #define	VA_SUN4_VPG(va)		(((int)(va) >> 13) & 31)
125 #define	VA_SUN4C_VPG(va)	(((int)(va) >> 12) & 63)
126 
127 /* truncate virtual address to segment base */
128 #define	VA_ROUNDDOWNTOSEG(va)	((int)(va) & ~SGOFSET)
129 
130 /* virtual segment to virtual address (must sign extend!) */
131 #define	VSTOVA(vseg)	(((int)(vseg) << 20) >> 2)
132 
133 #if defined(SUN4) && defined(SUN4C)
134 #define VA_VPG(va)	(cputyp==CPU_SUN4C ? VA_SUN4C_VPG(va) : VA_SUN4_VPG(va))
135 #endif
136 #if defined(SUN4C) && !defined(SUN4)
137 #define VA_VPG(va)	VA_SUN4C_VPG(va)
138 #endif
139 #if !defined(SUN4C) && defined(SUN4)
140 #define	VA_VPG(va)	VA_SUN4_VPG(va)
141 #endif
142 
143 /* there is no `struct pte'; we just use `int' */
144 #define	PG_V		0x80000000
145 #define	PG_PROT		0x60000000	/* both protection bits */
146 #define	PG_W		0x40000000	/* allowed to write */
147 #define	PG_S		0x20000000	/* supervisor only */
148 #define	PG_NC		0x10000000	/* non-cacheable */
149 #define	PG_TYPE		0x0c000000	/* both type bits */
150 
151 #define	PG_OBMEM	0x00000000	/* on board memory */
152 #define	PG_OBIO		0x04000000	/* on board I/O (incl. Sbus on 4c) */
153 #ifdef SUN4
154 #define	PG_VME16	0x08000000	/* 16-bit-data VME space */
155 #define	PG_VME32	0x0c000000	/* 32-bit-data VME space */
156 #endif
157 
158 #define	PG_U		0x02000000
159 #define	PG_M		0x01000000
160 #define	PG_MBZ		0x00f80000	/* unused; must be zero (oh really?) */
161 #define	PG_PFNUM	0x0007ffff	/* n.b.: only 16 bits on sun4c */
162 
163 #define	PG_TNC_SHIFT	26		/* shift to get PG_TYPE + PG_NC */
164 #define	PG_M_SHIFT	24		/* shift to get PG_M, PG_U */
165 
166 /*efine	PG_NOACC	0		** XXX */
167 #define	PG_KR		0x20000000
168 #define	PG_KW		0x60000000
169 #define	PG_URKR		0
170 #define	PG_UW		0x40000000
171 
172 #ifdef KGDB
173 /* but we will define one for gdb anyway */
174 struct pte {
175 	u_int	pg_v:1,
176 		pg_w:1,
177 		pg_s:1,
178 		pg_nc:1;
179 	enum pgtype { pg_obmem, pg_obio, pg_vme16, pg_vme32 } pg_type:2;
180 	u_int	pg_u:1,
181 		pg_m:1,
182 		pg_mbz:5,
183 		pg_pfnum:19;
184 };
185 #endif
186 
187 /*
188  * These are needed in the register window code
189  * to check the validity of (ostensible) user stack PTEs.
190  */
191 #define	PG_VSHIFT	30		/* (va>>vshift)==0 or -1 => valid */
192 	/* XXX fix this name, it is a va shift not a pte bit shift! */
193 
194 #define	PG_PROTSHIFT	29
195 #define	PG_PROTUWRITE	6		/* PG_V,PG_W,!PG_S */
196 #define	PG_PROTUREAD	4		/* PG_V,!PG_W,!PG_S */
197 
198 /* static __inline int PG_VALID(void *va) {
199 	register int t = va; t >>= PG_VSHIFT; return (t == 0 || t == -1);
200 } */
201