1 /* $NetBSD: psl.h,v 1.23 2000/08/22 19:46:31 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)psl.h 8.1 (Berkeley) 6/11/93 45 */ 46 47 #ifndef PSR_IMPL 48 49 /* 50 * SPARC Process Status Register (in psl.h for hysterical raisins). 51 * 52 * The picture in the Sun manuals looks like this: 53 * 1 1 54 * 31 28 27 24 23 20 19 14 3 2 11 8 7 6 5 4 0 55 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+ 56 * | impl | ver | icc | reserved |E|E| pil |S|P|E| CWP | 57 * | | |n z v c| |C|F| | |S|T| | 58 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+ 59 */ 60 61 #define PSR_IMPL 0xf0000000 /* implementation */ 62 #define PSR_VER 0x0f000000 /* version */ 63 #define PSR_ICC 0x00f00000 /* integer condition codes */ 64 #define PSR_N 0x00800000 /* negative */ 65 #define PSR_Z 0x00400000 /* zero */ 66 #define PSR_O 0x00200000 /* overflow */ 67 #define PSR_C 0x00100000 /* carry */ 68 #define PSR_EC 0x00002000 /* coprocessor enable */ 69 #define PSR_EF 0x00001000 /* FP enable */ 70 #define PSR_PIL 0x00000f00 /* interrupt level */ 71 #define PSR_S 0x00000080 /* supervisor (kernel) mode */ 72 #define PSR_PS 0x00000040 /* previous supervisor mode (traps) */ 73 #define PSR_ET 0x00000020 /* trap enable */ 74 #define PSR_CWP 0x0000001f /* current window pointer */ 75 76 #define PSR_BITS "\20\16EC\15EF\10S\7PS\6ET" 77 78 /* define audio software interrupts to be at software level 4 */ 79 #define PIL_AUSOFT 4 80 /* define floppy software interrupts to be at software level 4 too */ 81 #define PIL_FDSOFT 4 82 /* network hardware interrupts at at most (XXX - is that true?) level 6 */ 83 #define PIL_NET 6 84 #define PIL_CLOCK 10 85 86 #if defined(_KERNEL) && !defined(_LOCORE) 87 88 static __inline int getpsr __P((void)); 89 static __inline void setpsr __P((int)); 90 static __inline void spl0 __P((void)); 91 static __inline int splhigh __P((void)); 92 static __inline void splx __P((int)); 93 static __inline int getmid __P((void)); 94 95 /* 96 * GCC pseudo-functions for manipulating PSR (primarily PIL field). 97 */ 98 static __inline int getpsr() 99 { 100 int psr; 101 102 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 103 return (psr); 104 } 105 106 static __inline int getmid() 107 { 108 int mid; 109 110 __asm __volatile("rd %%tbr,%0" : "=r" (mid)); 111 return ((mid >> 20) & 0x3); 112 } 113 114 static __inline void setpsr(newpsr) 115 int newpsr; 116 { 117 __asm __volatile("wr %0,0,%%psr" : : "r" (newpsr)); 118 __asm __volatile("nop; nop; nop"); 119 } 120 121 static __inline void spl0() 122 { 123 int psr, oldipl; 124 125 /* 126 * wrpsr xors two values: we choose old psr and old ipl here, 127 * which gives us the same value as the old psr but with all 128 * the old PIL bits turned off. 129 */ 130 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 131 oldipl = psr & PSR_PIL; 132 __asm __volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl)); 133 134 /* 135 * Three instructions must execute before we can depend 136 * on the bits to be changed. 137 */ 138 __asm __volatile("nop; nop; nop"); 139 } 140 141 /* 142 * PIL 1 through 14 can use this macro. 143 * (spl0 and splhigh are special since they put all 0s or all 1s 144 * into the ipl field.) 145 */ 146 #define _SPLSET(name, newipl) \ 147 static __inline void name __P((void)); \ 148 static __inline void name() \ 149 { \ 150 int psr, oldipl; \ 151 __asm __volatile("rd %%psr,%0" : "=r" (psr)); \ 152 oldipl = psr & PSR_PIL; \ 153 psr &= ~oldipl; \ 154 __asm __volatile("wr %0,%1,%%psr" : : \ 155 "r" (psr), "n" ((newipl) << 8)); \ 156 __asm __volatile("nop; nop; nop"); \ 157 } 158 159 /* Raise IPL and return previous value */ 160 #define _SPLRAISE(name, newipl) \ 161 static __inline int name __P((void)); \ 162 static __inline int name() \ 163 { \ 164 int psr, oldipl; \ 165 __asm __volatile("rd %%psr,%0" : "=r" (psr)); \ 166 oldipl = psr & PSR_PIL; \ 167 if ((newipl << 8) <= oldipl) \ 168 return (oldipl); \ 169 psr &= ~oldipl; \ 170 __asm __volatile("wr %0,%1,%%psr" : : \ 171 "r" (psr), "n" ((newipl) << 8)); \ 172 __asm __volatile("nop; nop; nop"); \ 173 return (oldipl); \ 174 } 175 176 _SPLSET(spllowersoftclock, 1) 177 178 _SPLRAISE(splsoftint, 1) 179 #define splsoftclock splsoftint 180 #define splsoftnet splsoftint 181 182 183 /* audio software interrupts */ 184 _SPLRAISE(splausoft, PIL_AUSOFT) 185 186 /* floppy software interrupts */ 187 _SPLRAISE(splfdsoft, PIL_FDSOFT) 188 189 /* Block devices */ 190 _SPLRAISE(splbio, 5) 191 192 /* network hardware interrupts are at level 6 */ 193 _SPLRAISE(splnet, PIL_NET) 194 195 /* tty input runs at software level 6 */ 196 #define PIL_TTY 6 197 _SPLRAISE(spltty, PIL_TTY) 198 199 /* 200 * Memory allocation (must be as high as highest network, tty, or disk device) 201 */ 202 _SPLRAISE(splimp, 7) 203 _SPLRAISE(splpmap, 7) 204 205 /* clock interrupts at level 10 */ 206 _SPLRAISE(splclock, PIL_CLOCK) 207 208 /* fd hardware, ts102, and tadpole microcontoller interrupts are at level 11 */ 209 _SPLRAISE(splfd, 11) 210 _SPLRAISE(splts102, 11) 211 212 /* zs hardware interrupts are at level 12 */ 213 _SPLRAISE(splzs, 12) 214 _SPLRAISE(splserial, 12) /* XXX - other serial hardware might not be at lvl 12 */ 215 216 /* audio hardware interrupts are at level 13 */ 217 _SPLRAISE(splaudio, 13) 218 219 /* second sparc timer interrupts at level 14 */ 220 _SPLRAISE(splstatclock, 14) 221 222 static __inline int splhigh() 223 { 224 int psr, oldipl; 225 226 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 227 __asm __volatile("wr %0,0,%%psr" : : "r" (psr | PSR_PIL)); 228 __asm __volatile("and %1,%2,%0; nop; nop" : "=r" (oldipl) : \ 229 "r" (psr), "n" (PSR_PIL)); 230 return (oldipl); 231 } 232 233 #define splsched() splhigh() 234 #define spllock() splhigh() 235 236 /* splx does not have a return value */ 237 static __inline void splx(newipl) 238 int newipl; 239 { 240 int psr; 241 242 __asm __volatile("rd %%psr,%0" : "=r" (psr)); 243 __asm __volatile("wr %0,%1,%%psr" : : \ 244 "r" (psr & ~PSR_PIL), "rn" (newipl)); 245 __asm __volatile("nop; nop; nop"); 246 } 247 #endif /* KERNEL && !_LOCORE */ 248 249 #endif /* PSR_IMPL */ 250