1 /* $NetBSD: pmap.h,v 1.29 1997/07/06 23:57:16 pk Exp $ */ 2 3 /* 4 * Copyright (c) 1996 5 * The President and Fellows of Harvard College. All rights reserved. 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Aaron Brown and 16 * Harvard University. 17 * This product includes software developed by the University of 18 * California, Lawrence Berkeley Laboratory. 19 * 20 * @InsertRedistribution@ 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Aaron Brown and 24 * Harvard University. 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * @(#)pmap.h 8.1 (Berkeley) 6/11/93 44 */ 45 46 #ifndef _SPARC_PMAP_H_ 47 #define _SPARC_PMAP_H_ 48 49 #include <machine/pte.h> 50 51 /* 52 * Pmap structure. 53 * 54 * The pmap structure really comes in two variants, one---a single 55 * instance---for kernel virtual memory and the other---up to nproc 56 * instances---for user virtual memory. Unfortunately, we have to mash 57 * both into the same structure. Fortunately, they are almost the same. 58 * 59 * The kernel begins at 0xf8000000 and runs to 0xffffffff (although 60 * some of this is not actually used). Kernel space, including DVMA 61 * space (for now?), is mapped identically into all user contexts. 62 * There is no point in duplicating this mapping in each user process 63 * so they do not appear in the user structures. 64 * 65 * User space begins at 0x00000000 and runs through 0x1fffffff, 66 * then has a `hole', then resumes at 0xe0000000 and runs until it 67 * hits the kernel space at 0xf8000000. This can be mapped 68 * contiguously by ignorning the top two bits and pretending the 69 * space goes from 0 to 37ffffff. Typically the lower range is 70 * used for text+data and the upper for stack, but the code here 71 * makes no such distinction. 72 * 73 * Since each virtual segment covers 256 kbytes, the user space 74 * requires 3584 segments, while the kernel (including DVMA) requires 75 * only 512 segments. 76 * 77 * 78 ** FOR THE SUN4/SUN4C 79 * 80 * The segment map entry for virtual segment vseg is offset in 81 * pmap->pm_rsegmap by 0 if pmap is not the kernel pmap, or by 82 * NUSEG if it is. We keep a pointer called pmap->pm_segmap 83 * pre-offset by this value. pmap->pm_segmap thus contains the 84 * values to be loaded into the user portion of the hardware segment 85 * map so as to reach the proper PMEGs within the MMU. The kernel 86 * mappings are `set early' and are always valid in every context 87 * (every change is always propagated immediately). 88 * 89 * The PMEGs within the MMU are loaded `on demand'; when a PMEG is 90 * taken away from context `c', the pmap for context c has its 91 * corresponding pm_segmap[vseg] entry marked invalid (the MMU segment 92 * map entry is also made invalid at the same time). Thus 93 * pm_segmap[vseg] is the `invalid pmeg' number (127 or 511) whenever 94 * the corresponding PTEs are not actually in the MMU. On the other 95 * hand, pm_pte[vseg] is NULL only if no pages in that virtual segment 96 * are in core; otherwise it points to a copy of the 32 or 64 PTEs that 97 * must be loaded in the MMU in order to reach those pages. 98 * pm_npte[vseg] counts the number of valid pages in each vseg. 99 * 100 * XXX performance: faster to count valid bits? 101 * 102 * The kernel pmap cannot malloc() PTEs since malloc() will sometimes 103 * allocate a new virtual segment. Since kernel mappings are never 104 * `stolen' out of the the MMU, we just keep all its PTEs there, and 105 * have no software copies. Its mmu entries are nonetheless kept on lists 106 * so that the code that fiddles with mmu lists has something to fiddle. 107 * 108 ** FOR THE SUN4M 109 * 110 * On this architecture, the virtual-to-physical translation (page) tables 111 * are *not* stored within the MMU as they are in the earlier Sun architect- 112 * ures; instead, they are maintained entirely within physical memory (there 113 * is a TLB cache to prevent the high performance hit from keeping all page 114 * tables in core). Thus there is no need to dynamically allocate PMEGs or 115 * SMEGs; only contexts must be shared. 116 * 117 * We maintain two parallel sets of tables: one is the actual MMU-edible 118 * hierarchy of page tables in allocated kernel memory; these tables refer 119 * to each other by physical address pointers in SRMMU format (thus they 120 * are not very useful to the kernel's management routines). The other set 121 * of tables is similar to those used for the Sun4/100's 3-level MMU; it 122 * is a hierarchy of regmap and segmap structures which contain kernel virtual 123 * pointers to each other. These must (unfortunately) be kept in sync. 124 * 125 */ 126 #define NKREG ((int)((-(unsigned)KERNBASE) / NBPRG)) /* i.e., 8 */ 127 #define NUREG (256 - NKREG) /* i.e., 248 */ 128 129 TAILQ_HEAD(mmuhd,mmuentry); 130 131 /* 132 * data appearing in both user and kernel pmaps 133 * 134 * note: if we want the same binaries to work on the 4/4c and 4m, we have to 135 * include the fields for both to make sure that the struct kproc 136 * is the same size. 137 */ 138 struct pmap { 139 union ctxinfo *pm_ctx; /* current context, if any */ 140 int pm_ctxnum; /* current context's number */ 141 #if defined(LOCKDEBUG) || NCPUS > 1 142 simple_lock_data_t pm_lock; /* spinlock */ 143 #endif 144 int pm_refcount; /* just what it says */ 145 146 struct mmuhd pm_reglist; /* MMU regions on this pmap (4/4c) */ 147 struct mmuhd pm_seglist; /* MMU segments on this pmap (4/4c) */ 148 149 void *pm_regstore; 150 struct regmap *pm_regmap; 151 152 int *pm_reg_ptps; /* SRMMU-edible region table for 4m */ 153 int pm_reg_ptps_pa; /* _Physical_ address of pm_reg_ptps */ 154 155 int pm_gap_start; /* Starting with this vreg there's */ 156 int pm_gap_end; /* no valid mapping until here */ 157 158 struct pmap_statistics pm_stats; /* pmap statistics */ 159 }; 160 161 struct regmap { 162 struct segmap *rg_segmap; /* point to NSGPRG PMEGs */ 163 int *rg_seg_ptps; /* SRMMU-edible segment tables (NULL 164 * indicates invalid region (4m) */ 165 smeg_t rg_smeg; /* the MMU region number (4c) */ 166 u_char rg_nsegmap; /* number of valid PMEGS */ 167 }; 168 169 struct segmap { 170 int *sg_pte; /* points to NPTESG PTEs */ 171 pmeg_t sg_pmeg; /* the MMU segment number (4c) */ 172 u_char sg_npte; /* number of valid PTEs per seg */ 173 }; 174 175 typedef struct pmap *pmap_t; 176 177 #if 0 178 struct kvm_cpustate { 179 int kvm_npmemarr; 180 struct memarr kvm_pmemarr[MA_SIZE]; 181 int kvm_seginval; /* [4,4c] */ 182 struct segmap kvm_segmap_store[NKREG*NSEGRG]; /* [4,4c] */ 183 }/*not yet used*/; 184 #endif 185 186 #ifdef _KERNEL 187 188 #define PMAP_NULL ((pmap_t)0) 189 190 extern struct pmap kernel_pmap_store; 191 extern vm_offset_t vm_first_phys, vm_num_phys; 192 193 /* 194 * Since PTEs also contain type bits, we have to have some way 195 * to tell pmap_enter `this is an IO page' or `this is not to 196 * be cached'. Since physical addresses are always aligned, we 197 * can do this with the low order bits. 198 * 199 * The ordering below is important: PMAP_PGTYPE << PG_TNC must give 200 * exactly the PG_NC and PG_TYPE bits. 201 */ 202 #define PMAP_OBIO 1 /* tells pmap_enter to use PG_OBIO */ 203 #define PMAP_VME16 2 /* etc */ 204 #define PMAP_VME32 3 /* etc */ 205 #define PMAP_NC 4 /* tells pmap_enter to set PG_NC */ 206 #define PMAP_TNC_4 7 /* mask to get PG_TYPE & PG_NC */ 207 208 #define PMAP_T2PTE_4(x) (((x) & PMAP_TNC_4) << PG_TNC_SHIFT) 209 #define PMAP_IOENC_4(io) (io) 210 211 /* 212 * On a SRMMU machine, the iospace is encoded in bits [3-6] of the 213 * physical address passed to pmap_enter(). 214 */ 215 #define PMAP_TYPE_SRMMU 0x78 /* mask to get 4m page type */ 216 #define PMAP_PTESHFT_SRMMU 25 /* right shift to put type in pte */ 217 #define PMAP_SHFT_SRMMU 3 /* left shift to extract iospace */ 218 #define PMAP_TNC_SRMMU 127 /* mask to get PG_TYPE & PG_NC */ 219 220 /*#define PMAP_IOC 0x00800000 -* IO cacheable, NOT shifted */ 221 222 #define PMAP_T2PTE_SRMMU(x) (((x) & PMAP_TYPE_SRMMU) << PMAP_PTESHFT_SRMMU) 223 #define PMAP_IOENC_SRMMU(io) ((io) << PMAP_SHFT_SRMMU) 224 225 /* Encode IO space for pmap_enter() */ 226 #define PMAP_IOENC(io) (CPU_ISSUN4M ? PMAP_IOENC_SRMMU(io) : PMAP_IOENC_4(io)) 227 228 #if xxx 229 void pmap_bootstrap __P((int nmmu, int nctx, int nregion)); 230 int pmap_count_ptes __P((struct pmap *)); 231 void pmap_prefer __P((vm_offset_t, vm_offset_t *)); 232 int pmap_pa_exists __P((vm_offset_t)); 233 #endif 234 int pmap_dumpsize __P((void)); 235 int pmap_dumpmmu __P((int (*)__P((dev_t, daddr_t, caddr_t, size_t)), 236 daddr_t)); 237 238 #define pmap_kernel() (&kernel_pmap_store) 239 #define pmap_resident_count(pmap) pmap_count_ptes(pmap) 240 #define managed(pa) ((unsigned)((pa) - vm_first_phys) < vm_num_phys) 241 242 #define PMAP_ACTIVATE(pmap, pcb, iscurproc) 243 #define PMAP_DEACTIVATE(pmap, pcb) 244 #define PMAP_PREFER(fo, ap) pmap_prefer((fo), (ap)) 245 246 #define PMAP_EXCLUDE_DECLS /* tells MI pmap.h *not* to include decls */ 247 248 /* FUNCTION DECLARATIONS FOR COMMON PMAP MODULE */ 249 250 void pmap_bootstrap __P((int nmmu, int nctx, int nregion)); 251 int pmap_count_ptes __P((struct pmap *)); 252 void pmap_prefer __P((vm_offset_t, vm_offset_t *)); 253 int pmap_pa_exists __P((vm_offset_t)); 254 void *pmap_bootstrap_alloc __P((int)); 255 void pmap_change_wiring __P((pmap_t, vm_offset_t, boolean_t)); 256 void pmap_collect __P((pmap_t)); 257 void pmap_copy __P((pmap_t, 258 pmap_t, vm_offset_t, vm_size_t, vm_offset_t)); 259 pmap_t pmap_create __P((vm_size_t)); 260 void pmap_destroy __P((pmap_t)); 261 void pmap_init __P((void)); 262 vm_offset_t pmap_map __P((vm_offset_t, vm_offset_t, vm_offset_t, int)); 263 void pmap_pageable __P((pmap_t, 264 vm_offset_t, vm_offset_t, boolean_t)); 265 vm_offset_t pmap_phys_address __P((int)); 266 void pmap_pinit __P((pmap_t)); 267 void pmap_reference __P((pmap_t)); 268 void pmap_release __P((pmap_t)); 269 void pmap_remove __P((pmap_t, vm_offset_t, vm_offset_t)); 270 void pmap_update __P((void)); 271 u_int pmap_free_pages __P((void)); 272 void pmap_init __P((void)); 273 boolean_t pmap_next_page __P((vm_offset_t *)); 274 int pmap_page_index __P((vm_offset_t)); 275 void pmap_virtual_space __P((vm_offset_t *, vm_offset_t *)); 276 void pmap_redzone __P((void)); 277 void kvm_uncache __P((caddr_t, int)); 278 struct user; 279 void switchexit __P((vm_map_t, struct user *, int)); 280 int mmu_pagein __P((struct pmap *pm, int, int)); 281 #ifdef DEBUG 282 int mmu_pagein4m __P((struct pmap *pm, int, int)); 283 #endif 284 285 286 /* SUN4/SUN4C SPECIFIC DECLARATIONS */ 287 288 #if defined(SUN4) || defined(SUN4C) 289 void pmap_clear_modify4_4c __P((vm_offset_t pa)); 290 void pmap_clear_reference4_4c __P((vm_offset_t pa)); 291 void pmap_copy_page4_4c __P((vm_offset_t, vm_offset_t)); 292 void pmap_enter4_4c __P((pmap_t, 293 vm_offset_t, vm_offset_t, vm_prot_t, boolean_t)); 294 vm_offset_t pmap_extract4_4c __P((pmap_t, vm_offset_t)); 295 boolean_t pmap_is_modified4_4c __P((vm_offset_t pa)); 296 boolean_t pmap_is_referenced4_4c __P((vm_offset_t pa)); 297 void pmap_page_protect4_4c __P((vm_offset_t, vm_prot_t)); 298 void pmap_protect4_4c __P((pmap_t, 299 vm_offset_t, vm_offset_t, vm_prot_t)); 300 void pmap_zero_page4_4c __P((vm_offset_t)); 301 void pmap_changeprot4_4c __P((pmap_t, vm_offset_t, vm_prot_t, int)); 302 303 #endif 304 305 /* SIMILAR DECLARATIONS FOR SUN4M MODULE */ 306 307 #if defined(SUN4M) 308 void pmap_clear_modify4m __P((vm_offset_t pa)); 309 void pmap_clear_reference4m __P((vm_offset_t pa)); 310 void pmap_copy_page4m __P((vm_offset_t, vm_offset_t)); 311 void pmap_enter4m __P((pmap_t, 312 vm_offset_t, vm_offset_t, vm_prot_t, boolean_t)); 313 vm_offset_t pmap_extract4m __P((pmap_t, vm_offset_t)); 314 boolean_t pmap_is_modified4m __P((vm_offset_t pa)); 315 boolean_t pmap_is_referenced4m __P((vm_offset_t pa)); 316 void pmap_page_protect4m __P((vm_offset_t, vm_prot_t)); 317 void pmap_protect4m __P((pmap_t, 318 vm_offset_t, vm_offset_t, vm_prot_t)); 319 void pmap_zero_page4m __P((vm_offset_t)); 320 void pmap_changeprot4m __P((pmap_t, vm_offset_t, vm_prot_t, int)); 321 322 #endif /* defined SUN4M */ 323 324 #if !defined(SUN4M) && (defined(SUN4) || defined(SUN4C)) 325 326 #define pmap_clear_modify pmap_clear_modify4_4c 327 #define pmap_clear_reference pmap_clear_reference4_4c 328 #define pmap_copy_page pmap_copy_page4_4c 329 #define pmap_enter pmap_enter4_4c 330 #define pmap_extract pmap_extract4_4c 331 #define pmap_is_modified pmap_is_modified4_4c 332 #define pmap_is_referenced pmap_is_referenced4_4c 333 #define pmap_page_protect pmap_page_protect4_4c 334 #define pmap_protect pmap_protect4_4c 335 #define pmap_zero_page pmap_zero_page4_4c 336 #define pmap_changeprot pmap_changeprot4_4c 337 338 #elif defined(SUN4M) && !(defined(SUN4) || defined(SUN4C)) 339 340 #define pmap_clear_modify pmap_clear_modify4m 341 #define pmap_clear_reference pmap_clear_reference4m 342 #define pmap_copy_page pmap_copy_page4m 343 #define pmap_enter pmap_enter4m 344 #define pmap_extract pmap_extract4m 345 #define pmap_is_modified pmap_is_modified4m 346 #define pmap_is_referenced pmap_is_referenced4m 347 #define pmap_page_protect pmap_page_protect4m 348 #define pmap_protect pmap_protect4m 349 #define pmap_zero_page pmap_zero_page4m 350 #define pmap_changeprot pmap_changeprot4m 351 352 #else /* must use function pointers */ 353 354 extern void (*pmap_clear_modify_p) __P((vm_offset_t pa)); 355 extern void (*pmap_clear_reference_p) __P((vm_offset_t pa)); 356 extern void (*pmap_copy_page_p) __P((vm_offset_t, vm_offset_t)); 357 extern void (*pmap_enter_p) __P((pmap_t, 358 vm_offset_t, vm_offset_t, vm_prot_t, boolean_t)); 359 extern vm_offset_t (*pmap_extract_p) __P((pmap_t, vm_offset_t)); 360 extern boolean_t (*pmap_is_modified_p) __P((vm_offset_t pa)); 361 extern boolean_t (*pmap_is_referenced_p) __P((vm_offset_t pa)); 362 extern void (*pmap_page_protect_p) __P((vm_offset_t, vm_prot_t)); 363 extern void (*pmap_protect_p) __P((pmap_t, 364 vm_offset_t, vm_offset_t, vm_prot_t)); 365 extern void (*pmap_zero_page_p) __P((vm_offset_t)); 366 extern void (*pmap_changeprot_p) __P((pmap_t, vm_offset_t, 367 vm_prot_t, int)); 368 369 #define pmap_clear_modify (*pmap_clear_modify_p) 370 #define pmap_clear_reference (*pmap_clear_reference_p) 371 #define pmap_copy_page (*pmap_copy_page_p) 372 #define pmap_enter (*pmap_enter_p) 373 #define pmap_extract (*pmap_extract_p) 374 #define pmap_is_modified (*pmap_is_modified_p) 375 #define pmap_is_referenced (*pmap_is_referenced_p) 376 #define pmap_page_protect (*pmap_page_protect_p) 377 #define pmap_protect (*pmap_protect_p) 378 #define pmap_zero_page (*pmap_zero_page_p) 379 #define pmap_changeprot (*pmap_changeprot_p) 380 381 #endif 382 383 #endif /* _KERNEL */ 384 385 #endif /* _SPARC_PMAP_H_ */ 386