1 /* $NetBSD: pmap.h,v 1.57 2001/06/18 15:42:06 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1996 5 * The President and Fellows of Harvard College. All rights reserved. 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Aaron Brown and 16 * Harvard University. 17 * This product includes software developed by the University of 18 * California, Lawrence Berkeley Laboratory. 19 * 20 * @InsertRedistribution@ 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Aaron Brown and 24 * Harvard University. 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * @(#)pmap.h 8.1 (Berkeley) 6/11/93 44 */ 45 46 #ifndef _SPARC_PMAP_H_ 47 #define _SPARC_PMAP_H_ 48 49 #include <machine/pte.h> 50 51 /* 52 * Pmap structure. 53 * 54 * The pmap structure really comes in two variants, one---a single 55 * instance---for kernel virtual memory and the other---up to nproc 56 * instances---for user virtual memory. Unfortunately, we have to mash 57 * both into the same structure. Fortunately, they are almost the same. 58 * 59 * The kernel begins at 0xf8000000 and runs to 0xffffffff (although 60 * some of this is not actually used). Kernel space, including DVMA 61 * space (for now?), is mapped identically into all user contexts. 62 * There is no point in duplicating this mapping in each user process 63 * so they do not appear in the user structures. 64 * 65 * User space begins at 0x00000000 and runs through 0x1fffffff, 66 * then has a `hole', then resumes at 0xe0000000 and runs until it 67 * hits the kernel space at 0xf8000000. This can be mapped 68 * contiguously by ignorning the top two bits and pretending the 69 * space goes from 0 to 37ffffff. Typically the lower range is 70 * used for text+data and the upper for stack, but the code here 71 * makes no such distinction. 72 * 73 * Since each virtual segment covers 256 kbytes, the user space 74 * requires 3584 segments, while the kernel (including DVMA) requires 75 * only 512 segments. 76 * 77 * 78 ** FOR THE SUN4/SUN4C 79 * 80 * The segment map entry for virtual segment vseg is offset in 81 * pmap->pm_rsegmap by 0 if pmap is not the kernel pmap, or by 82 * NUSEG if it is. We keep a pointer called pmap->pm_segmap 83 * pre-offset by this value. pmap->pm_segmap thus contains the 84 * values to be loaded into the user portion of the hardware segment 85 * map so as to reach the proper PMEGs within the MMU. The kernel 86 * mappings are `set early' and are always valid in every context 87 * (every change is always propagated immediately). 88 * 89 * The PMEGs within the MMU are loaded `on demand'; when a PMEG is 90 * taken away from context `c', the pmap for context c has its 91 * corresponding pm_segmap[vseg] entry marked invalid (the MMU segment 92 * map entry is also made invalid at the same time). Thus 93 * pm_segmap[vseg] is the `invalid pmeg' number (127 or 511) whenever 94 * the corresponding PTEs are not actually in the MMU. On the other 95 * hand, pm_pte[vseg] is NULL only if no pages in that virtual segment 96 * are in core; otherwise it points to a copy of the 32 or 64 PTEs that 97 * must be loaded in the MMU in order to reach those pages. 98 * pm_npte[vseg] counts the number of valid pages in each vseg. 99 * 100 * XXX performance: faster to count valid bits? 101 * 102 * The kernel pmap cannot malloc() PTEs since malloc() will sometimes 103 * allocate a new virtual segment. Since kernel mappings are never 104 * `stolen' out of the MMU, we just keep all its PTEs there, and have 105 * no software copies. Its mmu entries are nonetheless kept on lists 106 * so that the code that fiddles with mmu lists has something to fiddle. 107 * 108 ** FOR THE SUN4M 109 * 110 * On this architecture, the virtual-to-physical translation (page) tables 111 * are *not* stored within the MMU as they are in the earlier Sun architect- 112 * ures; instead, they are maintained entirely within physical memory (there 113 * is a TLB cache to prevent the high performance hit from keeping all page 114 * tables in core). Thus there is no need to dynamically allocate PMEGs or 115 * SMEGs; only contexts must be shared. 116 * 117 * We maintain two parallel sets of tables: one is the actual MMU-edible 118 * hierarchy of page tables in allocated kernel memory; these tables refer 119 * to each other by physical address pointers in SRMMU format (thus they 120 * are not very useful to the kernel's management routines). The other set 121 * of tables is similar to those used for the Sun4/100's 3-level MMU; it 122 * is a hierarchy of regmap and segmap structures which contain kernel virtual 123 * pointers to each other. These must (unfortunately) be kept in sync. 124 * 125 */ 126 #define NKREG ((int)((-(unsigned)KERNBASE) / NBPRG)) /* i.e., 8 */ 127 #define NUREG (256 - NKREG) /* i.e., 248 */ 128 129 TAILQ_HEAD(mmuhd,mmuentry); 130 131 /* 132 * data appearing in both user and kernel pmaps 133 * 134 * note: if we want the same binaries to work on the 4/4c and 4m, we have to 135 * include the fields for both to make sure that the struct kproc 136 * is the same size. 137 */ 138 struct pmap { 139 union ctxinfo *pm_ctx; /* current context, if any */ 140 int pm_ctxnum; /* current context's number */ 141 struct simplelock pm_lock; /* spinlock */ 142 int pm_refcount; /* just what it says */ 143 144 struct mmuhd pm_reglist; /* MMU regions on this pmap (4/4c) */ 145 struct mmuhd pm_seglist; /* MMU segments on this pmap (4/4c) */ 146 147 struct regmap *pm_regmap; 148 149 int **pm_reg_ptps; /* SRMMU-edible region tables for 4m */ 150 int *pm_reg_ptps_pa;/* _Physical_ address of pm_reg_ptps */ 151 152 int pm_gap_start; /* Starting with this vreg there's */ 153 int pm_gap_end; /* no valid mapping until here */ 154 155 struct pmap_statistics pm_stats; /* pmap statistics */ 156 }; 157 158 struct regmap { 159 struct segmap *rg_segmap; /* point to NSGPRG PMEGs */ 160 int *rg_seg_ptps; /* SRMMU-edible segment tables (NULL 161 * indicates invalid region (4m) */ 162 smeg_t rg_smeg; /* the MMU region number (4c) */ 163 u_char rg_nsegmap; /* number of valid PMEGS */ 164 }; 165 166 struct segmap { 167 int *sg_pte; /* points to NPTESG PTEs */ 168 pmeg_t sg_pmeg; /* the MMU segment number (4c) */ 169 u_char sg_npte; /* number of valid PTEs per seg */ 170 }; 171 172 typedef struct pmap *pmap_t; 173 174 #if 0 175 struct kvm_cpustate { 176 int kvm_npmemarr; 177 struct memarr kvm_pmemarr[MA_SIZE]; 178 int kvm_seginval; /* [4,4c] */ 179 struct segmap kvm_segmap_store[NKREG*NSEGRG]; /* [4,4c] */ 180 }/*not yet used*/; 181 #endif 182 183 #ifdef _KERNEL 184 185 #define PMAP_NULL ((pmap_t)0) 186 187 extern struct pmap kernel_pmap_store; 188 189 /* 190 * Bounds on managed physical addresses. Used by (MD) users 191 * of uvm_pglistalloc() to provide search hints. 192 */ 193 extern paddr_t vm_first_phys, vm_last_phys; 194 extern psize_t vm_num_phys; 195 196 /* 197 * Since PTEs also contain type bits, we have to have some way 198 * to tell pmap_enter `this is an IO page' or `this is not to 199 * be cached'. Since physical addresses are always aligned, we 200 * can do this with the low order bits. 201 * 202 * The ordering below is important: PMAP_PGTYPE << PG_TNC must give 203 * exactly the PG_NC and PG_TYPE bits. 204 */ 205 #define PMAP_OBIO 1 /* tells pmap_enter to use PG_OBIO */ 206 #define PMAP_VME16 2 /* etc */ 207 #define PMAP_VME32 3 /* etc */ 208 #define PMAP_NC 4 /* tells pmap_enter to set PG_NC */ 209 #define PMAP_TNC_4 7 /* mask to get PG_TYPE & PG_NC */ 210 211 #define PMAP_T2PTE_4(x) (((x) & PMAP_TNC_4) << PG_TNC_SHIFT) 212 #define PMAP_IOENC_4(io) (io) 213 214 /* 215 * On a SRMMU machine, the iospace is encoded in bits [3-6] of the 216 * physical address passed to pmap_enter(). 217 */ 218 #define PMAP_TYPE_SRMMU 0x78 /* mask to get 4m page type */ 219 #define PMAP_PTESHFT_SRMMU 25 /* right shift to put type in pte */ 220 #define PMAP_SHFT_SRMMU 3 /* left shift to extract iospace */ 221 #define PMAP_TNC_SRMMU 127 /* mask to get PG_TYPE & PG_NC */ 222 223 /*#define PMAP_IOC 0x00800000 -* IO cacheable, NOT shifted */ 224 225 #define PMAP_T2PTE_SRMMU(x) (((x) & PMAP_TYPE_SRMMU) << PMAP_PTESHFT_SRMMU) 226 #define PMAP_IOENC_SRMMU(io) ((io) << PMAP_SHFT_SRMMU) 227 228 /* Encode IO space for pmap_enter() */ 229 #define PMAP_IOENC(io) (CPU_ISSUN4M ? PMAP_IOENC_SRMMU(io) : PMAP_IOENC_4(io)) 230 231 int pmap_dumpsize __P((void)); 232 int pmap_dumpmmu __P((int (*)__P((dev_t, daddr_t, caddr_t, size_t)), 233 daddr_t)); 234 235 #define pmap_kernel() (&kernel_pmap_store) 236 #define pmap_resident_count(pmap) pmap_count_ptes(pmap) 237 238 #define PMAP_PREFER(fo, ap) pmap_prefer((fo), (ap)) 239 240 #define PMAP_EXCLUDE_DECLS /* tells MI pmap.h *not* to include decls */ 241 242 /* FUNCTION DECLARATIONS FOR COMMON PMAP MODULE */ 243 244 struct proc; 245 void pmap_activate __P((struct proc *)); 246 void pmap_deactivate __P((struct proc *)); 247 void pmap_bootstrap __P((int nmmu, int nctx, int nregion)); 248 int pmap_count_ptes __P((struct pmap *)); 249 void pmap_prefer __P((vaddr_t, vaddr_t *)); 250 int pmap_pa_exists __P((paddr_t)); 251 void pmap_unwire __P((pmap_t, vaddr_t)); 252 void pmap_collect __P((pmap_t)); 253 void pmap_copy __P((pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t)); 254 pmap_t pmap_create __P((void)); 255 void pmap_destroy __P((pmap_t)); 256 void pmap_init __P((void)); 257 vaddr_t pmap_map __P((vaddr_t, paddr_t, paddr_t, int)); 258 paddr_t pmap_phys_address __P((int)); 259 void pmap_reference __P((pmap_t)); 260 void pmap_remove __P((pmap_t, vaddr_t, vaddr_t)); 261 #define pmap_update() /* nothing (yet) */ 262 void pmap_virtual_space __P((vaddr_t *, vaddr_t *)); 263 void pmap_redzone __P((void)); 264 void kvm_uncache __P((caddr_t, int)); 265 struct user; 266 int mmu_pagein __P((struct pmap *pm, vaddr_t, int)); 267 void pmap_writetext __P((unsigned char *, int)); 268 void pmap_globalize_boot_cpuinfo __P((struct cpu_info *)); 269 270 271 /* SUN4/SUN4C SPECIFIC DECLARATIONS */ 272 273 #if defined(SUN4) || defined(SUN4C) 274 boolean_t pmap_clear_modify4_4c __P((struct vm_page *)); 275 boolean_t pmap_clear_reference4_4c __P((struct vm_page *)); 276 void pmap_copy_page4_4c __P((paddr_t, paddr_t)); 277 int pmap_enter4_4c __P((pmap_t, vaddr_t, paddr_t, vm_prot_t, 278 int)); 279 boolean_t pmap_extract4_4c __P((pmap_t, vaddr_t, paddr_t *)); 280 boolean_t pmap_is_modified4_4c __P((struct vm_page *)); 281 boolean_t pmap_is_referenced4_4c __P((struct vm_page *)); 282 void pmap_kenter_pa4_4c __P((vaddr_t, paddr_t, vm_prot_t)); 283 void pmap_kremove4_4c __P((vaddr_t, vsize_t)); 284 void pmap_page_protect4_4c __P((struct vm_page *, vm_prot_t)); 285 void pmap_protect4_4c __P((pmap_t, vaddr_t, vaddr_t, vm_prot_t)); 286 void pmap_zero_page4_4c __P((paddr_t)); 287 void pmap_changeprot4_4c __P((pmap_t, vaddr_t, vm_prot_t, int)); 288 289 #endif 290 291 /* SIMILAR DECLARATIONS FOR SUN4M MODULE */ 292 293 #if defined(SUN4M) 294 boolean_t pmap_clear_modify4m __P((struct vm_page *)); 295 boolean_t pmap_clear_reference4m __P((struct vm_page *)); 296 void pmap_copy_page4m __P((paddr_t, paddr_t)); 297 void pmap_copy_page_viking_mxcc(paddr_t, paddr_t); 298 void pmap_copy_page_hypersparc(paddr_t, paddr_t); 299 int pmap_enter4m __P((pmap_t, vaddr_t, paddr_t, vm_prot_t, 300 int)); 301 boolean_t pmap_extract4m __P((pmap_t, vaddr_t, paddr_t *)); 302 boolean_t pmap_is_modified4m __P((struct vm_page *)); 303 boolean_t pmap_is_referenced4m __P((struct vm_page *)); 304 void pmap_kenter_pa4m __P((vaddr_t, paddr_t, vm_prot_t)); 305 void pmap_kremove4m __P((vaddr_t, vsize_t)); 306 void pmap_page_protect4m __P((struct vm_page *, vm_prot_t)); 307 void pmap_protect4m __P((pmap_t, vaddr_t, vaddr_t, vm_prot_t)); 308 void pmap_zero_page4m __P((paddr_t)); 309 void pmap_zero_page_viking_mxcc(paddr_t); 310 void pmap_zero_page_hypersparc(paddr_t); 311 void pmap_changeprot4m __P((pmap_t, vaddr_t, vm_prot_t, int)); 312 313 #endif /* defined SUN4M */ 314 315 #if !defined(SUN4M) && (defined(SUN4) || defined(SUN4C)) 316 317 #define pmap_clear_modify pmap_clear_modify4_4c 318 #define pmap_clear_reference pmap_clear_reference4_4c 319 #define pmap_enter pmap_enter4_4c 320 #define pmap_extract pmap_extract4_4c 321 #define pmap_is_modified pmap_is_modified4_4c 322 #define pmap_is_referenced pmap_is_referenced4_4c 323 #define pmap_kenter_pa pmap_kenter_pa4_4c 324 #define pmap_kremove pmap_kremove4_4c 325 #define pmap_page_protect pmap_page_protect4_4c 326 #define pmap_protect pmap_protect4_4c 327 #define pmap_changeprot pmap_changeprot4_4c 328 329 #elif defined(SUN4M) && !(defined(SUN4) || defined(SUN4C)) 330 331 #define pmap_clear_modify pmap_clear_modify4m 332 #define pmap_clear_reference pmap_clear_reference4m 333 #define pmap_enter pmap_enter4m 334 #define pmap_extract pmap_extract4m 335 #define pmap_is_modified pmap_is_modified4m 336 #define pmap_is_referenced pmap_is_referenced4m 337 #define pmap_kenter_pa pmap_kenter_pa4m 338 #define pmap_kremove pmap_kremove4m 339 #define pmap_page_protect pmap_page_protect4m 340 #define pmap_protect pmap_protect4m 341 #define pmap_changeprot pmap_changeprot4m 342 343 #else /* must use function pointers */ 344 345 extern boolean_t(*pmap_clear_modify_p) __P((struct vm_page *)); 346 extern boolean_t(*pmap_clear_reference_p) __P((struct vm_page *)); 347 extern int (*pmap_enter_p) __P((pmap_t, vaddr_t, paddr_t, vm_prot_t, 348 int)); 349 extern boolean_t (*pmap_extract_p) __P((pmap_t, vaddr_t, paddr_t *)); 350 extern boolean_t(*pmap_is_modified_p) __P((struct vm_page *)); 351 extern boolean_t(*pmap_is_referenced_p) __P((struct vm_page *)); 352 extern void (*pmap_kenter_pa_p) __P((vaddr_t, paddr_t, vm_prot_t)); 353 extern void (*pmap_kremove_p) __P((vaddr_t, vsize_t)); 354 extern void (*pmap_page_protect_p) __P((struct vm_page *, vm_prot_t)); 355 extern void (*pmap_protect_p) __P((pmap_t, vaddr_t, vaddr_t, vm_prot_t)); 356 extern void (*pmap_changeprot_p) __P((pmap_t, vaddr_t, vm_prot_t, int)); 357 358 #define pmap_clear_modify (*pmap_clear_modify_p) 359 #define pmap_clear_reference (*pmap_clear_reference_p) 360 #define pmap_enter (*pmap_enter_p) 361 #define pmap_extract (*pmap_extract_p) 362 #define pmap_is_modified (*pmap_is_modified_p) 363 #define pmap_is_referenced (*pmap_is_referenced_p) 364 #define pmap_kenter_pa (*pmap_kenter_pa_p) 365 #define pmap_kremove (*pmap_kremove_p) 366 #define pmap_page_protect (*pmap_page_protect_p) 367 #define pmap_protect (*pmap_protect_p) 368 #define pmap_changeprot (*pmap_changeprot_p) 369 370 #endif 371 372 /* pmap_{zero,copy}_page() may be assisted by specialized hardware */ 373 #define pmap_zero_page (*cpuinfo.zero_page) 374 #define pmap_copy_page (*cpuinfo.copy_page) 375 376 #if defined(SUN4M) 377 /* 378 * Macros which implement SRMMU TLB flushing/invalidation 379 */ 380 #define tlb_flush_page_real(va) \ 381 sta(((vaddr_t)(va) & ~0xfff) | ASI_SRMMUFP_L3, ASI_SRMMUFP, 0) 382 383 #define tlb_flush_segment_real(vr, vs) \ 384 sta(((vr)<<RGSHIFT) | ((vs)<<SGSHIFT) | ASI_SRMMUFP_L2, ASI_SRMMUFP,0) 385 386 #define tlb_flush_region_real(vr) \ 387 sta(((vr) << RGSHIFT) | ASI_SRMMUFP_L1, ASI_SRMMUFP, 0) 388 389 #define tlb_flush_context_real() sta(ASI_SRMMUFP_L0, ASI_SRMMUFP, 0) 390 #define tlb_flush_all_real() sta(ASI_SRMMUFP_LN, ASI_SRMMUFP, 0) 391 392 #endif /* SUN4M */ 393 394 #endif /* _KERNEL */ 395 396 #endif /* _SPARC_PMAP_H_ */ 397