1 /* $NetBSD: mcontext.h,v 1.5 2004/01/01 15:02:31 pk Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Klaus Klein. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #ifndef _SPARC_MCONTEXT_H_ 40 #define _SPARC_MCONTEXT_H_ 41 42 #define _UC_SETSTACK 0x00010000 43 #define _UC_CLRSTACK 0x00020000 44 45 /* 46 * Layout of mcontext_t according the System V Application Binary Interface, 47 * Edition 4.1, SPARC Processor ABI Supplement and updated for SPARC v9. 48 */ 49 50 #ifdef __arch64__ 51 #define _NGREG 21 /* %ccr, pc, npc, %g1-7, %o0-7, %asi, %fprs */ 52 #else 53 #define _NGREG 19 /* %psr, pc, npc, %g1-7, %o0-7 */ 54 #endif 55 typedef long int __greg_t; 56 typedef __greg_t __gregset_t[_NGREG]; 57 58 /* Offsets into gregset_t, for convenience. */ 59 #ifdef __arch64__ 60 #define _REG_CCR 0 61 #else 62 #define _REG_PSR 0 63 #endif 64 #define _REG_PC 1 65 #define _REG_nPC 2 66 #define _REG_Y 3 67 #define _REG_G1 4 68 #define _REG_G2 5 69 #define _REG_G3 6 70 #define _REG_G4 7 71 #define _REG_G5 8 72 #define _REG_G6 9 73 #define _REG_G7 10 74 #define _REG_O0 11 75 #define _REG_O1 12 76 #define _REG_O2 13 77 #define _REG_O3 14 78 #define _REG_O4 15 79 #define _REG_O5 16 80 #define _REG_O6 17 81 #define _REG_O7 18 82 #ifdef __arch64__ 83 #define _REG_ASI 19 84 #define _REG_FPRS 20 85 #endif 86 87 88 #define _SPARC_MAXREGWINDOW 31 89 90 /* Layout of a register window. */ 91 typedef struct { 92 __greg_t __rw_local[8]; /* %l0-7 */ 93 __greg_t __rw_in[8]; /* %i0-7 */ 94 } __rwindow_t; 95 96 /* Description of available register windows. */ 97 typedef struct { 98 int __wbcnt; 99 __greg_t * __spbuf[_SPARC_MAXREGWINDOW]; 100 __rwindow_t __wbuf[_SPARC_MAXREGWINDOW]; 101 } __gwindows_t; 102 103 /* FPU address queue */ 104 struct __fpq { 105 unsigned int * __fpq_addr; /* address */ 106 unsigned int __fpq_instr; /* instruction */ 107 }; 108 109 struct __fq { 110 union { 111 double __whole; 112 struct __fpq __fpq; 113 } _FQu; 114 }; 115 116 /* FPU state description */ 117 typedef struct { 118 union { 119 unsigned int __fpu_regs[32]; 120 #ifdef __arch64__ 121 double __fpu_dregs[32]; 122 long double __fpu_qregs[16]; 123 #else 124 double __fpu_dregs[16]; 125 #endif 126 } __fpu_fr; /* FPR contents */ 127 struct __fq * __fpu_q; /* pointer to FPU insn queue */ 128 unsigned long __fpu_fsr; /* %fsr */ 129 unsigned char __fpu_qcnt; /* # entries in __fpu_q */ 130 unsigned char __fpu_q_entrysize; /* size of a __fpu_q entry */ 131 unsigned char __fpu_en; /* this context valid? */ 132 } __fpregset_t; 133 134 /* `Extra Register State'(?) */ 135 typedef struct { 136 unsigned int __xrs_id; /* See below */ 137 char * __xrs_ptr; /* points into filler area */ 138 } __xrs_t; 139 140 #define _XRS_ID 0x78727300 /* 'xrs\0' */ 141 142 #ifdef __arch64__ 143 /* Ancillary State Registers, 16-31 are available to user programs */ 144 typedef long __asrset_t[16]; /* %asr16-31 */ 145 #endif 146 147 typedef struct { 148 __gregset_t __gregs; /* GPR state */ 149 __gwindows_t * __gwins; /* may point to register windows */ 150 __fpregset_t __fpregs; /* FPU state, if any */ 151 __xrs_t __xrs; /* may indicate extra reg state */ 152 #ifdef __arch64__ 153 __asrset_t __asrs; /* ASR state */ 154 #endif 155 } mcontext_t; 156 157 #ifdef __arch64__ 158 #define _UC_MACHINE_PAD 8 /* Padding appended to ucontext_t */ 159 #define _UC_MACHINE_SP(uc) (((uc)->uc_mcontext.__gregs[_REG_O6])+0x7ff) 160 #else 161 #define _UC_MACHINE_PAD 43 /* Padding appended to ucontext_t */ 162 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_O6]) 163 #endif 164 #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) 165 #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_O0]) 166 167 #define _UC_MACHINE_SET_PC(uc, pc) \ 168 do { \ 169 (uc)->uc_mcontext.__gregs[_REG_PC] = (pc); \ 170 (uc)->uc_mcontext.__gregs[_REG_nPC] = (pc) + 4; \ 171 } while (/*CONSTCOND*/0) 172 173 #endif /* !_SPARC_MCONTEXT_H_ */ 174