1 /* $NetBSD: cpu.h,v 1.12 1995/03/28 18:19:49 jtc Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 45 */ 46 47 #ifndef _CPU_H_ 48 #define _CPU_H_ 49 50 /* 51 * CTL_MACHDEP definitinos. 52 */ 53 #define CPU_MAXID 1 /* no valid machdep ids */ 54 55 #define CTL_MACHDEP_NAMES { \ 56 { 0, 0 }, \ 57 } 58 59 #ifdef _KERNEL 60 /* 61 * Exported definitions unique to SPARC cpu support. 62 */ 63 64 #include <machine/psl.h> 65 #include <sparc/sparc/intreg.h> 66 67 /* 68 * definitions of cpu-dependent requirements 69 * referenced in generic code 70 */ 71 #define COPY_SIGCODE /* copy sigcode above user stack in exec */ 72 73 #define cpu_exec(p) /* nothing */ 74 #define cpu_swapin(p) /* nothing */ 75 #define cpu_wait(p) /* nothing */ 76 77 /* 78 * See syscall() for an explanation of the following. Note that the 79 * locore bootstrap code follows the syscall stack protocol. The 80 * framep argument is unused. 81 */ 82 #define cpu_set_init_frame(p, fp) \ 83 (p)->p_md.md_tf = (struct trapframe *) \ 84 ((caddr_t)(p)->p_addr + USPACE - sizeof(struct trapframe)) 85 86 /* 87 * Arguments to hardclock, softclock and gatherstats encapsulate the 88 * previous machine state in an opaque clockframe. The ipl is here 89 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 90 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 91 */ 92 struct clockframe { 93 u_int psr; /* psr before interrupt, excluding PSR_ET */ 94 u_int pc; /* pc at interrupt */ 95 u_int npc; /* npc at interrupt */ 96 u_int ipl; /* actual interrupt priority level */ 97 u_int fp; /* %fp at interrupt */ 98 }; 99 typedef struct clockframe clockframe; 100 101 extern int eintstack[]; 102 103 #define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0) 104 #define CLKF_BASEPRI(framep) (((framep)->psr & PSR_PIL) == 0) 105 #define CLKF_PC(framep) ((framep)->pc) 106 #define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack) 107 108 /* 109 * Software interrupt request `register'. 110 */ 111 union sir { 112 int sir_any; 113 char sir_which[4]; 114 } sir; 115 116 #define SIR_NET 0 117 #define SIR_CLOCK 1 118 119 #define setsoftint() ienab_bis(IE_L1) 120 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint()) 121 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint()) 122 123 int want_ast; 124 125 /* 126 * Preempt the current process if in interrupt from user mode, 127 * or after the current trap/syscall if in system mode. 128 */ 129 int want_resched; /* resched() was called */ 130 #define need_resched() (want_resched = 1, want_ast = 1) 131 132 /* 133 * Give a profiling tick to the current process when the user profiling 134 * buffer pages are invalid. On the sparc, request an ast to send us 135 * through trap(), marking the proc as needing a profiling tick. 136 */ 137 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1) 138 139 /* 140 * Notify the current process (p) that it has a signal pending, 141 * process as soon as possible. 142 */ 143 #define signotify(p) (want_ast = 1) 144 145 /* 146 * Only one process may own the FPU state. 147 * 148 * XXX this must be per-cpu (eventually) 149 */ 150 struct proc *fpproc; /* FPU owner */ 151 int foundfpu; /* true => we have an FPU */ 152 153 /* 154 * Interrupt handler chains. Interrupt handlers should return 0 for 155 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 156 * handler into the list. The handler is called with its (single) 157 * argument, or with a pointer to a clockframe if ih_arg is NULL. 158 */ 159 struct intrhand { 160 int (*ih_fun) __P((void *)); 161 void *ih_arg; 162 struct intrhand *ih_next; 163 } *intrhand[15]; 164 165 void intr_establish __P((int level, struct intrhand *)); 166 void vmeintr_establish __P((int vec, int level, struct intrhand *)); 167 168 /* 169 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast'' 170 * interrupt vectors (vectors that are not shared and are handled in the 171 * trap window). Such functions must be written in assembly. 172 */ 173 void intr_fasttrap __P((int level, void (*vec)(void))); 174 175 /* 176 * 177 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 178 * of the trap vector table. The next eight bits are supplied by the 179 * hardware when the trap occurs, and the bottom four bits are always 180 * zero (so that we can shove up to 16 bytes of executable code---exactly 181 * four instructions---into each trap vector). 182 * 183 * The hardware allocates half the trap vectors to hardware and half to 184 * software. 185 * 186 * Traps have priorities assigned (lower number => higher priority). 187 */ 188 189 struct trapvec { 190 int tv_instr[4]; /* the four instructions */ 191 }; 192 extern struct trapvec trapbase[256]; /* the 256 vectors */ 193 194 extern void wzero __P((void *, u_int)); 195 extern void wcopy __P((const void *, void *, u_int)); 196 197 #endif /* _KERNEL */ 198 #endif /* _CPU_H_ */ 199