1 /* $NetBSD: cpu.h,v 1.40 2000/06/05 20:47:47 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. All advertising materials mentioning features or use of this software 25 * must display the following acknowledgement: 26 * This product includes software developed by the University of 27 * California, Berkeley and its contributors. 28 * 4. Neither the name of the University nor the names of its contributors 29 * may be used to endorse or promote products derived from this software 30 * without specific prior written permission. 31 * 32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 42 * SUCH DAMAGE. 43 * 44 * @(#)cpu.h 8.4 (Berkeley) 1/5/94 45 */ 46 47 #ifndef _CPU_H_ 48 #define _CPU_H_ 49 50 /* 51 * CTL_MACHDEP definitions. 52 */ 53 #define CPU_BOOTED_KERNEL 1 /* string: booted kernel name */ 54 #define CPU_MAXID 2 /* number of valid machdep ids */ 55 56 #define CTL_MACHDEP_NAMES { \ 57 { 0, 0 }, \ 58 { "booted_kernel", CTLTYPE_STRING }, \ 59 } 60 61 #ifdef _KERNEL 62 /* 63 * Exported definitions unique to SPARC cpu support. 64 */ 65 66 #if !defined(_LKM) 67 #include "opt_multiprocessor.h" 68 #include "opt_lockdebug.h" 69 #endif 70 71 #include <machine/psl.h> 72 #include <sparc/sparc/cpuvar.h> 73 #include <sparc/sparc/intreg.h> 74 75 /* 76 * definitions of cpu-dependent requirements 77 * referenced in generic code 78 */ 79 #define curcpu() (cpuinfo.ci_self) 80 #define curproc (curcpu()->ci_curproc) 81 #define CPU_IS_PRIMARY(ci) ((ci)->master) 82 83 #define cpu_swapin(p) /* nothing */ 84 #define cpu_swapout(p) /* nothing */ 85 #define cpu_wait(p) /* nothing */ 86 #define cpu_number() (cpuinfo.cpu_no) 87 88 #if defined(MULTIPROCESSOR) 89 void cpu_boot_secondary_processors __P((void)); 90 #endif 91 92 /* 93 * Arguments to hardclock, softclock and gatherstats encapsulate the 94 * previous machine state in an opaque clockframe. The ipl is here 95 * as well for strayintr (see locore.s:interrupt and intr.c:strayintr). 96 * Note that CLKF_INTR is valid only if CLKF_USERMODE is false. 97 */ 98 struct clockframe { 99 u_int psr; /* psr before interrupt, excluding PSR_ET */ 100 u_int pc; /* pc at interrupt */ 101 u_int npc; /* npc at interrupt */ 102 u_int ipl; /* actual interrupt priority level */ 103 u_int fp; /* %fp at interrupt */ 104 }; 105 typedef struct clockframe clockframe; 106 107 extern int eintstack[]; 108 109 #define CLKF_USERMODE(framep) (((framep)->psr & PSR_PS) == 0) 110 #define CLKF_BASEPRI(framep) (((framep)->psr & PSR_PIL) == 0) 111 #define CLKF_PC(framep) ((framep)->pc) 112 #if defined(MULTIPROCESSOR) 113 #define CLKF_INTR(framep) \ 114 ((framep)->fp > (u_int)cpuinfo.eintstack - INT_STACK_SIZE && \ 115 (framep)->fp < (u_int)cpuinfo.eintstack) 116 #else 117 #define CLKF_INTR(framep) ((framep)->fp < (u_int)eintstack) 118 #endif 119 120 /* 121 * Software interrupt request `register'. 122 */ 123 extern union sir { 124 int sir_any; 125 char sir_which[4]; 126 } sir; 127 128 #define SIR_NET 0 129 #define SIR_CLOCK 1 130 #define SIR_SERIAL 2 131 132 #if defined(SUN4M) 133 extern void raise __P((int, int)); 134 #if !(defined(SUN4) || defined(SUN4C)) 135 #define setsoftint() raise(0,1) 136 #else /* both defined */ 137 #define setsoftint() (cputyp == CPU_SUN4M ? raise(0,1) : ienab_bis(IE_L1)) 138 #endif /* !4,!4c */ 139 #else /* 4m not defined */ 140 #define setsoftint() ienab_bis(IE_L1) 141 #endif /* SUN4M */ 142 143 #define setsoftnet() (sir.sir_which[SIR_NET] = 1, setsoftint()) 144 #define setsoftclock() (sir.sir_which[SIR_CLOCK] = 1, setsoftint()) 145 #define setsoftserial() (sir.sir_which[SIR_SERIAL] = 1, setsoftint()) 146 147 extern int want_ast; 148 149 /* 150 * Preempt the current process if in interrupt from user mode, 151 * or after the current trap/syscall if in system mode. 152 */ 153 extern int want_resched; /* resched() was called */ 154 #define need_resched() (want_resched = 1, want_ast = 1) 155 156 /* 157 * Give a profiling tick to the current process when the user profiling 158 * buffer pages are invalid. On the sparc, request an ast to send us 159 * through trap(), marking the proc as needing a profiling tick. 160 */ 161 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, want_ast = 1) 162 163 /* 164 * Notify the current process (p) that it has a signal pending, 165 * process as soon as possible. 166 */ 167 #define signotify(p) (want_ast = 1) 168 169 /* Number of CPUs in the system */ 170 extern int ncpu; 171 172 /* 173 * Only one process may own the FPU state. 174 * 175 * XXX this must be per-cpu (eventually) 176 */ 177 extern struct proc *fpproc; /* FPU owner */ 178 extern int foundfpu; /* true => we have an FPU */ 179 180 /* 181 * Interrupt handler chains. Interrupt handlers should return 0 for 182 * ``not me'' or 1 (``I took care of it''). intr_establish() inserts a 183 * handler into the list. The handler is called with its (single) 184 * argument, or with a pointer to a clockframe if ih_arg is NULL. 185 */ 186 extern struct intrhand { 187 int (*ih_fun) __P((void *)); 188 void *ih_arg; 189 struct intrhand *ih_next; 190 } *intrhand[15]; 191 192 void intr_establish __P((int level, struct intrhand *)); 193 194 /* 195 * intr_fasttrap() is a lot like intr_establish, but is used for ``fast'' 196 * interrupt vectors (vectors that are not shared and are handled in the 197 * trap window). Such functions must be written in assembly. 198 */ 199 void intr_fasttrap __P((int level, void (*vec)(void))); 200 201 /* disksubr.c */ 202 struct dkbad; 203 int isbad __P((struct dkbad *bt, int, int, int)); 204 /* machdep.c */ 205 int ldcontrolb __P((caddr_t)); 206 void dumpconf __P((void)); 207 caddr_t reserve_dumppages __P((caddr_t)); 208 /* clock.c */ 209 struct timeval; 210 void lo_microtime __P((struct timeval *)); 211 int statintr __P((void *)); 212 int clockintr __P((void *));/* level 10 (clock) interrupt code */ 213 int statintr __P((void *)); /* level 14 (statclock) interrupt code */ 214 /* locore.s */ 215 struct fpstate; 216 void savefpstate __P((struct fpstate *)); 217 void loadfpstate __P((struct fpstate *)); 218 int probeget __P((caddr_t, int)); 219 void write_all_windows __P((void)); 220 void write_user_windows __P((void)); 221 void proc_trampoline __P((void)); 222 void switchexit __P((struct proc *)); 223 struct pcb; 224 void snapshot __P((struct pcb *)); 225 struct frame *getfp __P((void)); 226 int xldcontrolb __P((caddr_t, struct pcb *)); 227 void copywords __P((const void *, void *, size_t)); 228 void qcopy __P((const void *, void *, size_t)); 229 void qzero __P((void *, size_t)); 230 /* locore2.c */ 231 void remrunqueue __P((struct proc *)); 232 /* trap.c */ 233 void kill_user_windows __P((struct proc *)); 234 int rwindow_save __P((struct proc *)); 235 void child_return __P((void *)); 236 /* amd7930intr.s */ 237 void amd7930_trap __P((void)); 238 /* cons.c */ 239 int cnrom __P((void)); 240 /* zs.c */ 241 void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int))); 242 #ifdef KGDB 243 void zs_kgdb_init __P((void)); 244 #endif 245 /* fb.c */ 246 void fb_unblank __P((void)); 247 /* cache.c */ 248 void cache_flush __P((caddr_t, u_int)); 249 /* kgdb_stub.c */ 250 #ifdef KGDB 251 void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *)); 252 void kgdb_connect __P((int)); 253 void kgdb_panic __P((void)); 254 #endif 255 /* emul.c */ 256 struct trapframe; 257 int fixalign __P((struct proc *, struct trapframe *)); 258 int emulinstr __P((int, struct trapframe *)); 259 /* cpu.c */ 260 void mp_pause_cpus __P((void)); 261 void mp_resume_cpus __P((void)); 262 void mp_halt_cpus __P((void)); 263 264 /* 265 * 266 * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits 267 * of the trap vector table. The next eight bits are supplied by the 268 * hardware when the trap occurs, and the bottom four bits are always 269 * zero (so that we can shove up to 16 bytes of executable code---exactly 270 * four instructions---into each trap vector). 271 * 272 * The hardware allocates half the trap vectors to hardware and half to 273 * software. 274 * 275 * Traps have priorities assigned (lower number => higher priority). 276 */ 277 278 struct trapvec { 279 int tv_instr[4]; /* the four instructions */ 280 }; 281 extern struct trapvec *trapbase; /* the 256 vectors */ 282 283 extern void wzero __P((void *, u_int)); 284 extern void wcopy __P((const void *, void *, u_int)); 285 286 #endif /* _KERNEL */ 287 #endif /* _CPU_H_ */ 288