xref: /netbsd-src/sys/arch/sparc/include/cpu.h (revision 1ca5c1b28139779176bd5c13ad7c5f25c0bcd5f8)
1 /*	$NetBSD: cpu.h,v 1.48 2001/12/11 03:24:46 uwe Exp $ */
2 
3 /*
4  * Copyright (c) 1992, 1993
5  *	The Regents of the University of California.  All rights reserved.
6  *
7  * This software was developed by the Computer Systems Engineering group
8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9  * contributed to Berkeley.
10  *
11  * All advertising materials mentioning features or use of this software
12  * must display the following acknowledgement:
13  *	This product includes software developed by the University of
14  *	California, Lawrence Berkeley Laboratory.
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions
18  * are met:
19  * 1. Redistributions of source code must retain the above copyright
20  *    notice, this list of conditions and the following disclaimer.
21  * 2. Redistributions in binary form must reproduce the above copyright
22  *    notice, this list of conditions and the following disclaimer in the
23  *    documentation and/or other materials provided with the distribution.
24  * 3. All advertising materials mentioning features or use of this software
25  *    must display the following acknowledgement:
26  *	This product includes software developed by the University of
27  *	California, Berkeley and its contributors.
28  * 4. Neither the name of the University nor the names of its contributors
29  *    may be used to endorse or promote products derived from this software
30  *    without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
42  * SUCH DAMAGE.
43  *
44  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
45  */
46 
47 #ifndef _CPU_H_
48 #define _CPU_H_
49 
50 /*
51  * CTL_MACHDEP definitions.
52  */
53 #define	CPU_BOOTED_KERNEL	1	/* string: booted kernel name */
54 #define	CPU_MAXID		2	/* number of valid machdep ids */
55 
56 #define	CTL_MACHDEP_NAMES {			\
57 	{ 0, 0 },				\
58 	{ "booted_kernel", CTLTYPE_STRING },	\
59 }
60 
61 #ifdef _KERNEL
62 /*
63  * Exported definitions unique to SPARC cpu support.
64  */
65 
66 #if !defined(_LKM) && defined(_KERNEL_OPT)
67 #include "opt_multiprocessor.h"
68 #include "opt_lockdebug.h"
69 #include "opt_sparc_arch.h"
70 #endif
71 
72 #include <machine/psl.h>
73 #include <machine/intr.h>
74 #include <sparc/sparc/cpuvar.h>
75 #include <sparc/sparc/intreg.h>
76 
77 /*
78  * definitions of cpu-dependent requirements
79  * referenced in generic code
80  */
81 #define	curcpu()		(cpuinfo.ci_self)
82 #define	curproc			(curcpu()->ci_curproc)
83 #define	CPU_IS_PRIMARY(ci)	((ci)->master)
84 
85 #define	cpu_swapin(p)	/* nothing */
86 #define	cpu_swapout(p)	/* nothing */
87 #define	cpu_wait(p)	/* nothing */
88 #define	cpu_number()	(cpuinfo.ci_cpuid)
89 
90 #if defined(MULTIPROCESSOR)
91 void	cpu_boot_secondary_processors __P((void));
92 #endif
93 
94 /*
95  * Arguments to hardclock, softclock and gatherstats encapsulate the
96  * previous machine state in an opaque clockframe.  The ipl is here
97  * as well for strayintr (see locore.s:interrupt and intr.c:strayintr).
98  * Note that CLKF_INTR is valid only if CLKF_USERMODE is false.
99  */
100 struct clockframe {
101 	u_int	psr;		/* psr before interrupt, excluding PSR_ET */
102 	u_int	pc;		/* pc at interrupt */
103 	u_int	npc;		/* npc at interrupt */
104 	u_int	ipl;		/* actual interrupt priority level */
105 	u_int	fp;		/* %fp at interrupt */
106 };
107 typedef struct clockframe clockframe;
108 
109 extern int eintstack[];
110 
111 #define	CLKF_USERMODE(framep)	(((framep)->psr & PSR_PS) == 0)
112 #define	CLKF_BASEPRI(framep)	(((framep)->psr & PSR_PIL) == 0)
113 #define	CLKF_PC(framep)		((framep)->pc)
114 #if defined(MULTIPROCESSOR)
115 #define	CLKF_INTR(framep)						\
116 	((framep)->fp > (u_int)cpuinfo.eintstack - INT_STACK_SIZE &&	\
117 	 (framep)->fp < (u_int)cpuinfo.eintstack)
118 #else
119 #define	CLKF_INTR(framep)	((framep)->fp < (u_int)eintstack)
120 #endif
121 
122 #if defined(SUN4M)
123 extern void	raise __P((int, int));
124 #if !(defined(SUN4) || defined(SUN4C))
125 #define setsoftint()	raise(0,1)
126 #else /* both defined */
127 #define setsoftint()	(cputyp == CPU_SUN4M ? raise(0,1) : ienab_bis(IE_L1))
128 #endif /* !4,!4c */
129 #else	/* 4m not defined */
130 #define setsoftint()	ienab_bis(IE_L1)
131 #endif /* SUN4M */
132 
133 void	softintr_init __P((void));
134 void	*softnet_cookie;
135 
136 #define setsoftnet()	softintr_schedule(softnet_cookie);
137 
138 extern int	want_ast;
139 
140 /*
141  * Preempt the current process if in interrupt from user mode,
142  * or after the current trap/syscall if in system mode.
143  */
144 extern int	want_resched;		/* resched() was called */
145 #define	need_resched(ci)		(want_resched = 1, want_ast = 1)
146 
147 /*
148  * Give a profiling tick to the current process when the user profiling
149  * buffer pages are invalid.  On the sparc, request an ast to send us
150  * through trap(), marking the proc as needing a profiling tick.
151  */
152 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, want_ast = 1)
153 
154 /*
155  * Notify the current process (p) that it has a signal pending,
156  * process as soon as possible.
157  */
158 #define	signotify(p)		(want_ast = 1)
159 
160 /* Number of CPUs in the system */
161 extern int ncpu;
162 
163 /*
164  * Only one process may own the FPU state.
165  *
166  * XXX this must be per-cpu (eventually)
167  */
168 extern struct proc *fpproc;	/* FPU owner */
169 extern int foundfpu;		/* true => we have an FPU */
170 
171 /*
172  * Interrupt handler chains.  Interrupt handlers should return 0 for
173  * ``not me'' or 1 (``I took care of it'').  intr_establish() inserts a
174  * handler into the list.  The handler is called with its (single)
175  * argument, or with a pointer to a clockframe if ih_arg is NULL.
176  */
177 extern struct intrhand {
178 	int	(*ih_fun) __P((void *));
179 	void	*ih_arg;
180 	struct	intrhand *ih_next;
181 } *intrhand[15];
182 
183 void	intr_establish __P((int level, struct intrhand *));
184 void	intr_disestablish __P((int level, struct intrhand *));
185 
186 /*
187  * intr_fasttrap() is a lot like intr_establish, but is used for ``fast''
188  * interrupt vectors (vectors that are not shared and are handled in the
189  * trap window).  Such functions must be written in assembly.
190  */
191 void	intr_fasttrap __P((int level, void (*vec)(void)));
192 
193 void	intr_lock_kernel __P((void));
194 void	intr_unlock_kernel __P((void));
195 
196 /* disksubr.c */
197 struct dkbad;
198 int isbad __P((struct dkbad *bt, int, int, int));
199 /* machdep.c */
200 int	ldcontrolb __P((caddr_t));
201 void	dumpconf __P((void));
202 caddr_t	reserve_dumppages __P((caddr_t));
203 /* clock.c */
204 struct timeval;
205 void	lo_microtime __P((struct timeval *));
206 int	clockintr __P((void *));/* level 10 (clock) interrupt code */
207 int	statintr __P((void *));	/* level 14 (statclock) interrupt code */
208 /* locore.s */
209 struct fpstate;
210 void	savefpstate __P((struct fpstate *));
211 void	loadfpstate __P((struct fpstate *));
212 int	probeget __P((caddr_t, int));
213 void	write_all_windows __P((void));
214 void	write_user_windows __P((void));
215 void 	proc_trampoline __P((void));
216 void	switchexit __P((struct proc *));
217 struct pcb;
218 void	snapshot __P((struct pcb *));
219 struct frame *getfp __P((void));
220 int	xldcontrolb __P((caddr_t, struct pcb *));
221 void	copywords __P((const void *, void *, size_t));
222 void	qcopy __P((const void *, void *, size_t));
223 void	qzero __P((void *, size_t));
224 /* trap.c */
225 void	kill_user_windows __P((struct proc *));
226 int	rwindow_save __P((struct proc *));
227 /* amd7930intr.s */
228 void	amd7930_trap __P((void));
229 /* cons.c */
230 int	cnrom __P((void));
231 /* zs.c */
232 void zsconsole __P((struct tty *, int, int, void (**)(struct tty *, int)));
233 #ifdef KGDB
234 void zs_kgdb_init __P((void));
235 #endif
236 /* fb.c */
237 void	fb_unblank __P((void));
238 /* cache.c */
239 void cache_flush __P((caddr_t, u_int));
240 /* kgdb_stub.c */
241 #ifdef KGDB
242 void kgdb_attach __P((int (*)(void *), void (*)(void *, int), void *));
243 void kgdb_connect __P((int));
244 void kgdb_panic __P((void));
245 #endif
246 /* emul.c */
247 struct trapframe;
248 int fixalign __P((struct proc *, struct trapframe *));
249 int emulinstr __P((int, struct trapframe *));
250 /* cpu.c */
251 void mp_pause_cpus __P((void));
252 void mp_resume_cpus __P((void));
253 void mp_halt_cpus __P((void));
254 /* msiiep.c */
255 void msiiep_swap_endian __P((int));
256 
257 /*
258  *
259  * The SPARC has a Trap Base Register (TBR) which holds the upper 20 bits
260  * of the trap vector table.  The next eight bits are supplied by the
261  * hardware when the trap occurs, and the bottom four bits are always
262  * zero (so that we can shove up to 16 bytes of executable code---exactly
263  * four instructions---into each trap vector).
264  *
265  * The hardware allocates half the trap vectors to hardware and half to
266  * software.
267  *
268  * Traps have priorities assigned (lower number => higher priority).
269  */
270 
271 struct trapvec {
272 	int	tv_instr[4];		/* the four instructions */
273 };
274 extern struct trapvec *trapbase;	/* the 256 vectors */
275 
276 extern void wzero __P((void *, u_int));
277 extern void wcopy __P((const void *, void *, u_int));
278 
279 #endif /* _KERNEL */
280 #endif /* _CPU_H_ */
281